From: Lu Baolu <baolu.lu@linux.intel.com>
To: Dan Williams <dan.j.williams@intel.com>,
Ben Widawsky <ben.widawsky@intel.com>
Cc: baolu.lu@linux.intel.com, linux-cxl@vger.kernel.org,
"open list:DMA MAPPING HELPERS"
<iommu@lists.linux-foundation.org>,
David Woodhouse <dwmw2@infradead.org>,
Andrew Donnellan <ajd@linux.ibm.com>,
Bjorn Helgaas <helgaas@kernel.org>,
"David E. Box" <david.e.box@linux.intel.com>,
Frederic Barrat <fbarrat@linux.ibm.com>,
Kan Liang <kan.liang@linux.intel.com>,
Linux PCI <linux-pci@vger.kernel.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH v2 9/9] iommu/vt-d: Use pci core's DVSEC functionality
Date: Wed, 29 Sep 2021 09:36:20 +0800 [thread overview]
Message-ID: <6bca371c-44e4-3ba7-b49d-78c55a40d3a5@linux.intel.com> (raw)
In-Reply-To: <CAPcyv4i4T4XLW-P=CzdO47mZ8+_Mih7GMeDEXAtgEE+gO9JQHw@mail.gmail.com>
Hi Dan,
On 9/29/21 1:54 AM, Dan Williams wrote:
> On Thu, Sep 23, 2021 at 10:27 AM Ben Widawsky <ben.widawsky@intel.com> wrote:
>>
>> Reduce maintenance burden of DVSEC query implementation by using the
>> centralized PCI core implementation.
>>
>> Cc: iommu@lists.linux-foundation.org
>> Cc: David Woodhouse <dwmw2@infradead.org>
>> Cc: Lu Baolu <baolu.lu@linux.intel.com>
>> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
>> ---
>> drivers/iommu/intel/iommu.c | 15 +--------------
>> 1 file changed, 1 insertion(+), 14 deletions(-)
>>
>> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
>> index d75f59ae28e6..30c97181f0ae 100644
>> --- a/drivers/iommu/intel/iommu.c
>> +++ b/drivers/iommu/intel/iommu.c
>> @@ -5398,20 +5398,7 @@ static int intel_iommu_disable_sva(struct device *dev)
>> */
>> static int siov_find_pci_dvsec(struct pci_dev *pdev)
>> {
>> - int pos;
>> - u16 vendor, id;
>> -
>> - pos = pci_find_next_ext_capability(pdev, 0, 0x23);
>> - while (pos) {
>> - pci_read_config_word(pdev, pos + 4, &vendor);
>> - pci_read_config_word(pdev, pos + 8, &id);
>> - if (vendor == PCI_VENDOR_ID_INTEL && id == 5)
>> - return pos;
>> -
>> - pos = pci_find_next_ext_capability(pdev, pos, 0x23);
>> - }
>> -
>> - return 0;
>> + return pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_INTEL, 5);
>> }
>
> Same comments as the CXL patch, siov_find_pci_dvsec() doesn't seem to
> have a reason to exist anymore. What is 5?
"5" is DVSEC ID for Scalable IOV.
Anyway, the siov_find_pci_dvsec() has been dead code since commit
262948f8ba57 ("iommu: Delete iommu_dev_has_feature()"). I have a patch
to clean it up. No need to care about it in this series.
Best regards,
baolu
prev parent reply other threads:[~2021-09-29 1:39 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-23 17:26 [PATCH v2 0/9] cxl_pci refactor for reusability Ben Widawsky
2021-09-23 17:26 ` [PATCH v2 1/9] cxl: Convert "RBI" to enum Ben Widawsky
2021-09-27 23:13 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 2/9] cxl/pci: Remove dev_dbg for unknown register blocks Ben Widawsky
2021-09-28 14:37 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 3/9] cxl/pci: Remove pci request/release regions Ben Widawsky
2021-09-28 14:42 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 4/9] cxl/pci: Refactor cxl_pci_setup_regs Ben Widawsky
2021-09-28 17:35 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 5/9] cxl/pci: Make more use of cxl_register_map Ben Widawsky
2021-09-28 17:41 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 6/9] PCI: Add pci_find_dvsec_capability to find designated VSEC Ben Widawsky
2021-09-23 21:37 ` Liang, Kan
2021-09-27 17:46 ` Bjorn Helgaas
2021-09-28 5:50 ` Andrew Donnellan
2021-10-01 9:42 ` Jonathan Cameron
2021-09-23 17:26 ` [PATCH v2 7/9] cxl/pci: Use pci core's DVSEC functionality Ben Widawsky
2021-09-28 17:43 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 8/9] ocxl: " Ben Widawsky
2021-09-28 5:52 ` Andrew Donnellan
2021-09-23 17:26 ` [PATCH v2 9/9] iommu/vt-d: " Ben Widawsky
2021-09-24 6:42 ` Christoph Hellwig
2021-09-28 17:54 ` Dan Williams
2021-09-29 1:36 ` Lu Baolu [this message]
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