Re: [PATCH v2 11/29] iommu/mediatek: Always pm_runtime_get while tlb flush

From: Yong Wu <yong.wu@mediatek.com>
To: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>,
	Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>, <youlin.pei@mediatek.com>,
	"Nicolas Boichat" <drinkcat@chromium.org>,
	<anan.sun@mediatek.com>, <chao.hao@mediatek.com>
Subject: Re: [PATCH v2 11/29] iommu/mediatek: Always pm_runtime_get while tlb flush
Date: Thu, 7 Oct 2021 11:00:19 +0800	[thread overview]
Message-ID: <111c6f3905f4349e6e30cde60bdc70672ee036b3.camel@mediatek.com> (raw)
In-Reply-To: <11fe281d-4873-245b-f506-452900f33d3b@collabora.com>

On Thu, 2021-09-30 at 13:26 +0200, Dafna Hirschfeld wrote:
> 
> On 13.08.21 08:53, Yong Wu wrote:
> > Prepare for 2 HWs that sharing pgtable in different power-domains.
> > 
> > The previous SoC don't have PM. Only mt8192 has power-domain,
> > and it is display's power-domain which nearly always is enabled.
> 
> hi, I see that in mt1873.dtsi, many devices that uses the iommu have
> the
> 'power-domains' property.

Sorry, I didn't clarify this clear. I mean the iommu device don't have
this property rather than the other device.

> 
> > 
> > When there are 2 M4U HWs, it may has problem.
> > In this function, we get the pm_status via the m4u dev, but it
> > don't
> > reflect the real power-domain status of the HW since there may be
> > other
> > HW also use that power-domain.
> > 
> > Currently we could not get the real power-domain status, thus
> > always
> > pm_runtime_get here.
> > 
> > Prepare for mt8195, thus, no need fix tags here.
> > 
> > This patch may drop the performance, we expect the user could
> > pm_runtime_get_sync before dma_alloc_attrs which need tlb ops.
> > 
> 
> Could you explain this sentence a bit? should the user call
> pm_runtime_get_sync
> before calling dma_alloc_attrs?

In v3, I have removed this patch. Use [1] instead.

[1] 
https://lore.kernel.org/linux-mediatek/20210923115840.17813-13-yong.wu@mediatek.com/

Thanks.

> 
> Thanks,
> Dafna
> 
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> >   drivers/iommu/mtk_iommu.c | 5 ++++-
> >   1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> > index add23a36a5e2..abc721a1da21 100644
> > --- a/drivers/iommu/mtk_iommu.c
> > +++ b/drivers/iommu/mtk_iommu.c
> > @@ -238,8 +238,11 @@ static void
> > mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
> >   
> >   	for_each_m4u(data, head) {
> >   		if (has_pm) {
> > -			if (pm_runtime_get_if_in_use(data->dev) <= 0)
> > +			ret = pm_runtime_resume_and_get(data->dev);
> > +			if (ret < 0) {
> > +				dev_err(data->dev, "tlb flush: pm get
> > fail %d.\n", ret);
> >   				continue;
> > +			}
> >   		}
> >   
> >   		spin_lock_irqsave(&data->tlb_lock, flags);
> > 