From: John Garry <john.garry@huawei.com>
To: mika.westerberg@linux.intel.com, rafael@kernel.org,
lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, robh+dt@kernel.org,
bhelgaas@google.com, arnd@arndb.de, mark.rutland@arm.com,
olof@lixom.net, hanjun.guo@linaro.org,
dann.frazier@canonical.com
Cc: benh@kernel.crashing.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, linuxarm@huawei.com,
linux-pci@vger.kernel.org, minyard@acm.org,
devicetree@vger.kernel.org, linux-arch@vger.kernel.org,
rdunlap@infradead.org,
Gabriele Paoloni <gabriele.paoloni@huawei.com>
Subject: [PATCH v12 3/9] PCI: Add fwnode handler as input param of pci_register_io_range()
Date: Wed, 24 Jan 2018 00:36:19 +0800 [thread overview]
Message-ID: <1516725385-24535-4-git-send-email-john.garry@huawei.com> (raw)
In-Reply-To: <1516725385-24535-1-git-send-email-john.garry@huawei.com>
From: Gabriele Paoloni <gabriele.paoloni@huawei.com>
In preparation for having the PCI MMIO helpers to use the new generic
I/O space management(LOGIC_PIO) we need to add the fwnode handler as
extra input parameter.
This patch changes the signature of pci_register_io_range() and of
its callers as needed.
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/acpi/pci_root.c | 8 +++++---
drivers/of/address.c | 4 +++-
drivers/pci/pci.c | 3 ++-
include/linux/pci.h | 3 ++-
4 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 6fc204a..1213479 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -729,7 +729,8 @@ static void acpi_pci_root_validate_resources(struct device *dev,
}
}
-static void acpi_pci_root_remap_iospace(struct resource_entry *entry)
+static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
+ struct resource_entry *entry)
{
#ifdef PCI_IOBASE
struct resource *res = entry->res;
@@ -738,7 +739,7 @@ static void acpi_pci_root_remap_iospace(struct resource_entry *entry)
resource_size_t length = resource_size(res);
unsigned long port;
- if (pci_register_io_range(cpu_addr, length))
+ if (pci_register_io_range(fwnode, cpu_addr, length))
goto err;
port = pci_address_to_pio(cpu_addr);
@@ -780,7 +781,8 @@ int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
else {
resource_list_for_each_entry_safe(entry, tmp, list) {
if (entry->res->flags & IORESOURCE_IO)
- acpi_pci_root_remap_iospace(entry);
+ acpi_pci_root_remap_iospace(&device->fwnode,
+ entry);
if (entry->res->flags & IORESOURCE_DISABLED)
resource_list_destroy_entry(entry);
diff --git a/drivers/of/address.c b/drivers/of/address.c
index c6c410b..85975fe 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -2,6 +2,7 @@
#define pr_fmt(fmt) "OF: " fmt
#include <linux/device.h>
+#include <linux/fwnode.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/module.h>
@@ -335,7 +336,8 @@ int of_pci_range_to_resource(struct of_pci_range *range,
if (res->flags & IORESOURCE_IO) {
unsigned long port;
- err = pci_register_io_range(range->cpu_addr, range->size);
+ err = pci_register_io_range(&np->fwnode, range->cpu_addr,
+ range->size);
if (err)
goto invalid_range;
port = pci_address_to_pio(range->cpu_addr);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d8357ff..d60f0a3 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3383,7 +3383,8 @@ struct io_range {
* Record the PCI IO range (expressed as CPU physical address + size).
* Return a negative value if an error has occured, zero otherwise
*/
-int pci_register_io_range(phys_addr_t addr, resource_size_t size)
+int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr,
+ resource_size_t size)
{
int err = 0;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 8329983..1b70732 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1225,7 +1225,8 @@ int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
void *alignf_data);
-int pci_register_io_range(phys_addr_t addr, resource_size_t size);
+int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr,
+ resource_size_t size);
unsigned long pci_address_to_pio(phys_addr_t addr);
phys_addr_t pci_pio_to_address(unsigned long pio);
int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
--
1.9.1
next prev parent reply other threads:[~2018-01-23 16:36 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-23 16:36 [PATCH v12 0/9] LPC: legacy ISA I/O support John Garry
2018-01-23 16:36 ` [PATCH v12 1/9] LIB: Introduce a generic PIO mapping method John Garry
2018-01-23 16:36 ` [PATCH v12 2/9] PCI: Remove unused __weak attribute in pci_register_io_range() John Garry
2018-01-23 16:36 ` John Garry [this message]
2018-01-30 15:11 ` [PATCH v12 3/9] PCI: Add fwnode handler as input param of pci_register_io_range() Rob Herring
2018-01-23 16:36 ` [PATCH v12 4/9] PCI: Apply the new generic I/O management on PCI IO hosts John Garry
2018-01-23 16:36 ` [PATCH v12 5/9] OF: Add missing I/O range exception for indirect-IO devices John Garry
2018-01-23 16:36 ` [PATCH v12 6/9] LPC: Support the LPC host on Hip06/Hip07 with DT bindings John Garry
2018-02-13 18:41 ` dann frazier
2018-02-14 11:35 ` John Garry
2018-01-23 16:36 ` [PATCH v12 7/9] ACPI: Translate the I/O range of non-MMIO devices before scanning John Garry
2018-02-01 11:32 ` John Garry
[not found] ` <0a30452f-34eb-d0b5-2001-ab6b866c53e2-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2018-02-05 13:16 ` Andy Shevchenko
2018-02-05 14:25 ` John Garry
2018-02-06 19:44 ` Andy Shevchenko
2018-02-04 7:45 ` Rafael J. Wysocki
2018-02-05 11:01 ` John Garry
2018-02-05 12:10 ` Joe Perches
2018-02-05 12:17 ` John Garry
2018-01-23 16:36 ` [PATCH v12 8/9] LPC, ACPI: Add the HISI LPC ACPI support John Garry
2018-01-23 16:36 ` [PATCH v12 9/9] MAINTAINERS: Add maintainer for HiSilicon LPC driver John Garry
2018-02-08 1:02 ` [PATCH v12 0/9] LPC: legacy ISA I/O support dann frazier
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