* [PATCH v4 0/4] pinctrl: meson-a1: add pinctrl driver
@ 2019-10-25 11:49 Qianggui Song
2019-10-25 11:49 ` [PATCH v4 1/4] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
2019-10-25 11:49 ` [PATCH v4 4/4] arm64: dts: meson: a1: add pinctrl controller support Qianggui Song
0 siblings, 2 replies; 5+ messages in thread
From: Qianggui Song @ 2019-10-25 11:49 UTC (permalink / raw)
To: Linus Walleij, linux-gpio
Cc: Qianggui Song, Neil Armstrong, Jerome Brunet, Kevin Hilman,
Martin Blumenstingl, Carlo Caione, Rob Herring, Xingyu Chen,
Jianxin Pan, Hanjie Lin, Mark Rutland, linux-arm-kernel,
linux-amlogic, linux-kernel, devicetree
This patchset adds Pin controller driver support for Meson-A1 Soc
which shares the same register layout of pinmux with previous
Meson-G12A, however there is difference for gpio and pin config
registers in A1.
Changes since v3 at [2]
- separate ao fixup from meson_pinctrl_parse_dt
- provide ao extra dt parse callback for each SoC
Changes since v2 at [1]:
- make dt parser callback as a separate patch
Changes since v1 at [0]:
- collect Reviewed-by
- modify commit log
- add an extra dt parser function for a1
[0] https://lore.kernel.org/linux-amlogic/1568700442-18540-1-git-send-email-qianggui.song@amlogic.com/
[1] https://lore.kernel.org/linux-amlogic/1570532999-23302-1-git-send-email-qianggui.song@amlogic.com/
[2] https://lore.kernel.org/linux-amlogic/1571050492-6598-1-git-send-email-qianggui.song@amlogic.com/
Qianggui Song (4):
pinctrl: add compatible for Amlogic Meson A1 pin controller
pinctrl: meson: add a new callback for SoCs fixup
pinctrl: meson: add pinctrl driver support for Meson-A1 SoC
arm64: dts: meson: a1: add pinctrl controller support
.../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 18 +
drivers/pinctrl/meson/Kconfig | 6 +
drivers/pinctrl/meson/Makefile | 1 +
drivers/pinctrl/meson/pinctrl-meson-a1.c | 951 +++++++++++++++++++++
drivers/pinctrl/meson/pinctrl-meson-axg.c | 11 +
drivers/pinctrl/meson/pinctrl-meson-g12a.c | 9 +
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 11 +
drivers/pinctrl/meson/pinctrl-meson-gxl.c | 11 +
drivers/pinctrl/meson/pinctrl-meson.c | 9 +-
drivers/pinctrl/meson/pinctrl-meson.h | 3 +
drivers/pinctrl/meson/pinctrl-meson8.c | 11 +
drivers/pinctrl/meson/pinctrl-meson8b.c | 11 +
include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++
14 files changed, 1122 insertions(+), 4 deletions(-)
create mode 100644 drivers/pinctrl/meson/pinctrl-meson-a1.c
create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
--
1.9.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 1/4] pinctrl: add compatible for Amlogic Meson A1 pin controller
2019-10-25 11:49 [PATCH v4 0/4] pinctrl: meson-a1: add pinctrl driver Qianggui Song
@ 2019-10-25 11:49 ` Qianggui Song
2019-11-04 15:31 ` Linus Walleij
2019-10-25 11:49 ` [PATCH v4 4/4] arm64: dts: meson: a1: add pinctrl controller support Qianggui Song
1 sibling, 1 reply; 5+ messages in thread
From: Qianggui Song @ 2019-10-25 11:49 UTC (permalink / raw)
To: Linus Walleij, linux-gpio
Cc: Qianggui Song, Neil Armstrong, Jerome Brunet, Kevin Hilman,
Martin Blumenstingl, Carlo Caione, Rob Herring, Xingyu Chen,
Jianxin Pan, Hanjie Lin, Mark Rutland, linux-arm-kernel,
linux-amlogic, linux-kernel, devicetree
Add new compatible name for Amlogic's Meson-A1 pin controller
add a dt-binding header file which document the detail pin names.
Note that A1 doesn't need DS bank reg any more, use gpio reg as
base.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
---
.../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
2 files changed, 74 insertions(+)
create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
index 10dc4f7176ca..0aff1f28495c 100644
--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -15,6 +15,7 @@ Required properties for the root node:
"amlogic,meson-axg-aobus-pinctrl"
"amlogic,meson-g12a-periphs-pinctrl"
"amlogic,meson-g12a-aobus-pinctrl"
+ "amlogic,meson-a1-periphs-pinctrl"
- reg: address and size of registers controlling irq functionality
=== GPIO sub-nodes ===
diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
new file mode 100644
index 000000000000..40e57a5ff1db
--- /dev/null
+++ b/include/dt-bindings/gpio/meson-a1-gpio.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ * Author: Qianggui Song <qianggui.song@amlogic.com>
+ */
+
+#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
+#define _DT_BINDINGS_MESON_A1_GPIO_H
+
+#define GPIOP_0 0
+#define GPIOP_1 1
+#define GPIOP_2 2
+#define GPIOP_3 3
+#define GPIOP_4 4
+#define GPIOP_5 5
+#define GPIOP_6 6
+#define GPIOP_7 7
+#define GPIOP_8 8
+#define GPIOP_9 9
+#define GPIOP_10 10
+#define GPIOP_11 11
+#define GPIOP_12 12
+#define GPIOB_0 13
+#define GPIOB_1 14
+#define GPIOB_2 15
+#define GPIOB_3 16
+#define GPIOB_4 17
+#define GPIOB_5 18
+#define GPIOB_6 19
+#define GPIOX_0 20
+#define GPIOX_1 21
+#define GPIOX_2 22
+#define GPIOX_3 23
+#define GPIOX_4 24
+#define GPIOX_5 25
+#define GPIOX_6 26
+#define GPIOX_7 27
+#define GPIOX_8 28
+#define GPIOX_9 29
+#define GPIOX_10 30
+#define GPIOX_11 31
+#define GPIOX_12 32
+#define GPIOX_13 33
+#define GPIOX_14 34
+#define GPIOX_15 35
+#define GPIOX_16 36
+#define GPIOF_0 37
+#define GPIOF_1 38
+#define GPIOF_2 39
+#define GPIOF_3 40
+#define GPIOF_4 41
+#define GPIOF_5 42
+#define GPIOF_6 43
+#define GPIOF_7 44
+#define GPIOF_8 45
+#define GPIOF_9 46
+#define GPIOF_10 47
+#define GPIOF_11 48
+#define GPIOF_12 49
+#define GPIOA_0 50
+#define GPIOA_1 51
+#define GPIOA_2 52
+#define GPIOA_3 53
+#define GPIOA_4 54
+#define GPIOA_5 55
+#define GPIOA_6 56
+#define GPIOA_7 57
+#define GPIOA_8 58
+#define GPIOA_9 59
+#define GPIOA_10 60
+#define GPIOA_11 61
+
+#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v4 4/4] arm64: dts: meson: a1: add pinctrl controller support
2019-10-25 11:49 [PATCH v4 0/4] pinctrl: meson-a1: add pinctrl driver Qianggui Song
2019-10-25 11:49 ` [PATCH v4 1/4] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
@ 2019-10-25 11:49 ` Qianggui Song
1 sibling, 0 replies; 5+ messages in thread
From: Qianggui Song @ 2019-10-25 11:49 UTC (permalink / raw)
To: Linus Walleij, linux-gpio
Cc: Qianggui Song, Neil Armstrong, Jerome Brunet, Kevin Hilman,
Martin Blumenstingl, Carlo Caione, Rob Herring, Xingyu Chen,
Jianxin Pan, Hanjie Lin, Mark Rutland, linux-arm-kernel,
linux-amlogic, linux-kernel, devicetree
add peripheral pinctrl controller to a1 SoC
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 7210ad049d1d..0965259af869 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/meson-a1-gpio.h>
/ {
compatible = "amlogic,a1";
@@ -74,6 +75,23 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
+ periphs_pinctrl: pinctrl@0400 {
+ compatible = "amlogic,meson-a1-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio: bank@0400 {
+ reg = <0x0 0x0400 0x0 0x003c>,
+ <0x0 0x0480 0x0 0x0118>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&periphs_pinctrl 0 0 62>;
+ };
+
+ };
+
uart_AO: serial@1c00 {
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 1/4] pinctrl: add compatible for Amlogic Meson A1 pin controller
2019-10-25 11:49 ` [PATCH v4 1/4] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
@ 2019-11-04 15:31 ` Linus Walleij
2019-11-04 15:33 ` Linus Walleij
0 siblings, 1 reply; 5+ messages in thread
From: Linus Walleij @ 2019-11-04 15:31 UTC (permalink / raw)
To: Qianggui Song
Cc: open list:GPIO SUBSYSTEM, Neil Armstrong, Jerome Brunet,
Kevin Hilman, Martin Blumenstingl, Carlo Caione, Rob Herring,
Xingyu Chen, Jianxin Pan, Hanjie Lin, Mark Rutland, Linux ARM,
open list:ARM/Amlogic Meson...,
linux-kernel,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
On Fri, Oct 25, 2019 at 1:49 PM Qianggui Song <qianggui.song@amlogic.com> wrote:
> Add new compatible name for Amlogic's Meson-A1 pin controller
> add a dt-binding header file which document the detail pin names.
> Note that A1 doesn't need DS bank reg any more, use gpio reg as
> base.
>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v4 1/4] pinctrl: add compatible for Amlogic Meson A1 pin controller
2019-11-04 15:31 ` Linus Walleij
@ 2019-11-04 15:33 ` Linus Walleij
0 siblings, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2019-11-04 15:33 UTC (permalink / raw)
To: Qianggui Song
Cc: open list:GPIO SUBSYSTEM, Neil Armstrong, Jerome Brunet,
Kevin Hilman, Martin Blumenstingl, Carlo Caione, Rob Herring,
Xingyu Chen, Jianxin Pan, Hanjie Lin, Mark Rutland, Linux ARM,
open list:ARM/Amlogic Meson...,
linux-kernel,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
On Mon, Nov 4, 2019 at 4:31 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> On Fri, Oct 25, 2019 at 1:49 PM Qianggui Song <qianggui.song@amlogic.com> wrote:
>
> > Add new compatible name for Amlogic's Meson-A1 pin controller
> > add a dt-binding header file which document the detail pin names.
> > Note that A1 doesn't need DS bank reg any more, use gpio reg as
> > base.
> >
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
> > Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
>
> Patch applied.
I see there are still comments on the code patches but that is
fine, we can merge these bindings anyway. Just resend the
remaining 3 patches when you repost.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-11-04 15:33 UTC | newest]
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2019-10-25 11:49 [PATCH v4 0/4] pinctrl: meson-a1: add pinctrl driver Qianggui Song
2019-10-25 11:49 ` [PATCH v4 1/4] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
2019-11-04 15:31 ` Linus Walleij
2019-11-04 15:33 ` Linus Walleij
2019-10-25 11:49 ` [PATCH v4 4/4] arm64: dts: meson: a1: add pinctrl controller support Qianggui Song
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