* [PATCH V3 1/5] dt-bindings: phy: qcom,qmp: Add ipq8074 usb dt bindings
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
@ 2020-06-08 14:11 ` Sivaprakash Murugesan
2020-06-08 14:11 ` [PATCH V3 2/5] dt-bindings: phy: qcom,qusb2: Add ipq8074 device compatible Sivaprakash Murugesan
` (6 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Sivaprakash Murugesan @ 2020-06-08 14:11 UTC (permalink / raw)
To: agross, bjorn.andersson, kishon, vkoul, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
Cc: Sivaprakash Murugesan
Add ipq8074 qmp phy device compatible for super speed usb support.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
index 973b2d1..afc9fc4 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
@@ -18,6 +18,7 @@ properties:
compatible:
enum:
- qcom,ipq8074-qmp-pcie-phy
+ - qcom,ipq8074-qmp-usb3-phy
- qcom,msm8996-qmp-pcie-phy
- qcom,msm8996-qmp-ufs-phy
- qcom,msm8996-qmp-usb3-phy
@@ -158,6 +159,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,ipq8074-qmp-usb3-phy
- qcom,msm8996-qmp-usb3-phy
- qcom,msm8998-qmp-pcie-phy
- qcom,msm8998-qmp-usb3-phy
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH V3 2/5] dt-bindings: phy: qcom,qusb2: Add ipq8074 device compatible
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
2020-06-08 14:11 ` [PATCH V3 1/5] dt-bindings: phy: qcom,qmp: Add ipq8074 usb dt bindings Sivaprakash Murugesan
@ 2020-06-08 14:11 ` Sivaprakash Murugesan
2020-06-08 14:11 ` [PATCH V3 3/5] phy: qcom-qmp: Add USB QMP PHY support for IPQ8074 Sivaprakash Murugesan
` (5 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Sivaprakash Murugesan @ 2020-06-08 14:11 UTC (permalink / raw)
To: agross, bjorn.andersson, kishon, vkoul, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
Cc: Sivaprakash Murugesan
Add ipq8074 compatible in QUSB2 PHY for high speed USB support.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
index b5a6195..9ba62dc 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
@@ -18,6 +18,7 @@ properties:
oneOf:
- items:
- enum:
+ - qcom,ipq8074-qusb2-phy
- qcom,msm8996-qusb2-phy
- qcom,msm8998-qusb2-phy
- items:
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH V3 3/5] phy: qcom-qmp: Add USB QMP PHY support for IPQ8074
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
2020-06-08 14:11 ` [PATCH V3 1/5] dt-bindings: phy: qcom,qmp: Add ipq8074 usb dt bindings Sivaprakash Murugesan
2020-06-08 14:11 ` [PATCH V3 2/5] dt-bindings: phy: qcom,qusb2: Add ipq8074 device compatible Sivaprakash Murugesan
@ 2020-06-08 14:11 ` Sivaprakash Murugesan
2020-06-08 14:11 ` [PATCH V3 4/5] phy: qcom-qusb2: Add ipq8074 device compatible Sivaprakash Murugesan
` (4 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Sivaprakash Murugesan @ 2020-06-08 14:11 UTC (permalink / raw)
To: agross, bjorn.andersson, kishon, vkoul, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
Cc: Sivaprakash Murugesan, Balaji Prakash J
Add QMP USB PHY found in IPQ8074
Co-developed-by: Balaji Prakash J <bjagadee@codeaurora.org>
Signed-off-by: Balaji Prakash J <bjagadee@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 102 ++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index e91040a..544f140 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -198,6 +198,81 @@ static const unsigned int sm8150_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_SW_RESET] = QPHY_V4_PCS_UFS_SW_RESET,
};
+static const struct qmp_phy_init_tbl ipq8074_usb3_serdes_tbl[] = {
+ QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0x1a),
+ QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x08),
+ QMP_PHY_INIT_CFG(QSERDES_COM_CLK_SELECT, 0x30),
+ QMP_PHY_INIT_CFG(QSERDES_COM_BG_TRIM, 0x0f),
+ QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_FASTLOCK_FO_GAIN, 0x0b),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SVS_MODE_CLK_SEL, 0x01),
+ QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x06),
+ QMP_PHY_INIT_CFG(QSERDES_COM_PLL_IVCO, 0x0f),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SYS_CLK_CTRL, 0x06),
+ /* PLL and Loop filter settings */
+ QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE0, 0x82),
+ QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE0, 0x55),
+ QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE0, 0x55),
+ QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x03),
+ QMP_PHY_INIT_CFG(QSERDES_COM_CP_CTRL_MODE0, 0x0b),
+ QMP_PHY_INIT_CFG(QSERDES_COM_PLL_RCTRL_MODE0, 0x16),
+ QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
+ QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0x80),
+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE0, 0x15),
+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE0, 0x34),
+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE0, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_COM_CORE_CLK_EN, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_CFG, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_MAP, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_COM_BG_TIMER, 0x0a),
+ /* SSC settings */
+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_EN_CENTER, 0x01),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER1, 0x31),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER2, 0x01),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER1, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER2, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE1, 0xde),
+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE2, 0x07),
+};
+
+static const struct qmp_phy_init_tbl ipq8074_usb3_rx_tbl[] = {
+ QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_SO_GAIN, 0x06),
+ QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL3, 0x4c),
+ QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4, 0xb8),
+ QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x77),
+ QMP_PHY_INIT_CFG(QSERDES_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x80),
+ QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_CNTRL, 0x03),
+ QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_DEGLITCH_CNTRL, 0x16),
+ QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_ENABLES, 0x0),
+};
+
+static const struct qmp_phy_init_tbl ipq8074_usb3_pcs_tbl[] = {
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M6DB_V0, 0x15),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V0, 0x0e),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNTRL2, 0x83),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNTRL1, 0x02),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNT_VAL_L, 0x09),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNT_VAL_H_TOL, 0xa2),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_MAN_CODE, 0x85),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_LOCK_DETECT_CONFIG1, 0xd1),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_LOCK_DETECT_CONFIG2, 0x1f),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_LOCK_DETECT_CONFIG3, 0x47),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_POWER_STATE_CONFIG2, 0x1b),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_RXEQTRAINING_WAIT_TIME, 0x75),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_RXEQTRAINING_RUN_TIME, 0x13),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_LFPS_TX_ECSTART_EQTLOCK, 0x86),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_PWRUP_RESET_DLY_TIME_AUXCLK, 0x04),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_TSYNC_RSYNC_TIME, 0x44),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_U3_L, 0x40),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_U3_H, 0x00),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_RX_SIGDET_LVL, 0x88),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M6DB_V0, 0x17),
+ QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V0, 0x0f),
+};
+
static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = {
QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x1c),
QMP_PHY_INIT_CFG(QSERDES_COM_CLK_ENABLE1, 0x10),
@@ -1593,6 +1668,30 @@ static const char * const qmp_phy_vreg_l[] = {
"vdda-phy", "vdda-pll",
};
+static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
+ .type = PHY_TYPE_USB3,
+ .nlanes = 1,
+
+ .serdes_tbl = ipq8074_usb3_serdes_tbl,
+ .serdes_tbl_num = ARRAY_SIZE(ipq8074_usb3_serdes_tbl),
+ .tx_tbl = msm8996_usb3_tx_tbl,
+ .tx_tbl_num = ARRAY_SIZE(msm8996_usb3_tx_tbl),
+ .rx_tbl = ipq8074_usb3_rx_tbl,
+ .rx_tbl_num = ARRAY_SIZE(ipq8074_usb3_rx_tbl),
+ .pcs_tbl = ipq8074_usb3_pcs_tbl,
+ .pcs_tbl_num = ARRAY_SIZE(ipq8074_usb3_pcs_tbl),
+ .clk_list = msm8996_phy_clk_l,
+ .num_clks = ARRAY_SIZE(msm8996_phy_clk_l),
+ .reset_list = msm8996_usb3phy_reset_l,
+ .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
+ .vreg_list = qmp_phy_vreg_l,
+ .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
+ .regs = usb3phy_regs_layout,
+
+ .start_ctrl = SERDES_START | PCS_START,
+ .pwrdn_ctrl = SW_PWRDN,
+};
+
static const struct qmp_phy_cfg msm8996_pciephy_cfg = {
.type = PHY_TYPE_PCIE,
.nlanes = 3,
@@ -2699,6 +2798,9 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id)
static const struct of_device_id qcom_qmp_phy_of_match_table[] = {
{
+ .compatible = "qcom,ipq8074-qmp-usb3-phy",
+ .data = &ipq8074_usb3phy_cfg,
+ }, {
.compatible = "qcom,msm8996-qmp-pcie-phy",
.data = &msm8996_pciephy_cfg,
}, {
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH V3 4/5] phy: qcom-qusb2: Add ipq8074 device compatible
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
` (2 preceding siblings ...)
2020-06-08 14:11 ` [PATCH V3 3/5] phy: qcom-qmp: Add USB QMP PHY support for IPQ8074 Sivaprakash Murugesan
@ 2020-06-08 14:11 ` Sivaprakash Murugesan
2020-06-19 3:12 ` Sricharan Ramabadhran
2020-06-08 14:11 ` [PATCH V3 5/5] arm64: dts: ipq8074: enable USB support Sivaprakash Murugesan
` (3 subsequent siblings)
7 siblings, 1 reply; 12+ messages in thread
From: Sivaprakash Murugesan @ 2020-06-08 14:11 UTC (permalink / raw)
To: agross, bjorn.andersson, kishon, vkoul, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
Cc: Sivaprakash Murugesan
Add ipq8074 qusb2 device compatible for high speed usb support.
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index 393011a..557547d 100644
--- a/drivers/phy/qualcomm/phy-qcom-qusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c
@@ -810,6 +810,9 @@ static const struct phy_ops qusb2_phy_gen_ops = {
static const struct of_device_id qusb2_phy_of_match_table[] = {
{
+ .compatible = "qcom,ipq8074-qusb2-phy",
+ .data = &msm8996_phy_cfg,
+ }, {
.compatible = "qcom,msm8996-qusb2-phy",
.data = &msm8996_phy_cfg,
}, {
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH V3 4/5] phy: qcom-qusb2: Add ipq8074 device compatible
2020-06-08 14:11 ` [PATCH V3 4/5] phy: qcom-qusb2: Add ipq8074 device compatible Sivaprakash Murugesan
@ 2020-06-19 3:12 ` Sricharan Ramabadhran
0 siblings, 0 replies; 12+ messages in thread
From: Sricharan Ramabadhran @ 2020-06-19 3:12 UTC (permalink / raw)
To: Sivaprakash Murugesan, agross, bjorn.andersson, kishon, vkoul,
robh+dt, mgautam, linux-arm-msm, linux-kernel, devicetree
On 6/8/2020 7:41 PM, Sivaprakash Murugesan wrote:
> Add ipq8074 qusb2 device compatible for high speed usb support.
>
> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c
> index 393011a..557547d 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c
> @@ -810,6 +810,9 @@ static const struct phy_ops qusb2_phy_gen_ops = {
>
> static const struct of_device_id qusb2_phy_of_match_table[] = {
> {
> + .compatible = "qcom,ipq8074-qusb2-phy",
> + .data = &msm8996_phy_cfg,
> + }, {
> .compatible = "qcom,msm8996-qusb2-phy",
> .data = &msm8996_phy_cfg,
> }, {
Reviewed-by: Sricharan R <sricharan@codeaurora.org>
Regards,
Sricharan
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH V3 5/5] arm64: dts: ipq8074: enable USB support
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
` (3 preceding siblings ...)
2020-06-08 14:11 ` [PATCH V3 4/5] phy: qcom-qusb2: Add ipq8074 device compatible Sivaprakash Murugesan
@ 2020-06-08 14:11 ` Sivaprakash Murugesan
2020-06-16 10:27 ` [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
` (2 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Sivaprakash Murugesan @ 2020-06-08 14:11 UTC (permalink / raw)
To: agross, bjorn.andersson, kishon, vkoul, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
Cc: Sivaprakash Murugesan
IPQ8074 has two super speed usb ports, add phy and dwc3 nodes
to enable them.
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 24 +++++
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 167 ++++++++++++++++++++++++++++++
2 files changed, 191 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 6754cb0..dadaa8e 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -82,3 +82,27 @@
nand-bus-width = <8>;
};
};
+
+&qusb_phy_0 {
+ status = "ok";
+};
+
+&qusb_phy_1 {
+ status = "ok";
+};
+
+&ssphy_0 {
+ status = "ok";
+};
+
+&ssphy_1 {
+ status = "ok";
+};
+
+&usb_0 {
+ status = "ok";
+};
+
+&usb_1 {
+ status = "ok";
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 5303821..506a8ac 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -82,6 +82,91 @@
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
+ ssphy_1: phy@58000 {
+ compatible = "qcom,ipq8074-qmp-usb3-phy";
+ reg = <0x00058000 0x1c4>;
+ #clock-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_USB1_AUX_CLK>,
+ <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
+ <&xo>;
+ clock-names = "aux", "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_USB1_PHY_BCR>,
+ <&gcc GCC_USB3PHY_1_PHY_BCR>;
+ reset-names = "phy","common";
+ status = "disabled";
+
+ usb1_ssphy: lane@58200 {
+ reg = <0x00058200 0x130>, /* Tx */
+ <0x00058400 0x200>, /* Rx */
+ <0x00058800 0x1f8>, /* PCS */
+ <0x00058600 0x044>; /* PCS misc*/
+ #phy-cells = <0>;
+ clocks = <&gcc GCC_USB1_PIPE_CLK>;
+ clock-names = "pipe0";
+ clock-output-names = "gcc_usb1_pipe_clk_src";
+ };
+ };
+
+ qusb_phy_1: phy@59000 {
+ compatible = "qcom,ipq8074-qusb2-phy";
+ reg = <0x00059000 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
+ <&xo>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
+ status = "disabled";
+ };
+
+ ssphy_0: phy@78000 {
+ compatible = "qcom,ipq8074-qmp-usb3-phy";
+ reg = <0x00078000 0x1c4>;
+ #clock-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_USB0_AUX_CLK>,
+ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&xo>;
+ clock-names = "aux", "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_USB0_PHY_BCR>,
+ <&gcc GCC_USB3PHY_0_PHY_BCR>;
+ reset-names = "phy","common";
+ status = "disabled";
+
+ usb0_ssphy: lane@78200 {
+ reg = <0x00078200 0x130>, /* Tx */
+ <0x00078400 0x200>, /* Rx */
+ <0x00078800 0x1f8>, /* PCS */
+ <0x00078600 0x044>; /* PCS misc*/
+ #phy-cells = <0>;
+ clocks = <&gcc GCC_USB0_PIPE_CLK>;
+ clock-names = "pipe0";
+ clock-output-names = "gcc_usb0_pipe_clk_src";
+ };
+ };
+
+ qusb_phy_0: phy@79000 {
+ compatible = "qcom,ipq8074-qusb2-phy";
+ reg = <0x00079000 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&xo>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+ };
+
pcie_phy0: phy@86000 {
compatible = "qcom,ipq8074-qmp-pcie-phy";
reg = <0x00086000 0x1000>;
@@ -294,6 +379,88 @@
status = "disabled";
};
+ usb_0: usb@8af8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x08af8800 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ clock-names = "sys_noc_axi",
+ "master",
+ "sleep",
+ "mock_utmi";
+
+ assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <133330000>,
+ <133330000>,
+ <19200000>;
+
+ resets = <&gcc GCC_USB0_BCR>;
+ status = "disabled";
+
+ dwc_0: dwc3@8a00000 {
+ compatible = "snps,dwc3";
+ reg = <0x8a00000 0xcd00>;
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&qusb_phy_0>, <&usb0_ssphy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ dr_mode = "host";
+ };
+ };
+
+ usb_1: usb@8cf8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x08cf8800 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,
+ <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_SLEEP_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ clock-names = "sys_noc_axi",
+ "master",
+ "sleep",
+ "mock_utmi";
+
+ assigned-clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,
+ <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <133330000>,
+ <133330000>,
+ <19200000>;
+
+ resets = <&gcc GCC_USB1_BCR>;
+ status = "disabled";
+
+ dwc_1: dwc3@8c00000 {
+ compatible = "snps,dwc3";
+ reg = <0x8c00000 0xcd00>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&qusb_phy_1>, <&usb1_ssphy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ dr_mode = "host";
+ };
+ };
+
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH V3 0/5] Enable USB support in IPQ8074
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
` (4 preceding siblings ...)
2020-06-08 14:11 ` [PATCH V3 5/5] arm64: dts: ipq8074: enable USB support Sivaprakash Murugesan
@ 2020-06-16 10:27 ` Sivaprakash Murugesan
2020-06-19 3:20 ` Sivaprakash Murugesan
2020-06-19 3:16 ` Sricharan Ramabadhran
2020-06-24 17:18 ` Vinod Koul
7 siblings, 1 reply; 12+ messages in thread
From: Sivaprakash Murugesan @ 2020-06-16 10:27 UTC (permalink / raw)
To: agross, bjorn.andersson, kishon, vkoul, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
Ping!
Hi Vinod,
can you please review this patch series?
On 6/8/2020 7:41 PM, Sivaprakash Murugesan wrote:
> IPQ8074 has two super speed USB ports, with QMP and QUSB2 PHYs.
> This patch set enables the USB PHYs and USB dwc3 in IPQ8074.
>
> [V3]
> * Rebased patch 3 on 5.7 and linux-next tag next-20200608
> [V2]
> * Added new device compatible qcom,ipq8074-qusb2-phy for qusb2
> * Addressed Bjorn's review comments on dts and binding
>
> Sivaprakash Murugesan (5):
> dt-bindings: phy: qcom,qmp: Add ipq8074 usb dt bindings
> dt-bindings: phy: qcom,qusb2: Add ipq8074 device compatible
> phy: qcom-qmp: Add USB QMP PHY support for IPQ8074
> phy: qcom-qusb2: Add ipq8074 device compatible
> arm64: dts: ipq8074: enable USB support
>
> .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 2 +
> .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 1 +
> arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 24 +++
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 167 +++++++++++++++++++++
> drivers/phy/qualcomm/phy-qcom-qmp.c | 102 +++++++++++++
> drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +
> 6 files changed, 299 insertions(+)
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH V3 0/5] Enable USB support in IPQ8074
2020-06-16 10:27 ` [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
@ 2020-06-19 3:20 ` Sivaprakash Murugesan
0 siblings, 0 replies; 12+ messages in thread
From: Sivaprakash Murugesan @ 2020-06-19 3:20 UTC (permalink / raw)
To: agross, bjorn.andersson, kishon, vkoul, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
Hi Vinod, Bjorn
This series is completely reviewed and acked now, can you
take this for merging?
On 6/16/2020 3:57 PM, Sivaprakash Murugesan wrote:
> Ping!
>
> Hi Vinod,
>
> can you please review this patch series?
>
> On 6/8/2020 7:41 PM, Sivaprakash Murugesan wrote:
>> IPQ8074 has two super speed USB ports, with QMP and QUSB2 PHYs.
>> This patch set enables the USB PHYs and USB dwc3 in IPQ8074.
>>
>> [V3]
>> * Rebased patch 3 on 5.7 and linux-next tag next-20200608
>> [V2]
>> * Added new device compatible qcom,ipq8074-qusb2-phy for qusb2
>> * Addressed Bjorn's review comments on dts and binding
>>
>> Sivaprakash Murugesan (5):
>> dt-bindings: phy: qcom,qmp: Add ipq8074 usb dt bindings
>> dt-bindings: phy: qcom,qusb2: Add ipq8074 device compatible
>> phy: qcom-qmp: Add USB QMP PHY support for IPQ8074
>> phy: qcom-qusb2: Add ipq8074 device compatible
>> arm64: dts: ipq8074: enable USB support
>>
>> .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 2 +
>> .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 1 +
>> arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 24 +++
>> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 167
>> +++++++++++++++++++++
>> drivers/phy/qualcomm/phy-qcom-qmp.c | 102 +++++++++++++
>> drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +
>> 6 files changed, 299 insertions(+)
>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH V3 0/5] Enable USB support in IPQ8074
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
` (5 preceding siblings ...)
2020-06-16 10:27 ` [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
@ 2020-06-19 3:16 ` Sricharan Ramabadhran
2020-06-24 17:18 ` Vinod Koul
7 siblings, 0 replies; 12+ messages in thread
From: Sricharan Ramabadhran @ 2020-06-19 3:16 UTC (permalink / raw)
To: Sivaprakash Murugesan, agross, bjorn.andersson, kishon, vkoul,
robh+dt, mgautam, linux-arm-msm, linux-kernel, devicetree
Hi Siva,
On 6/8/2020 7:41 PM, Sivaprakash Murugesan wrote:
> IPQ8074 has two super speed USB ports, with QMP and QUSB2 PHYs.
> This patch set enables the USB PHYs and USB dwc3 in IPQ8074.
>
> [V3]
> * Rebased patch 3 on 5.7 and linux-next tag next-20200608
> [V2]
> * Added new device compatible qcom,ipq8074-qusb2-phy for qusb2
> * Addressed Bjorn's review comments on dts and binding
>
> Sivaprakash Murugesan (5):
> dt-bindings: phy: qcom,qmp: Add ipq8074 usb dt bindings
> dt-bindings: phy: qcom,qusb2: Add ipq8074 device compatible
> phy: qcom-qmp: Add USB QMP PHY support for IPQ8074
> phy: qcom-qusb2: Add ipq8074 device compatible
> arm64: dts: ipq8074: enable USB support
>
> .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 2 +
> .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 1 +
> arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 24 +++
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 167 +++++++++++++++++++++
> drivers/phy/qualcomm/phy-qcom-qmp.c | 102 +++++++++++++
> drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +
> 6 files changed, 299 insertions(+)
Tested this series on hk01.c1 for USB mass storage.
Tested-by: Sricharan R <sricharan@codeaurora.org>
Regards,
Sricharan
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH V3 0/5] Enable USB support in IPQ8074
2020-06-08 14:11 [PATCH V3 0/5] Enable USB support in IPQ8074 Sivaprakash Murugesan
` (6 preceding siblings ...)
2020-06-19 3:16 ` Sricharan Ramabadhran
@ 2020-06-24 17:18 ` Vinod Koul
2020-06-24 17:41 ` Bjorn Andersson
7 siblings, 1 reply; 12+ messages in thread
From: Vinod Koul @ 2020-06-24 17:18 UTC (permalink / raw)
To: Sivaprakash Murugesan
Cc: agross, bjorn.andersson, kishon, robh+dt, mgautam, linux-arm-msm,
linux-kernel, devicetree
On 08-06-20, 19:41, Sivaprakash Murugesan wrote:
> IPQ8074 has two super speed USB ports, with QMP and QUSB2 PHYs.
> This patch set enables the USB PHYs and USB dwc3 in IPQ8074.
Applied 1 thru 4. Bjorn can take the 5th one, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH V3 0/5] Enable USB support in IPQ8074
2020-06-24 17:18 ` Vinod Koul
@ 2020-06-24 17:41 ` Bjorn Andersson
0 siblings, 0 replies; 12+ messages in thread
From: Bjorn Andersson @ 2020-06-24 17:41 UTC (permalink / raw)
To: Vinod Koul
Cc: Sivaprakash Murugesan, agross, kishon, robh+dt, mgautam,
linux-arm-msm, linux-kernel, devicetree
On Wed 24 Jun 10:18 PDT 2020, Vinod Koul wrote:
> On 08-06-20, 19:41, Sivaprakash Murugesan wrote:
> > IPQ8074 has two super speed USB ports, with QMP and QUSB2 PHYs.
> > This patch set enables the USB PHYs and USB dwc3 in IPQ8074.
>
> Applied 1 thru 4. Bjorn can take the 5th one, thanks
>
Thanks Vinod, I've applied and pushed out patch 5.
Regards,
Bjorn
^ permalink raw reply [flat|nested] 12+ messages in thread