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From: Akhil P Oommen <akhilpo@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, jcrouse@codeaurora.org,
	smasetty@codeaurora.org, devicetree@vger.kernel.org,
	mka@chromium.org, saravanak@google.com, sibis@codeaurora.org,
	viresh.kumar@linaro.org, jonathan@marek.ca, robdclark@gmail.com
Subject: [PATCH v5 3/6] drm: msm: a6xx: use dev_pm_opp_set_bw to scale DDR
Date: Mon, 13 Jul 2020 18:11:43 +0530	[thread overview]
Message-ID: <1594644106-22449-4-git-send-email-akhilpo@codeaurora.org> (raw)
In-Reply-To: <1594644106-22449-1-git-send-email-akhilpo@codeaurora.org>

From: Sharat Masetty <smasetty@codeaurora.org>

This patches replaces the previously used static DDR vote and uses
dev_pm_opp_set_bw() to scale GPU->DDR bandwidth along with scaling
GPU frequency. Also since the icc path voting is handled completely
in the opp driver, remove the icc_path handle and its usage in the
drm driver.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
---
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 25 +++++++++++++++++--------
 1 file changed, 17 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 856db46..a6f43ff 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -133,7 +133,7 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
 
 	if (!gmu->legacy) {
 		a6xx_hfi_set_freq(gmu, perf_index);
-		icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
+		dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
 		pm_runtime_put(gmu->dev);
 		return;
 	}
@@ -157,11 +157,7 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
 	if (ret)
 		dev_err(gmu->dev, "GMU set GPU frequency error: %d\n", ret);
 
-	/*
-	 * Eventually we will want to scale the path vote with the frequency but
-	 * for now leave it at max so that the performance is nominal.
-	 */
-	icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
+	dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
 	pm_runtime_put(gmu->dev);
 }
 
@@ -849,6 +845,19 @@ static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu)
 	dev_pm_opp_put(gpu_opp);
 }
 
+static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu)
+{
+	struct dev_pm_opp *gpu_opp;
+	unsigned long gpu_freq = gmu->gpu_freqs[gmu->current_perf_index];
+
+	gpu_opp = dev_pm_opp_find_freq_exact(&gpu->pdev->dev, gpu_freq, true);
+	if (IS_ERR_OR_NULL(gpu_opp))
+		return;
+
+	dev_pm_opp_set_bw(&gpu->pdev->dev, gpu_opp);
+	dev_pm_opp_put(gpu_opp);
+}
+
 int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
 {
 	struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
@@ -873,7 +882,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
 	}
 
 	/* Set the bus quota to a reasonable value for boot */
-	icc_set_bw(gpu->icc_path, 0, MBps_to_icc(3072));
+	a6xx_gmu_set_initial_bw(gpu, gmu);
 
 	/* Enable the GMU interrupt */
 	gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, ~0);
@@ -1049,7 +1058,7 @@ int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu)
 		a6xx_gmu_shutdown(gmu);
 
 	/* Remove the bus vote */
-	icc_set_bw(gpu->icc_path, 0, 0);
+	dev_pm_opp_set_bw(&gpu->pdev->dev, NULL);
 
 	/*
 	 * Make sure the GX domain is off before turning off the GMU (CX)
-- 
2.7.4


  parent reply	other threads:[~2020-07-13 12:42 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-13 12:41 [PATCH v5 0/6] Add support for GPU DDR BW scaling Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 1/6] dt-bindings: drm/msm/gpu: Document gpu opp table Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 2/6] drm: msm: a6xx: send opp instead of a frequency Akhil P Oommen
2020-07-13 12:41 ` Akhil P Oommen [this message]
2020-07-13 12:41 ` [PATCH v5 4/6] arm64: dts: qcom: SDM845: Enable GPU DDR bw scaling Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 5/6] arm64: dts: qcom: sc7180: Add interconnects property for GPU Akhil P Oommen
2020-07-15 18:27   ` Rob Clark
2020-07-13 12:41 ` [PATCH v5 6/6] arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU opp Akhil P Oommen
2020-07-15 15:36 ` [PATCH v5 0/6] Add support for GPU DDR BW scaling Rob Clark
2020-07-20 10:01   ` Viresh Kumar
2020-07-20 15:03     ` Rob Clark
2020-07-21  3:24       ` Viresh Kumar
2020-07-21 14:28         ` Rob Clark
2020-07-22  5:30           ` Viresh Kumar
2020-07-22 15:47             ` Rob Clark
2020-07-22 23:01               ` Daniel Vetter
2020-07-30  5:10             ` Viresh Kumar
2020-07-30 15:27               ` Rob Clark
2020-07-30 15:37                 ` Viresh Kumar
2020-07-30 15:46                   ` Rob Clark
2020-07-30 21:26                   ` Rob Clark

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