devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Akhil P Oommen <akhilpo@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, jcrouse@codeaurora.org,
	smasetty@codeaurora.org, devicetree@vger.kernel.org,
	mka@chromium.org, saravanak@google.com, sibis@codeaurora.org,
	viresh.kumar@linaro.org, jonathan@marek.ca, robdclark@gmail.com
Subject: [PATCH v5 4/6] arm64: dts: qcom: SDM845: Enable GPU DDR bw scaling
Date: Mon, 13 Jul 2020 18:11:44 +0530	[thread overview]
Message-ID: <1594644106-22449-5-git-send-email-akhilpo@codeaurora.org> (raw)
In-Reply-To: <1594644106-22449-1-git-send-email-akhilpo@codeaurora.org>

From: Sharat Masetty <smasetty@codeaurora.org>

This patch adds the interconnects property for the gpu node and the
opp-peak-kBps property to the opps of the gpu opp table. This should
help enable DDR bandwidth scaling dynamically and proportionally to the
GPU frequency.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 8eb5a31..5e9561a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3515,42 +3515,51 @@
 
 			qcom,gmu = <&gmu>;
 
+			interconnects = <&mem_noc MASTER_GFX3D &mem_noc SLAVE_EBI1>;
+
 			gpu_opp_table: opp-table {
 				compatible = "operating-points-v2";
 
 				opp-710000000 {
 					opp-hz = /bits/ 64 <710000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+					opp-peak-kBps = <7216000>;
 				};
 
 				opp-675000000 {
 					opp-hz = /bits/ 64 <675000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+					opp-peak-kBps = <7216000>;
 				};
 
 				opp-596000000 {
 					opp-hz = /bits/ 64 <596000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+					opp-peak-kBps = <6220000>;
 				};
 
 				opp-520000000 {
 					opp-hz = /bits/ 64 <520000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+					opp-peak-kBps = <6220000>;
 				};
 
 				opp-414000000 {
 					opp-hz = /bits/ 64 <414000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+					opp-peak-kBps = <4068000>;
 				};
 
 				opp-342000000 {
 					opp-hz = /bits/ 64 <342000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+					opp-peak-kBps = <2724000>;
 				};
 
 				opp-257000000 {
 					opp-hz = /bits/ 64 <257000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+					opp-peak-kBps = <1648000>;
 				};
 			};
 		};
-- 
2.7.4


  parent reply	other threads:[~2020-07-13 12:42 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-13 12:41 [PATCH v5 0/6] Add support for GPU DDR BW scaling Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 1/6] dt-bindings: drm/msm/gpu: Document gpu opp table Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 2/6] drm: msm: a6xx: send opp instead of a frequency Akhil P Oommen
2020-07-13 12:41 ` [PATCH v5 3/6] drm: msm: a6xx: use dev_pm_opp_set_bw to scale DDR Akhil P Oommen
2020-07-13 12:41 ` Akhil P Oommen [this message]
2020-07-13 12:41 ` [PATCH v5 5/6] arm64: dts: qcom: sc7180: Add interconnects property for GPU Akhil P Oommen
2020-07-15 18:27   ` Rob Clark
2020-07-13 12:41 ` [PATCH v5 6/6] arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU opp Akhil P Oommen
2020-07-15 15:36 ` [PATCH v5 0/6] Add support for GPU DDR BW scaling Rob Clark
2020-07-20 10:01   ` Viresh Kumar
2020-07-20 15:03     ` Rob Clark
2020-07-21  3:24       ` Viresh Kumar
2020-07-21 14:28         ` Rob Clark
2020-07-22  5:30           ` Viresh Kumar
2020-07-22 15:47             ` Rob Clark
2020-07-22 23:01               ` Daniel Vetter
2020-07-30  5:10             ` Viresh Kumar
2020-07-30 15:27               ` Rob Clark
2020-07-30 15:37                 ` Viresh Kumar
2020-07-30 15:46                   ` Rob Clark
2020-07-30 21:26                   ` Rob Clark

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1594644106-22449-5-git-send-email-akhilpo@codeaurora.org \
    --to=akhilpo@codeaurora.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@freedesktop.org \
    --cc=freedreno@lists.freedesktop.org \
    --cc=jcrouse@codeaurora.org \
    --cc=jonathan@marek.ca \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mka@chromium.org \
    --cc=robdclark@gmail.com \
    --cc=saravanak@google.com \
    --cc=sibis@codeaurora.org \
    --cc=smasetty@codeaurora.org \
    --cc=viresh.kumar@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).