* [v3 PATCH 0/5] Rockchip Type-C and DispplayPort driver
@ 2016-06-23 12:50 Chris Zhong
2016-06-23 12:51 ` [v3 PATCH 2/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY Chris Zhong
2016-06-23 12:51 ` [v3 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller Chris Zhong
0 siblings, 2 replies; 5+ messages in thread
From: Chris Zhong @ 2016-06-23 12:50 UTC (permalink / raw)
To: dianders, tfiga, heiko, yzq, groeck, myungjoo.ham, cw00.choi
Cc: Mark Rutland, devicetree, Pawel Moll, Ian Campbell, linux-kernel,
dri-devel, Kever Yang, linux-rockchip, Rob Herring, Kumar Gala,
Chris Zhong, Kishon Vijay Abraham I, linux-arm-kernel
Hi all
This series patch is for rockchip Type-C phy and DisplayPort controller
driver.
The USB Type-C PHY is designed to support the USB3 and DP applications.
The PHY basically has two main components: USB3 and DisplyPort. USB3
operates in SuperSpeed mode and the DP can operate at RBR, HBR and HBR2
data rates. The Type-C cable orientation detection and Power Delivery
(PD) is accomplished using a PD PHY or a exernal PD chip.
The DP controller is compliant with DisplayPort Specification,
Version 1.3, This IP is compatible with the rockchip type-c PHY IP.
There is a uCPU in DP controller, it need a firmware to work, please
put the firmware file to /lib/firmware/cdn/dptx.bin. The uCPU in charge
of aux communication and link training, the host use mailbox to
communicate with the ucpu.
The PHY driver has register a notification with extcon API, to get the
alt mode from PD, the PD driver need call the devm_extcon_dev_allocate
to create a extcon device and use extcon_set_state to notify PHY and
DP controller.
About the DP audio, cdn-dp registered 2 DAIs: 0 is I2S, 1 is SPDIF.
We can reference them in simple-card.
This series is based on Mark Yao's branch:
https://github.com/markyzq/kernel-drm-rockchip/tree/drm-rockchip-next-2016-05-23
I test this patches on the rk3399-evb board, with a fusb302 driver,
this branch has no rk3399.dtsi, so the patch about dts is not included
in this series.
Changes in v3:
- use compatible: rockchip,rk3399-typec-phy
- use dashes instead of underscores.
- remove the phy framework(Kishon Vijay Abraham I)
- add parentheses around the macro
- use a single space between type and name
- add spaces after opening and before closing braces.
- use u16 for register value
- remove type-c phy header file
- CodingStyle optimization
- use some cable extcon to get type-c port information
- add a extcon to notify Display Port
- add SoC specific compatible string
- remove reg = <1>;
- use EXTCON_DISP_DP and EXTCON_DISP_DP_ALT cable to get dp port state.
- reset spdif before config it
- modify the firmware clk to 100Mhz
- retry load firmware if fw file is requested too early
Changes in v2:
- add some registers description
- select RESET_CONTROLLER
- alphabetic order
- modify some spelling mistakes
- make mode cleaner
- use bool for enable/disable
- check all of the return value
- return a better err number
- use more readx_poll_timeout()
- clk_disable_unprepare(tcphy->clk_ref);
- remove unuse functions, rockchip_typec_phy_power_on/off
- remove unnecessary typecast from void *
- use dts node to distinguish between phys.
- Alphabetic order
- remove excess error message
- use define clk_rate
- check all return value
- remove dev_set_name(dp->dev, "cdn-dp");
- use schedule_delayed_work
- remove never-called functions
- remove some unnecessary ()
Changes in v1:
- add extcon node description
- move the registers in phy driver
- remove the suffix of reset
- update the licence note
- init core clock to 50MHz
- use extcon API
- remove unused global
- add some comments for magic num
- change usleep_range(1000, 2000) tousleep_range(1000, 1050)
- remove __func__ from dev_err
- return err number when get clk failed
- remove ADDR_ADJ define
- use devm_clk_get(&pdev->dev, "tcpdcore")
- add extcon node description
- add #sound-dai-cells description
- use extcon API
- use hdmi-codec for the DP Asoc
- do not initialize the "ret"
- printk a err log when drm_of_encoder_active_endpoint_id
- modify the dclk pin_pol to a single line
Chris Zhong (5):
extcon: Add Type-C and DP support
Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
phy: Add USB Type-C PHY driver for rk3399
Documentation: bindings: add dt documentation for cdn DP controller
drm/rockchip: cdn-dp: add cdn DP support for rk3399
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 61 ++
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 74 ++
drivers/extcon/extcon.c | 6 +
drivers/gpu/drm/rockchip/Kconfig | 9 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/cdn-dp-core.c | 722 ++++++++++++++
drivers/gpu/drm/rockchip/cdn-dp-core.h | 108 ++
drivers/gpu/drm/rockchip/cdn-dp-reg.c | 731 ++++++++++++++
drivers/gpu/drm/rockchip/cdn-dp-reg.h | 404 ++++++++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 +-
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 +
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 2 +
drivers/phy/Kconfig | 8 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-rockchip-typec.c | 1027 ++++++++++++++++++++
include/linux/extcon.h | 6 +
16 files changed, 3167 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
create mode 100644 drivers/gpu/drm/rockchip/cdn-dp-core.c
create mode 100644 drivers/gpu/drm/rockchip/cdn-dp-core.h
create mode 100644 drivers/gpu/drm/rockchip/cdn-dp-reg.c
create mode 100644 drivers/gpu/drm/rockchip/cdn-dp-reg.h
create mode 100644 drivers/phy/phy-rockchip-typec.c
--
2.6.3
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 5+ messages in thread
* [v3 PATCH 2/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
2016-06-23 12:50 [v3 PATCH 0/5] Rockchip Type-C and DispplayPort driver Chris Zhong
@ 2016-06-23 12:51 ` Chris Zhong
[not found] ` <1466686264-6744-3-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-06-23 12:51 ` [v3 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller Chris Zhong
1 sibling, 1 reply; 5+ messages in thread
From: Chris Zhong @ 2016-06-23 12:51 UTC (permalink / raw)
To: dianders, tfiga, heiko, yzq, groeck, myungjoo.ham, cw00.choi
Cc: linux-rockchip, Chris Zhong, Rob Herring, Pawel Moll,
Mark Rutland, Ian Campbell, Kumar Gala, Kever Yang, devicetree,
linux-arm-kernel, linux-kernel
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v3:
- use compatible: rockchip,rk3399-typec-phy
- use dashes instead of underscores.
Changes in v2:
- add some registers description
Changes in v1:
- add extcon node description
- move the registers in phy driver
- remove the suffix of reset
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 74 ++++++++++++++++++++++
1 file changed, 74 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
new file mode 100644
index 0000000..0c5b333
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
@@ -0,0 +1,74 @@
+* ROCKCHIP type-c PHY
+---------------------
+
+Required properties:
+ - compatible : must be "rockchip,rk3399-typec-phy"
+ - reg: Address and length of the usb phy control register set
+ - rockchip,grf : phandle to the syscon managing the "general
+ register files"
+ - clocks : phandle + clock specifier for the phy clocks
+ - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref";
+ - resets : a list of phandle + reset specifier pairs
+ - reset-names : string reset name, must be:
+ "uphy", "uphy-pipe", "uphy-tcphy"
+ - extcon : extcon specifier for the Power Delivery
+
+Note, there are 2 type-c phys for RK3399, and they are almost identical, except
+these registers(description below), every register node contains 3 sections:
+offset, enable bit, write mask bit.
+ - rockchip,typec-conn-dir : the register of type-c connector direction,
+ for type-c phy0, it must be <0xe580 0 16>;
+ for type-c phy1, it must be <0xe58c 0 16>;
+ - rockchip,usb3tousb2-en : the register of type-c force usb3 to usb2 enable
+ control.
+ for type-c phy0, it must be <0xe580 3 19>;
+ for type-c phy1, it must be <0xe58c 3 19>;
+ - rockchip,external-psm : the register of type-c phy external psm clock
+ selection.
+ for type-c phy0, it must be <0xe588 14 30>;
+ for type-c phy1, it must be <0xe594 14 30>;
+ - rockchip,pipe-status : the register of type-c phy pipe status.
+ for type-c phy0, it must be <0xe5c0 0 0>;
+ for type-c phy1, it must be <0xe5c0 16 16>;
+ - rockchip,uphy-dp-sel : the register of type-c phy selection for DP
+ for type-c phy0, it must be <0x6268 19 19>;
+ for type-c phy1, it must be <0x6268 3 19>;
+
+Example:
+ tcphy0: phy@ff7c0000 {
+ compatible = "rockchip,rk3399-typec-phy";
+ reg = <0x0 0xff7c0000 0x0 0x40000>;
+ extcon = <&fusb0>;
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_UPHY0_TCPDCORE>,
+ <&cru SCLK_UPHY0_TCPDPHY_REF>;
+ clock-names = "tcpdcore", "tcpdphy-ref";
+ resets = <&cru SRST_UPHY0>,
+ <&cru SRST_UPHY0_PIPE_L00>,
+ <&cru SRST_P_UPHY0_TCPHY>;
+ reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+ rockchip,typec-conn-dir = <0xe580 0 16>;
+ rockchip,usb3tousb2-en = <0xe580 3 19>;
+ rockchip,external-psm = <0xe588 14 30>;
+ rockchip,pipe-status = <0xe5c0 0 0>;
+ rockchip,uphy-dp-sel = <0x6268 19 19>;
+ };
+
+ tcphy1: phy@ff800000 {
+ compatible = "rockchip,rk3399-typec-phy";
+ reg = <0x0 0xff800000 0x0 0x40000>;
+ extcon = <&fusb1>;
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_UPHY1_TCPDCORE>,
+ <&cru SCLK_UPHY1_TCPDPHY_REF>;
+ clock-names = "tcpdcore", "tcpdphy-ref";
+ resets = <&cru SRST_UPHY1>,
+ <&cru SRST_UPHY1_PIPE_L00>,
+ <&cru SRST_P_UPHY1_TCPHY>;
+ reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+ rockchip,typec-conn-dir = <0xe58c 0 16>;
+ rockchip,usb3tousb2-en = <0xe58c 3 19>;
+ rockchip,external-psm = <0xe594 14 30>;
+ rockchip,pipe-status = <0xe5c0 16 16>;
+ rockchip,uphy-dp-sel = <0x6268 3 19>;
+ };
--
2.6.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [v3 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller
2016-06-23 12:50 [v3 PATCH 0/5] Rockchip Type-C and DispplayPort driver Chris Zhong
2016-06-23 12:51 ` [v3 PATCH 2/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY Chris Zhong
@ 2016-06-23 12:51 ` Chris Zhong
2016-06-24 19:20 ` Rob Herring
1 sibling, 1 reply; 5+ messages in thread
From: Chris Zhong @ 2016-06-23 12:51 UTC (permalink / raw)
To: dianders, tfiga, heiko, yzq, groeck, myungjoo.ham, cw00.choi
Cc: Mark Rutland, devicetree, Pawel Moll, Ian Campbell, linux-kernel,
dri-devel, linux-rockchip, Rob Herring, Kumar Gala, Chris Zhong,
linux-arm-kernel
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
Changes in v3:
- add SoC specific compatible string
- remove reg = <1>;
Changes in v2: None
Changes in v1:
- add extcon node description
- add #sound-dai-cells description
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 61 ++++++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
new file mode 100644
index 0000000..b14b2b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
@@ -0,0 +1,61 @@
+Rockchip RK3399 specific extensions to the cdn Display Port
+================================
+
+Required properties:
+- compatible: must be "rockchip,rk3399-cdn-dp"
+
+- reg: physical base address of the controller and length
+
+- clocks: from common clock binding: handle to dp clock.
+
+- clock-names: from common clock binding:
+ Required elements: "core-clk" "pclk" "spdif"
+
+- rockchip,grf: this soc should set GRF regs, so need get grf here.
+
+- ports: contain a port nodes with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+ contained 2 endpoints, connecting to the output of vop.
+
+- phys: from general PHY binding: the phandle for the PHY device.
+
+- extcon: extcon specifier for the Power Delivery
+
+- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF
+
+-------------------------------------------------------------------------------
+
+Example:
+ cdn_dp: dp@fec00000 {
+ compatible = "rockchip,rk3399-cdn-dp";
+ reg = <0x0 0xfec00000 0x0 0x100000>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
+ <&cru SCLK_SPDIF_REC_DPTX>;
+ clock-names = "core-clk", "pclk", "spdif";
+ phys = <&tcphy0>;
+ extcon = <&fusb1>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dp_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ dp_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_dp>;
+ };
+
+ dp_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_dp>;
+ };
+ };
+ };
+ };
--
2.6.3
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [v3 PATCH 2/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
[not found] ` <1466686264-6744-3-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
@ 2016-06-24 19:19 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2016-06-24 19:19 UTC (permalink / raw)
To: Chris Zhong
Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA,
heiko-4mtYJXux2i+zQB+pC5nmwQ, Pawel Moll,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
yzq-TNX95d0MmH7DzftRWevZcw, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
Ian Campbell, dianders-F7+t8E8rja9g9hUCZPvPmw,
tfiga-F7+t8E8rja9g9hUCZPvPmw, Kever Yang,
cw00.choi-Sze3O3UU22JBDgjK7y7TUQ,
myungjoo.ham-Sze3O3UU22JBDgjK7y7TUQ, Kumar Gala,
groeck-F7+t8E8rja9g9hUCZPvPmw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Thu, Jun 23, 2016 at 08:51:01PM +0800, Chris Zhong wrote:
> This patch adds a binding that describes the Rockchip USB Type-C PHY
> for rk3399
>
> Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Reviewed-by: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> Reviewed-by: Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> ---
>
> Changes in v3:
> - use compatible: rockchip,rk3399-typec-phy
> - use dashes instead of underscores.
>
> Changes in v2:
> - add some registers description
>
> Changes in v1:
> - add extcon node description
> - move the registers in phy driver
> - remove the suffix of reset
>
> .../devicetree/bindings/phy/phy-rockchip-typec.txt | 74 ++++++++++++++++++++++
> 1 file changed, 74 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [v3 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller
2016-06-23 12:51 ` [v3 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller Chris Zhong
@ 2016-06-24 19:20 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2016-06-24 19:20 UTC (permalink / raw)
To: Chris Zhong
Cc: Mark Rutland, devicetree, Pawel Moll, linux-rockchip, yzq,
linux-kernel, Ian Campbell, dianders, dri-devel, tfiga,
cw00.choi, myungjoo.ham, Kumar Gala, groeck, linux-arm-kernel
On Thu, Jun 23, 2016 at 08:51:03PM +0800, Chris Zhong wrote:
> This patch adds a binding that describes the cdn DP controller for
> rk3399.
>
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
>
> ---
>
> Changes in v3:
> - add SoC specific compatible string
> - remove reg = <1>;
>
> Changes in v2: None
> Changes in v1:
> - add extcon node description
> - add #sound-dai-cells description
>
> .../bindings/display/rockchip/cdn-dp-rockchip.txt | 61 ++++++++++++++++++++++
> 1 file changed, 61 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-06-24 19:20 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-06-23 12:50 [v3 PATCH 0/5] Rockchip Type-C and DispplayPort driver Chris Zhong
2016-06-23 12:51 ` [v3 PATCH 2/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY Chris Zhong
[not found] ` <1466686264-6744-3-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-06-24 19:19 ` Rob Herring
2016-06-23 12:51 ` [v3 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller Chris Zhong
2016-06-24 19:20 ` Rob Herring
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).