[PATCH 4/7] dt-bindings: display: msm/dsi: Remove unused properties

[PATCH 4/7] dt-bindings: display: msm/dsi: Remove unused properties

[Archit Taneja]

"qcom,dsi-host-index" and "qcom,dsi-phy-index" DT props aren't
acceptable and have never been used in any DT files. Remove them.

Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
 Documentation/devicetree/bindings/display/msm/dsi.txt | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
index a6671bd2c85a..457c688736be 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi.txt
+++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
@@ -7,8 +7,6 @@ Required properties:
 - reg: Physical base address and length of the registers of controller
 - reg-names: The names of register regions. The following regions are required:
   * "dsi_ctrl"
-- qcom,dsi-host-index: The ID of DSI controller hardware instance. This should
-  be 0 or 1, since we have 2 DSI controllers at most for now.
 - interrupts: The interrupt signal from the DSI block.
 - power-domains: Should be <&mmcc MDSS_GDSC>.
 - clocks: Phandles to device clocks.
@@ -96,8 +94,6 @@ Required properties:
   * "dsi_phy_regulator"
 - clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
   2 clocks: A byte clock (index 0), and a pixel clock (index 1).
-- qcom,dsi-phy-index: The ID of DSI PHY hardware instance. This should
-  be 0 or 1, since we have 2 DSI PHYs at most for now.
 - power-domains: Should be <&mmcc MDSS_GDSC>.
 - clocks: Phandles to device clocks. See [1] for details on clock bindings.
 - clock-names: the following clocks are required:
-- 
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hosted by The Linux Foundation

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Re: [PATCH 4/7] dt-bindings: display: msm/dsi: Remove unused properties

[Rob Herring]

On Wed, Jan 17, 2018 at 03:04:45PM +0530, Archit Taneja wrote:
> "qcom,dsi-host-index" and "qcom,dsi-phy-index" DT props aren't
> acceptable and have never been used in any DT files. Remove them.
> 
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/display/msm/dsi.txt | 4 ----
>  1 file changed, 4 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>
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[PATCH 5/7] dt-bindings: display: msm/dsi: Fix the PHY regulator supply props

[Archit Taneja]

The PHY regulator supply names vary across different PHY versions.
Mention explicitly which PHYs require which supplies.

Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
 Documentation/devicetree/bindings/display/msm/dsi.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
index 457c688736be..9c3ad6bbb9f0 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi.txt
+++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
@@ -98,7 +98,11 @@ Required properties:
 - clocks: Phandles to device clocks. See [1] for details on clock bindings.
 - clock-names: the following clocks are required:
   * "iface"
+  For 28nm HPM/LP, 28nm 8960 PHYs:
 - vddio-supply: phandle to vdd-io regulator device node
+  For 20nm PHY:
+- vddio-supply: phandle to vdd-io regulator device node
+- vcca-supply: phandle to vcca regulator device node
 
 Optional properties:
 - qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY
-- 
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hosted by The Linux Foundation

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Re: [PATCH 5/7] dt-bindings: display: msm/dsi: Fix the PHY regulator supply props

[Rob Herring]

On Wed, Jan 17, 2018 at 03:04:46PM +0530, Archit Taneja wrote:
> The PHY regulator supply names vary across different PHY versions.
> Mention explicitly which PHYs require which supplies.
> 
> Cc: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Archit Taneja <architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/display/msm/dsi.txt | 4 ++++
>  1 file changed, 4 insertions(+)

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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[PATCH 6/7] dt-bindings: display: msm/dsi: Add compatible for 14nm DSI PHY

[Archit Taneja]

Add the compatible string for 14nm DSI PHY (used in MSM8996/APQ8096).
From 14nm PHY onwards, the "dsi_phy_regulator" reg-name is not required,
but "dsi_phy_lane" reg-name is. Update the doc to specify the reg-names
each PHY revision needs.

Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
 Documentation/devicetree/bindings/display/msm/dsi.txt | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
index 9c3ad6bbb9f0..26a1796b7145 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi.txt
+++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
@@ -86,12 +86,19 @@ Required properties:
   * "qcom,dsi-phy-28nm-lp"
   * "qcom,dsi-phy-20nm"
   * "qcom,dsi-phy-28nm-8960"
-- reg: Physical base address and length of the registers of PLL, PHY and PHY
-  regulator
+  * "qcom,dsi-phy-14nm"
+- reg: Physical base address and length of the registers of PLL, PHY. Some
+  revisions require the PHY regulator base address, whereas others require the
+  PHY lane base address. See below for each PHY revision.
 - reg-names: The names of register regions. The following regions are required:
+  For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
   * "dsi_pll"
   * "dsi_phy"
   * "dsi_phy_regulator"
+  For DSI 14nm PHY:
+  * "dsi_pll"
+  * "dsi_phy"
+  * "dsi_phy_lane"
 - clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
   2 clocks: A byte clock (index 0), and a pixel clock (index 1).
 - power-domains: Should be <&mmcc MDSS_GDSC>.
@@ -102,6 +109,8 @@ Required properties:
 - vddio-supply: phandle to vdd-io regulator device node
   For 20nm PHY:
 - vddio-supply: phandle to vdd-io regulator device node
+- vcca-supply: phandle to vcca regulator device node
+  For 14nm PHY:
 - vcca-supply: phandle to vcca regulator device node
 
 Optional properties:
-- 
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hosted by The Linux Foundation

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Re: [PATCH 6/7] dt-bindings: display: msm/dsi: Add compatible for 14nm DSI PHY

[Rob Herring]

On Wed, Jan 17, 2018 at 03:04:47PM +0530, Archit Taneja wrote:
> Add the compatible string for 14nm DSI PHY (used in MSM8996/APQ8096).
> From 14nm PHY onwards, the "dsi_phy_regulator" reg-name is not required,
> but "dsi_phy_lane" reg-name is. Update the doc to specify the reg-names
> each PHY revision needs.
> 
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/display/msm/dsi.txt | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
> index 9c3ad6bbb9f0..26a1796b7145 100644
> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
> @@ -86,12 +86,19 @@ Required properties:
>    * "qcom,dsi-phy-28nm-lp"
>    * "qcom,dsi-phy-20nm"
>    * "qcom,dsi-phy-28nm-8960"
> -- reg: Physical base address and length of the registers of PLL, PHY and PHY
> -  regulator
> +  * "qcom,dsi-phy-14nm"
> +- reg: Physical base address and length of the registers of PLL, PHY. Some
> +  revisions require the PHY regulator base address, whereas others require the
> +  PHY lane base address. See below for each PHY revision.
>  - reg-names: The names of register regions. The following regions are required:
> +  For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
>    * "dsi_pll"
>    * "dsi_phy"
>    * "dsi_phy_regulator"
> +  For DSI 14nm PHY:
> +  * "dsi_pll"
> +  * "dsi_phy"
> +  * "dsi_phy_lane"
>  - clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
>    2 clocks: A byte clock (index 0), and a pixel clock (index 1).
>  - power-domains: Should be <&mmcc MDSS_GDSC>.
> @@ -102,6 +109,8 @@ Required properties:
>  - vddio-supply: phandle to vdd-io regulator device node
>    For 20nm PHY:
>  - vddio-supply: phandle to vdd-io regulator device node
> +- vcca-supply: phandle to vcca regulator device node

Did you mean to add this?

> +  For 14nm PHY:
>  - vcca-supply: phandle to vcca regulator device node
>  
>  Optional properties:
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
> 

Re: [PATCH 6/7] dt-bindings: display: msm/dsi: Add compatible for 14nm DSI PHY

[Archit Taneja]

On 01/29/2018 10:45 PM, Rob Herring wrote:
> On Wed, Jan 17, 2018 at 03:04:47PM +0530, Archit Taneja wrote:
>> Add the compatible string for 14nm DSI PHY (used in MSM8996/APQ8096).
>>  From 14nm PHY onwards, the "dsi_phy_regulator" reg-name is not required,
>> but "dsi_phy_lane" reg-name is. Update the doc to specify the reg-names
>> each PHY revision needs.
>>
>> Cc: Rob Herring <robh@kernel.org>
>> Cc: devicetree@vger.kernel.org
>> Signed-off-by: Archit Taneja <architt@codeaurora.org>
>> ---
>>   Documentation/devicetree/bindings/display/msm/dsi.txt | 13 +++++++++++--
>>   1 file changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
>> index 9c3ad6bbb9f0..26a1796b7145 100644
>> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
>> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
>> @@ -86,12 +86,19 @@ Required properties:
>>     * "qcom,dsi-phy-28nm-lp"
>>     * "qcom,dsi-phy-20nm"
>>     * "qcom,dsi-phy-28nm-8960"
>> -- reg: Physical base address and length of the registers of PLL, PHY and PHY
>> -  regulator
>> +  * "qcom,dsi-phy-14nm"
>> +- reg: Physical base address and length of the registers of PLL, PHY. Some
>> +  revisions require the PHY regulator base address, whereas others require the
>> +  PHY lane base address. See below for each PHY revision.
>>   - reg-names: The names of register regions. The following regions are required:
>> +  For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
>>     * "dsi_pll"
>>     * "dsi_phy"
>>     * "dsi_phy_regulator"
>> +  For DSI 14nm PHY:
>> +  * "dsi_pll"
>> +  * "dsi_phy"
>> +  * "dsi_phy_lane"
>>   - clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
>>     2 clocks: A byte clock (index 0), and a pixel clock (index 1).
>>   - power-domains: Should be <&mmcc MDSS_GDSC>.
>> @@ -102,6 +109,8 @@ Required properties:
>>   - vddio-supply: phandle to vdd-io regulator device node
>>     For 20nm PHY:
>>   - vddio-supply: phandle to vdd-io regulator device node
>> +- vcca-supply: phandle to vcca regulator device node
> 
> Did you mean to add this?

Yes, I didn't intend it to be a part of this patch, but this supply is indeed needed for the
20nm PHY. I'll move this to a separate patch.

Thanks,
Archit

> 
>> +  For 14nm PHY:
>>   - vcca-supply: phandle to vcca regulator device node
>>   
>>   Optional properties:
>> -- 
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> hosted by The Linux Foundation
>>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH 6/7] dt-bindings: display: msm/dsi: Add compatible for 14nm DSI PHY

[Rob Clark]

On Wed, Jan 31, 2018 at 1:40 AM, Archit Taneja <architt@codeaurora.org> wrote:
>
>
> On 01/29/2018 10:45 PM, Rob Herring wrote:
>>
>> On Wed, Jan 17, 2018 at 03:04:47PM +0530, Archit Taneja wrote:
>>>
>>> Add the compatible string for 14nm DSI PHY (used in MSM8996/APQ8096).
>>>  From 14nm PHY onwards, the "dsi_phy_regulator" reg-name is not required,
>>> but "dsi_phy_lane" reg-name is. Update the doc to specify the reg-names
>>> each PHY revision needs.
>>>
>>> Cc: Rob Herring <robh@kernel.org>
>>> Cc: devicetree@vger.kernel.org
>>> Signed-off-by: Archit Taneja <architt@codeaurora.org>
>>> ---
>>>   Documentation/devicetree/bindings/display/msm/dsi.txt | 13
>>> +++++++++++--
>>>   1 file changed, 11 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt
>>> b/Documentation/devicetree/bindings/display/msm/dsi.txt
>>> index 9c3ad6bbb9f0..26a1796b7145 100644
>>> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
>>> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
>>> @@ -86,12 +86,19 @@ Required properties:
>>>     * "qcom,dsi-phy-28nm-lp"
>>>     * "qcom,dsi-phy-20nm"
>>>     * "qcom,dsi-phy-28nm-8960"
>>> -- reg: Physical base address and length of the registers of PLL, PHY and
>>> PHY
>>> -  regulator
>>> +  * "qcom,dsi-phy-14nm"
>>> +- reg: Physical base address and length of the registers of PLL, PHY.
>>> Some
>>> +  revisions require the PHY regulator base address, whereas others
>>> require the
>>> +  PHY lane base address. See below for each PHY revision.
>>>   - reg-names: The names of register regions. The following regions are
>>> required:
>>> +  For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
>>>     * "dsi_pll"
>>>     * "dsi_phy"
>>>     * "dsi_phy_regulator"
>>> +  For DSI 14nm PHY:
>>> +  * "dsi_pll"
>>> +  * "dsi_phy"
>>> +  * "dsi_phy_lane"
>>>   - clock-cells: Must be 1. The DSI PHY block acts as a clock provider,
>>> creating
>>>     2 clocks: A byte clock (index 0), and a pixel clock (index 1).
>>>   - power-domains: Should be <&mmcc MDSS_GDSC>.
>>> @@ -102,6 +109,8 @@ Required properties:
>>>   - vddio-supply: phandle to vdd-io regulator device node
>>>     For 20nm PHY:
>>>   - vddio-supply: phandle to vdd-io regulator device node
>>> +- vcca-supply: phandle to vcca regulator device node
>>
>>
>> Did you mean to add this?
>
>
> Yes, I didn't intend it to be a part of this patch, but this supply is
> indeed needed for the
> 20nm PHY. I'll move this to a separate patch.

actually, this looks correct, just formatted counter-intuitively by
git-format-patch..

vcca-supply for 20nm was introduced by "dt-bindings: display: msm/dsi:
Fix the PHY regulator supply props", but when 14nm phy is added in
this patch, it shows the addition of same line beneath 14nm PHY as an
addition above the line.

So I don't think it needs to be split up.

BR,
-R

> Thanks,
> Archit
>
>
>>
>>> +  For 14nm PHY:
>>>   - vcca-supply: phandle to vcca regulator device node
>>>     Optional properties:
>>> --
>>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
>>> Forum,
>>> hosted by The Linux Foundation
>>>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project

Re: [PATCH 6/7] dt-bindings: display: msm/dsi: Add compatible for 14nm DSI PHY

[Archit Taneja]

On 01/31/2018 09:50 PM, Rob Clark wrote:
> On Wed, Jan 31, 2018 at 1:40 AM, Archit Taneja <architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
>>
>>
>> On 01/29/2018 10:45 PM, Rob Herring wrote:
>>>
>>> On Wed, Jan 17, 2018 at 03:04:47PM +0530, Archit Taneja wrote:
>>>>
>>>> Add the compatible string for 14nm DSI PHY (used in MSM8996/APQ8096).
>>>>   From 14nm PHY onwards, the "dsi_phy_regulator" reg-name is not required,
>>>> but "dsi_phy_lane" reg-name is. Update the doc to specify the reg-names
>>>> each PHY revision needs.
>>>>
>>>> Cc: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>>>> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>>>> Signed-off-by: Archit Taneja <architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
>>>> ---
>>>>    Documentation/devicetree/bindings/display/msm/dsi.txt | 13
>>>> +++++++++++--
>>>>    1 file changed, 11 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>> b/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>> index 9c3ad6bbb9f0..26a1796b7145 100644
>>>> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>> @@ -86,12 +86,19 @@ Required properties:
>>>>      * "qcom,dsi-phy-28nm-lp"
>>>>      * "qcom,dsi-phy-20nm"
>>>>      * "qcom,dsi-phy-28nm-8960"
>>>> -- reg: Physical base address and length of the registers of PLL, PHY and
>>>> PHY
>>>> -  regulator
>>>> +  * "qcom,dsi-phy-14nm"
>>>> +- reg: Physical base address and length of the registers of PLL, PHY.
>>>> Some
>>>> +  revisions require the PHY regulator base address, whereas others
>>>> require the
>>>> +  PHY lane base address. See below for each PHY revision.
>>>>    - reg-names: The names of register regions. The following regions are
>>>> required:
>>>> +  For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
>>>>      * "dsi_pll"
>>>>      * "dsi_phy"
>>>>      * "dsi_phy_regulator"
>>>> +  For DSI 14nm PHY:
>>>> +  * "dsi_pll"
>>>> +  * "dsi_phy"
>>>> +  * "dsi_phy_lane"
>>>>    - clock-cells: Must be 1. The DSI PHY block acts as a clock provider,
>>>> creating
>>>>      2 clocks: A byte clock (index 0), and a pixel clock (index 1).
>>>>    - power-domains: Should be <&mmcc MDSS_GDSC>.
>>>> @@ -102,6 +109,8 @@ Required properties:
>>>>    - vddio-supply: phandle to vdd-io regulator device node
>>>>      For 20nm PHY:
>>>>    - vddio-supply: phandle to vdd-io regulator device node
>>>> +- vcca-supply: phandle to vcca regulator device node
>>>
>>>
>>> Did you mean to add this?
>>
>>
>> Yes, I didn't intend it to be a part of this patch, but this supply is
>> indeed needed for the
>> 20nm PHY. I'll move this to a separate patch.
> 
> actually, this looks correct, just formatted counter-intuitively by
> git-format-patch..
> 
> vcca-supply for 20nm was introduced by "dt-bindings: display: msm/dsi:
> Fix the PHY regulator supply props", but when 14nm phy is added in
> this patch, it shows the addition of same line beneath 14nm PHY as an
> addition above the line.
> 
> So I don't think it needs to be split up.

Oh yeah, you're right. I guess this is okay as is, then.

Thanks,
Archit

> 
> BR,
> -R
> 
>> Thanks,
>> Archit
>>
>>
>>>
>>>> +  For 14nm PHY:
>>>>    - vcca-supply: phandle to vcca regulator device node
>>>>      Optional properties:
>>>> --
>>>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
>>>> Forum,
>>>> hosted by The Linux Foundation
>>>>
>>
>> --
>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
>> a Linux Foundation Collaborative Project
> --
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Re: [PATCH 6/7] dt-bindings: display: msm/dsi: Add compatible for 14nm DSI PHY

[Rob Herring]

On Wed, Jan 31, 2018 at 11:29 PM, Archit Taneja <architt@codeaurora.org> wrote:
>
>
> On 01/31/2018 09:50 PM, Rob Clark wrote:
>>
>> On Wed, Jan 31, 2018 at 1:40 AM, Archit Taneja <architt@codeaurora.org>
>> wrote:
>>>
>>>
>>>
>>> On 01/29/2018 10:45 PM, Rob Herring wrote:
>>>>
>>>>
>>>> On Wed, Jan 17, 2018 at 03:04:47PM +0530, Archit Taneja wrote:
>>>>>
>>>>>
>>>>> Add the compatible string for 14nm DSI PHY (used in MSM8996/APQ8096).
>>>>>   From 14nm PHY onwards, the "dsi_phy_regulator" reg-name is not
>>>>> required,
>>>>> but "dsi_phy_lane" reg-name is. Update the doc to specify the reg-names
>>>>> each PHY revision needs.
>>>>>
>>>>> Cc: Rob Herring <robh@kernel.org>
>>>>> Cc: devicetree@vger.kernel.org
>>>>> Signed-off-by: Archit Taneja <architt@codeaurora.org>
>>>>> ---
>>>>>    Documentation/devicetree/bindings/display/msm/dsi.txt | 13
>>>>> +++++++++++--
>>>>>    1 file changed, 11 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>>> b/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>>> index 9c3ad6bbb9f0..26a1796b7145 100644
>>>>> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>>> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
>>>>> @@ -86,12 +86,19 @@ Required properties:
>>>>>      * "qcom,dsi-phy-28nm-lp"
>>>>>      * "qcom,dsi-phy-20nm"
>>>>>      * "qcom,dsi-phy-28nm-8960"
>>>>> -- reg: Physical base address and length of the registers of PLL, PHY
>>>>> and
>>>>> PHY
>>>>> -  regulator
>>>>> +  * "qcom,dsi-phy-14nm"
>>>>> +- reg: Physical base address and length of the registers of PLL, PHY.
>>>>> Some
>>>>> +  revisions require the PHY regulator base address, whereas others
>>>>> require the
>>>>> +  PHY lane base address. See below for each PHY revision.
>>>>>    - reg-names: The names of register regions. The following regions
>>>>> are
>>>>> required:
>>>>> +  For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
>>>>>      * "dsi_pll"
>>>>>      * "dsi_phy"
>>>>>      * "dsi_phy_regulator"
>>>>> +  For DSI 14nm PHY:
>>>>> +  * "dsi_pll"
>>>>> +  * "dsi_phy"
>>>>> +  * "dsi_phy_lane"
>>>>>    - clock-cells: Must be 1. The DSI PHY block acts as a clock
>>>>> provider,
>>>>> creating
>>>>>      2 clocks: A byte clock (index 0), and a pixel clock (index 1).
>>>>>    - power-domains: Should be <&mmcc MDSS_GDSC>.
>>>>> @@ -102,6 +109,8 @@ Required properties:
>>>>>    - vddio-supply: phandle to vdd-io regulator device node
>>>>>      For 20nm PHY:
>>>>>    - vddio-supply: phandle to vdd-io regulator device node
>>>>> +- vcca-supply: phandle to vcca regulator device node
>>>>
>>>>
>>>>
>>>> Did you mean to add this?
>>>
>>>
>>>
>>> Yes, I didn't intend it to be a part of this patch, but this supply is
>>> indeed needed for the
>>> 20nm PHY. I'll move this to a separate patch.
>>
>>
>> actually, this looks correct, just formatted counter-intuitively by
>> git-format-patch..
>>
>> vcca-supply for 20nm was introduced by "dt-bindings: display: msm/dsi:
>> Fix the PHY regulator supply props", but when 14nm phy is added in
>> this patch, it shows the addition of same line beneath 14nm PHY as an
>> addition above the line.
>>
>> So I don't think it needs to be split up.
>
>
> Oh yeah, you're right. I guess this is okay as is, then.

Doh!

Reviewed-by: Rob Herring <robh@kernel.org>
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[PATCH 7/7] dt-bindings: display: msm/dsi: Add updates for SDM845

[Archit Taneja]

SDM845 uses a newer revision (v2.0+) of the 6G DSI controller. This
revision has another clock input at the block boundary called the byte
interface clock. Specify this new clock in the binding.

A 10nm DSI PHY is used along with the controller. Add a compatible
string for it and specify its base address/regulator supply needs.

Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
 Documentation/devicetree/bindings/display/msm/dsi.txt | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
index 26a1796b7145..518e9cdf0d4b 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi.txt
+++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
@@ -20,6 +20,8 @@ Required properties:
   * "core"
   For DSIv2, we need an additional clock:
    * "src"
+  For DSI6G v2.0 onwards, we need also need the clock:
+   * "byte_intf"
 - assigned-clocks: Parents of "byte" and "pixel" for the given platform.
 - assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
   by a DSI PHY block. See [1] for details on clock bindings.
@@ -87,6 +89,7 @@ Required properties:
   * "qcom,dsi-phy-20nm"
   * "qcom,dsi-phy-28nm-8960"
   * "qcom,dsi-phy-14nm"
+  * "qcom,dsi-phy-10nm"
 - reg: Physical base address and length of the registers of PLL, PHY. Some
   revisions require the PHY regulator base address, whereas others require the
   PHY lane base address. See below for each PHY revision.
@@ -95,7 +98,7 @@ Required properties:
   * "dsi_pll"
   * "dsi_phy"
   * "dsi_phy_regulator"
-  For DSI 14nm PHY:
+  For DSI 14nm and 10nm PHYs:
   * "dsi_pll"
   * "dsi_phy"
   * "dsi_phy_lane"
@@ -112,6 +115,8 @@ Required properties:
 - vcca-supply: phandle to vcca regulator device node
   For 14nm PHY:
 - vcca-supply: phandle to vcca regulator device node
+  For 10nm PHY:
+- vdds-supply: phandle to vdds regulator device node
 
 Optional properties:
 - qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

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Re: [PATCH 7/7] dt-bindings: display: msm/dsi: Add updates for SDM845

[Rob Herring]

On Wed, Jan 17, 2018 at 03:04:48PM +0530, Archit Taneja wrote:
> SDM845 uses a newer revision (v2.0+) of the 6G DSI controller. This
> revision has another clock input at the block boundary called the byte
> interface clock. Specify this new clock in the binding.
> 
> A 10nm DSI PHY is used along with the controller. Add a compatible
> string for it and specify its base address/regulator supply needs.
> 
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/display/msm/dsi.txt | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)

Reviewed-by: Rob Herring <robh@kernel.org>