From: Mark Brown <broonie@kernel.org>
To: Daniel Baluta <daniel.baluta@gmail.com>
Cc: Nicolin Chen <nicoleotsuka@gmail.com>,
Daniel Baluta <daniel.baluta@nxp.com>,
Devicetree List <devicetree@vger.kernel.org>,
Linux-ALSA <alsa-devel@alsa-project.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Timur Tabi <timur@kernel.org>, Rob Herring <robh@kernel.org>,
"S.j. Wang" <shengjiu.wang@nxp.com>,
"Angus Ainslie (Purism)" <angus@akkea.ca>,
Takashi Iwai <tiwai@suse.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
dl-linux-imx <linux-imx@nxp.com>,
Viorel Suman <viorel.suman@nxp.com>,
Fabio Estevam <festevam@gmail.com>,
Mihai Serban <mihai.serban@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [alsa-devel] [PATCH v2 1/7] ASoC: fsl_sai: Add registers definition for multiple datalines
Date: Mon, 29 Jul 2019 21:20:01 +0100 [thread overview]
Message-ID: <20190729202001.GC4787@sirena.org.uk> (raw)
In-Reply-To: <CAEnQRZDmnAmgUkRGv3V5S7b5EnYTd2BO5NFuME2CfGb1=nAHzQ@mail.gmail.com>
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On Mon, Jul 29, 2019 at 10:57:43PM +0300, Daniel Baluta wrote:
> On Mon, Jul 29, 2019 at 10:42 PM Nicolin Chen <nicoleotsuka@gmail.com> wrote:
> > On Sun, Jul 28, 2019 at 10:24:23PM +0300, Daniel Baluta wrote:
> > > @@ -704,7 +711,14 @@ static bool fsl_sai_readable_reg(struct device *dev, unsigned int reg)
> > > case FSL_SAI_TCR3:
> > > case FSL_SAI_TCR4:
> > > case FSL_SAI_TCR5:
> > > - case FSL_SAI_TFR:
> > > + case FSL_SAI_TFR0:
> > A tricky thing here is that those SAI instances on older SoC don't
> > support multi data lines physically, while seemly having registers
> > pre-defined. So your change doesn't sound doing anything wrong to
> > them at all, I am still wondering if it is necessary to apply them
> > to newer compatible only though, as for older compatibles of SAI,
> > these registers would be useless and confusing if being exposed.
> > What do you think?
> Yes, I thought about this too. But, I tried to keep the code as short
> as possible and technically it is not wrong. When 1 data line is supported
> for example application will only care about TDR0, TFR0, etc.
So long as it's safe to read the registers (you don't get a bus error or
anything) I'd say it's more trouble than it's worth to have separate
regmap configuations just for this. The main reasons for restricting
readability are where there's physical problems with doing the reads or
to keep the size of the debugfs files under control for usability and
performance reasons.
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next prev parent reply other threads:[~2019-07-29 20:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-28 19:24 [PATCH v2 0/7] Add support for new SAI IP version Daniel Baluta
2019-07-28 19:24 ` [PATCH v2 1/7] ASoC: fsl_sai: Add registers definition for multiple datalines Daniel Baluta
2019-07-29 19:42 ` Nicolin Chen
2019-07-29 19:57 ` [alsa-devel] " Daniel Baluta
2019-07-29 20:20 ` Mark Brown [this message]
2019-07-30 7:59 ` Nicolin Chen
2019-08-06 11:15 ` Daniel Baluta
2019-08-07 1:12 ` Nicolin Chen
2019-07-28 19:24 ` [PATCH v2 2/7] ASoC: fsl_sai: Update Tx/Rx channel enable mask Daniel Baluta
2019-07-28 19:24 ` [PATCH v2 3/7] ASoC: fsl_sai: Add support to enable multiple data lines Daniel Baluta
2019-07-29 20:21 ` Nicolin Chen
2019-08-06 15:23 ` Daniel Baluta
2019-08-07 1:14 ` Nicolin Chen
2019-07-28 19:24 ` [PATCH v2 4/7] ASoC: dt-bindings: Document dl-mask property Daniel Baluta
2019-07-29 20:15 ` Nicolin Chen
2019-07-29 20:27 ` Daniel Baluta
2019-07-28 19:24 ` [PATCH v2 5/7] ASoC: fsl_sai: Add support for SAI new version Daniel Baluta
2019-07-28 19:24 ` [PATCH v2 6/7] ASoC: fsl_sai: Add support for imx7ulp/imx8mq Daniel Baluta
2019-07-30 8:05 ` Nicolin Chen
2019-07-28 19:24 ` [PATCH v2 7/7] ASoC: dt-bindings: Introduce compatible strings for 7ULP and 8MQ Daniel Baluta
2019-07-30 8:01 ` Nicolin Chen
2019-07-30 12:02 ` [alsa-devel] " Daniel Baluta
2019-07-30 12:04 ` Mark Brown
2019-07-30 12:10 ` Daniel Baluta
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