* [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 @ 2019-12-18 4:21 Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 1/7] thermal: sun8i: add thermal driver for H6/H5/H3/A64/A83T/R40 Vasily Khoruzhick ` (6 more replies) 0 siblings, 7 replies; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick This patchset adds driver for thermal sensor in A64, A83T, H3, H5, H6 and R40 SoCs. v7: - [vasily] Address Maxime's comments for dt-schema - [vasily] Move common part of H3 and H5 dts into sunxi-h3-h5.dtsi - [vasily] Add Maxime's a-b to the driver patch v6: - [ondrej, vasily] Squash all driver related changes into a single patch - [ondrej] Rename calib -> calibration - [ondrej] Fix thermal zone registration check - [ondrej] Lower rate of sensor data interrupts to 4/sec/sensor - [ondrej] Rework scale/offset values, H6 calibration - [ondrej] Explicitly set mod clock to 24 MHz - [ondrej] Set undocumented bits in CTRL0 for H6 - [ondrej] Add support for A83T - [ondrej] Add dts changes for A83T, H3, H5, H6 - [vasily] Add dts changes for A64 - [vasily] Address Maxime's comments for YAML scheme - [vasily] Make .calc_temp callback mandatory - [vasily] Set .max_register in regmap config, so regs can be inspected using debugfs Ondrej Jirman (4): ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones ARM: dts: sun8i-h3: Add thermal sensor and thermal zones arm64: dts: allwinner: h5: Add thermal sensor and thermal zones arm64: dts: allwinner: h6: Add thermal sensor and thermal zones Vasily Khoruzhick (1): arm64: dts: allwinner: a64: Add thermal sensors and thermal zones Yangtao Li (2): thermal: sun8i: add thermal driver for H6/H5/H3/A64/A83T/R40 dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings .../thermal/allwinner,sun8i-a83t-ths.yaml | 146 ++++ MAINTAINERS | 7 + arch/arm/boot/dts/sun8i-a83t.dtsi | 36 + arch/arm/boot/dts/sun8i-h3.dtsi | 20 + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 42 ++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 26 + arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 + drivers/thermal/Kconfig | 14 + drivers/thermal/Makefile | 1 + drivers/thermal/sun8i_thermal.c | 639 ++++++++++++++++++ 11 files changed, 970 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml create mode 100644 drivers/thermal/sun8i_thermal.c -- 2.24.1 ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v7 1/7] thermal: sun8i: add thermal driver for H6/H5/H3/A64/A83T/R40 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick @ 2019-12-18 4:21 ` Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings Vasily Khoruzhick ` (5 subsequent siblings) 6 siblings, 0 replies; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick From: Yangtao Li <tiny.windzz@gmail.com> This patch adds the support for allwinner thermal sensor, within allwinner SoC. It will register sensors for thermal framework and use device tree to bind cooling device. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> --- MAINTAINERS | 7 + drivers/thermal/Kconfig | 14 + drivers/thermal/Makefile | 1 + drivers/thermal/sun8i_thermal.c | 639 ++++++++++++++++++++++++++++++++ 4 files changed, 661 insertions(+) create mode 100644 drivers/thermal/sun8i_thermal.c diff --git a/MAINTAINERS b/MAINTAINERS index a049abccaa26..ed023d3e8e4c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -694,6 +694,13 @@ L: linux-crypto@vger.kernel.org S: Maintained F: drivers/crypto/allwinner/ +ALLWINNER THERMAL DRIVER +M: Yangtao Li <tiny.windzz@gmail.com> +L: linux-pm@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml +F: drivers/thermal/sun8i_thermal.c + ALLWINNER VPU DRIVER M: Maxime Ripard <mripard@kernel.org> M: Paul Kocialkowski <paul.kocialkowski@bootlin.com> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 79b27865c6f4..8cef77fdef5a 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -263,6 +263,20 @@ config SPEAR_THERMAL Enable this to plug the SPEAr thermal sensor driver into the Linux thermal framework. +config SUN8I_THERMAL + tristate "Allwinner sun8i thermal driver" + depends on ARCH_SUNXI || COMPILE_TEST + depends on HAS_IOMEM + depends on NVMEM + depends on OF + depends on RESET_CONTROLLER + help + Support for the sun8i thermal sensor driver into the Linux thermal + framework. + + To compile this driver as a module, choose M here: the + module will be called sun8i-thermal. + config ROCKCHIP_THERMAL tristate "Rockchip thermal driver" depends on ARCH_ROCKCHIP || COMPILE_TEST diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index baeb70bf0568..939301195b9e 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -31,6 +31,7 @@ thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o obj-y += broadcom/ obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o +obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o obj-$(CONFIG_RCAR_GEN3_THERMAL) += rcar_gen3_thermal.o diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c new file mode 100644 index 000000000000..639a06061305 --- /dev/null +++ b/drivers/thermal/sun8i_thermal.c @@ -0,0 +1,639 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Thermal sensor driver for Allwinner SOC + * Copyright (C) 2019 Yangtao Li + * + * Based on the work of Icenowy Zheng <icenowy@aosc.io> + * Based on the work of Ondrej Jirman <megous@megous.com> + * Based on the work of Josef Gajdusek <atx@atx.name> + */ + +#include <linux/clk.h> +#include <linux/device.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/nvmem-consumer.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/reset.h> +#include <linux/slab.h> +#include <linux/thermal.h> + +#define MAX_SENSOR_NUM 4 + +#define FT_TEMP_MASK GENMASK(11, 0) +#define TEMP_CALIB_MASK GENMASK(11, 0) +#define CALIBRATE_DEFAULT 0x800 + +#define SUN8I_THS_CTRL0 0x00 +#define SUN8I_THS_CTRL2 0x40 +#define SUN8I_THS_IC 0x44 +#define SUN8I_THS_IS 0x48 +#define SUN8I_THS_MFC 0x70 +#define SUN8I_THS_TEMP_CALIB 0x74 +#define SUN8I_THS_TEMP_DATA 0x80 + +#define SUN50I_THS_CTRL0 0x00 +#define SUN50I_H6_THS_ENABLE 0x04 +#define SUN50I_H6_THS_PC 0x08 +#define SUN50I_H6_THS_DIC 0x10 +#define SUN50I_H6_THS_DIS 0x20 +#define SUN50I_H6_THS_MFC 0x30 +#define SUN50I_H6_THS_TEMP_CALIB 0xa0 +#define SUN50I_H6_THS_TEMP_DATA 0xc0 + +#define SUN8I_THS_CTRL0_T_ACQ0(x) (GENMASK(15, 0) & (x)) +#define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16) +#define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8) + +#define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16) +#define SUN50I_THS_FILTER_EN BIT(2) +#define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) +#define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12) +#define SUN50I_H6_THS_DATA_IRQ_STS(x) BIT(x) + +/* millidegree celsius */ +#define THS_EFUSE_CP_FT_MASK 0x3000 +#define THS_EFUSE_CP_FT_BIT 12 +#define THS_CALIBRATION_IN_FT 1 + +struct tsensor { + struct ths_device *tmdev; + struct thermal_zone_device *tzd; + int id; +}; + +struct ths_thermal_chip { + bool has_mod_clk; + bool has_bus_clk_reset; + int sensor_num; + int offset; + int scale; + int ft_deviation; + int temp_data_base; + int (*calibrate)(struct ths_device *tmdev, + u16 *caldata, int callen); + int (*init)(struct ths_device *tmdev); + int (*irq_ack)(struct ths_device *tmdev); + int (*calc_temp)(struct ths_device *tmdev, + int id, int reg); +}; + +struct ths_device { + const struct ths_thermal_chip *chip; + struct device *dev; + struct regmap *regmap; + struct reset_control *reset; + struct clk *bus_clk; + struct clk *mod_clk; + struct tsensor sensor[MAX_SENSOR_NUM]; + u32 cp_ft_flag; +}; + +/* Temp Unit: millidegree Celsius */ +static int sun8i_ths_calc_temp(struct ths_device *tmdev, + int id, int reg) +{ + return tmdev->chip->offset - (reg * tmdev->chip->scale / 10); +} + +static int sun50i_h5_calc_temp(struct ths_device *tmdev, + int id, int reg) +{ + if (reg >= 0x500) + return -1191 * reg / 10 + 223000; + else if (!id) + return -1452 * reg / 10 + 259000; + else + return -1590 * reg / 10 + 276000; +} + +static int sun8i_ths_get_temp(void *data, int *temp) +{ + struct tsensor *s = data; + struct ths_device *tmdev = s->tmdev; + int val = 0; + + regmap_read(tmdev->regmap, tmdev->chip->temp_data_base + + 0x4 * s->id, &val); + + /* ths have no data yet */ + if (!val) + return -EAGAIN; + + *temp = tmdev->chip->calc_temp(tmdev, s->id, val); + /* + * According to the original sdk, there are some platforms(rarely) + * that add a fixed offset value after calculating the temperature + * value. We can't simply put it on the formula for calculating the + * temperature above, because the formula for calculating the + * temperature above is also used when the sensor is calibrated. If + * do this, the correct calibration formula is hard to know. + */ + *temp += tmdev->chip->ft_deviation; + + return 0; +} + +static const struct thermal_zone_of_device_ops ths_ops = { + .get_temp = sun8i_ths_get_temp, +}; + +static const struct regmap_config config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .fast_io = true, + .max_register = 0xfc, +}; + +static int sun8i_h3_irq_ack(struct ths_device *tmdev) +{ + int i, state, ret = 0; + + regmap_read(tmdev->regmap, SUN8I_THS_IS, &state); + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + if (state & SUN8I_THS_DATA_IRQ_STS(i)) { + regmap_write(tmdev->regmap, SUN8I_THS_IS, + SUN8I_THS_DATA_IRQ_STS(i)); + ret |= BIT(i); + } + } + + return ret; +} + +static int sun50i_h6_irq_ack(struct ths_device *tmdev) +{ + int i, state, ret = 0; + + regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state); + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) { + regmap_write(tmdev->regmap, SUN50I_H6_THS_DIS, + SUN50I_H6_THS_DATA_IRQ_STS(i)); + ret |= BIT(i); + } + } + + return ret; +} + +static irqreturn_t sun8i_irq_thread(int irq, void *data) +{ + struct ths_device *tmdev = data; + int i, state; + + state = tmdev->chip->irq_ack(tmdev); + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + if (state & BIT(i)) + thermal_zone_device_update(tmdev->sensor[i].tzd, + THERMAL_EVENT_UNSPECIFIED); + } + + return IRQ_HANDLED; +} + +static int sun8i_h3_ths_calibrate(struct ths_device *tmdev, + u16 *caldata, int callen) +{ + int i; + + if (!caldata[0] || callen < 2 * tmdev->chip->sensor_num) + return -EINVAL; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + int offset = (i % 2) << 4; + + regmap_update_bits(tmdev->regmap, + SUN8I_THS_TEMP_CALIB + (4 * (i >> 1)), + 0xfff << offset, + caldata[i] << offset); + } + + return 0; +} + +static int sun50i_h6_ths_calibrate(struct ths_device *tmdev, + u16 *caldata, int callen) +{ + struct device *dev = tmdev->dev; + int i, ft_temp; + + if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) + return -EINVAL; + + /* + * efuse layout: + * + * 0 11 16 32 + * +-------+-------+-------+ + * |temp| |sensor0|sensor1| + * +-------+-------+-------+ + * + * The calibration data on the H6 is the ambient temperature and + * sensor values that are filled during the factory test stage. + * + * The unit of stored FT temperature is 0.1 degreee celusis. + * + * We need to calculate a delta between measured and caluclated + * register values and this will become a calibration offset. + */ + ft_temp = (caldata[0] & FT_TEMP_MASK) * 100; + tmdev->cp_ft_flag = (caldata[0] & THS_EFUSE_CP_FT_MASK) + >> THS_EFUSE_CP_FT_BIT; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + int sensor_reg = caldata[i + 1]; + int cdata, offset; + int sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg); + + /* + * Calibration data is CALIBRATE_DEFAULT - (calculated + * temperature from sensor reading at factory temperature + * minus actual factory temperature) * 14.88 (scale from + * temperature to register values) + */ + cdata = CALIBRATE_DEFAULT - + ((sensor_temp - ft_temp) * 10 / tmdev->chip->scale); + if (cdata & ~TEMP_CALIB_MASK) { + /* + * Calibration value more than 12-bit, but calibration + * register is 12-bit. In this case, ths hardware can + * still work without calibration, although the data + * won't be so accurate. + */ + dev_warn(dev, "sensor%d is not calibrated.\n", i); + continue; + } + + offset = (i % 2) * 16; + regmap_update_bits(tmdev->regmap, + SUN50I_H6_THS_TEMP_CALIB + (i / 2 * 4), + 0xfff << offset, + cdata << offset); + } + + return 0; +} + +static int sun8i_ths_calibrate(struct ths_device *tmdev) +{ + struct nvmem_cell *calcell; + struct device *dev = tmdev->dev; + u16 *caldata; + size_t callen; + int ret = 0; + + calcell = devm_nvmem_cell_get(dev, "calibration"); + if (IS_ERR(calcell)) { + if (PTR_ERR(calcell) == -EPROBE_DEFER) + return -EPROBE_DEFER; + /* + * Even if the external calibration data stored in sid is + * not accessible, the THS hardware can still work, although + * the data won't be so accurate. + * + * The default value of calibration register is 0x800 for + * every sensor, and the calibration value is usually 0x7xx + * or 0x8xx, so they won't be away from the default value + * for a lot. + * + * So here we do not return error if the calibartion data is + * not available, except the probe needs deferring. + */ + goto out; + } + + caldata = nvmem_cell_read(calcell, &callen); + if (IS_ERR(caldata)) { + ret = PTR_ERR(caldata); + goto out; + } + + tmdev->chip->calibrate(tmdev, caldata, callen); + + kfree(caldata); +out: + return ret; +} + +static int sun8i_ths_resource_init(struct ths_device *tmdev) +{ + struct device *dev = tmdev->dev; + struct platform_device *pdev = to_platform_device(dev); + void __iomem *base; + int ret; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + tmdev->regmap = devm_regmap_init_mmio(dev, base, &config); + if (IS_ERR(tmdev->regmap)) + return PTR_ERR(tmdev->regmap); + + if (tmdev->chip->has_bus_clk_reset) { + tmdev->reset = devm_reset_control_get(dev, 0); + if (IS_ERR(tmdev->reset)) + return PTR_ERR(tmdev->reset); + + tmdev->bus_clk = devm_clk_get(&pdev->dev, "bus"); + if (IS_ERR(tmdev->bus_clk)) + return PTR_ERR(tmdev->bus_clk); + } + + if (tmdev->chip->has_mod_clk) { + tmdev->mod_clk = devm_clk_get(&pdev->dev, "mod"); + if (IS_ERR(tmdev->mod_clk)) + return PTR_ERR(tmdev->mod_clk); + } + + ret = reset_control_deassert(tmdev->reset); + if (ret) + return ret; + + ret = clk_prepare_enable(tmdev->bus_clk); + if (ret) + goto assert_reset; + + ret = clk_set_rate(tmdev->mod_clk, 24000000); + if (ret) + goto bus_disable; + + ret = clk_prepare_enable(tmdev->mod_clk); + if (ret) + goto bus_disable; + + ret = sun8i_ths_calibrate(tmdev); + if (ret) + goto mod_disable; + + return 0; + +mod_disable: + clk_disable_unprepare(tmdev->mod_clk); +bus_disable: + clk_disable_unprepare(tmdev->bus_clk); +assert_reset: + reset_control_assert(tmdev->reset); + + return ret; +} + +static int sun8i_h3_thermal_init(struct ths_device *tmdev) +{ + int val; + + /* average over 4 samples */ + regmap_write(tmdev->regmap, SUN8I_THS_MFC, + SUN50I_THS_FILTER_EN | + SUN50I_THS_FILTER_TYPE(1)); + /* + * clkin = 24MHz + * filter_samples = 4 + * period = 0.25s + * + * x = period * clkin / 4096 / filter_samples - 1 + * = 365 + */ + val = GENMASK(7 + tmdev->chip->sensor_num, 8); + regmap_write(tmdev->regmap, SUN8I_THS_IC, + SUN50I_H6_THS_PC_TEMP_PERIOD(365) | val); + /* + * T_acq = 20us + * clkin = 24MHz + * + * x = T_acq * clkin - 1 + * = 479 + */ + regmap_write(tmdev->regmap, SUN8I_THS_CTRL0, + SUN8I_THS_CTRL0_T_ACQ0(479)); + val = GENMASK(tmdev->chip->sensor_num - 1, 0); + regmap_write(tmdev->regmap, SUN8I_THS_CTRL2, + SUN8I_THS_CTRL2_T_ACQ1(479) | val); + + return 0; +} + +/* + * Without this undocummented value, the returned temperatures would + * be higher than real ones by about 20C. + */ +#define SUN50I_H6_CTRL0_UNK 0x0000002f + +static int sun50i_h6_thermal_init(struct ths_device *tmdev) +{ + int val; + + /* + * T_acq = 20us + * clkin = 24MHz + * + * x = T_acq * clkin - 1 + * = 479 + */ + regmap_write(tmdev->regmap, SUN50I_THS_CTRL0, + SUN50I_H6_CTRL0_UNK | SUN50I_THS_CTRL0_T_ACQ(479)); + /* average over 4 samples */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC, + SUN50I_THS_FILTER_EN | + SUN50I_THS_FILTER_TYPE(1)); + /* + * clkin = 24MHz + * filter_samples = 4 + * period = 0.25s + * + * x = period * clkin / 4096 / filter_samples - 1 + * = 365 + */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_PC, + SUN50I_H6_THS_PC_TEMP_PERIOD(365)); + /* enable sensor */ + val = GENMASK(tmdev->chip->sensor_num - 1, 0); + regmap_write(tmdev->regmap, SUN50I_H6_THS_ENABLE, val); + /* thermal data interrupt enable */ + val = GENMASK(tmdev->chip->sensor_num - 1, 0); + regmap_write(tmdev->regmap, SUN50I_H6_THS_DIC, val); + + return 0; +} + +static int sun8i_ths_register(struct ths_device *tmdev) +{ + int i; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + tmdev->sensor[i].tmdev = tmdev; + tmdev->sensor[i].id = i; + tmdev->sensor[i].tzd = + devm_thermal_zone_of_sensor_register(tmdev->dev, + i, + &tmdev->sensor[i], + &ths_ops); + if (IS_ERR(tmdev->sensor[i].tzd)) + return PTR_ERR(tmdev->sensor[i].tzd); + } + + return 0; +} + +static int sun8i_ths_probe(struct platform_device *pdev) +{ + struct ths_device *tmdev; + struct device *dev = &pdev->dev; + int ret, irq; + + tmdev = devm_kzalloc(dev, sizeof(*tmdev), GFP_KERNEL); + if (!tmdev) + return -ENOMEM; + + tmdev->dev = dev; + tmdev->chip = of_device_get_match_data(&pdev->dev); + if (!tmdev->chip) + return -EINVAL; + + platform_set_drvdata(pdev, tmdev); + + ret = sun8i_ths_resource_init(tmdev); + if (ret) + return ret; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = tmdev->chip->init(tmdev); + if (ret) + return ret; + + ret = sun8i_ths_register(tmdev); + if (ret) + return ret; + + /* + * Avoid entering the interrupt handler, the thermal device is not + * registered yet, we deffer the registration of the interrupt to + * the end. + */ + ret = devm_request_threaded_irq(dev, irq, NULL, + sun8i_irq_thread, + IRQF_ONESHOT, "ths", tmdev); + if (ret) + return ret; + + return 0; +} + +static int sun8i_ths_remove(struct platform_device *pdev) +{ + struct ths_device *tmdev = platform_get_drvdata(pdev); + + clk_disable_unprepare(tmdev->mod_clk); + clk_disable_unprepare(tmdev->bus_clk); + reset_control_assert(tmdev->reset); + + return 0; +} + +static const struct ths_thermal_chip sun8i_a83t_ths = { + .sensor_num = 3, + .scale = 705, + .offset = 191668, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, + .calc_temp = sun8i_ths_calc_temp, +}; + +static const struct ths_thermal_chip sun8i_h3_ths = { + .sensor_num = 1, + .scale = 1211, + .offset = 217000, + .has_mod_clk = true, + .has_bus_clk_reset = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, + .calc_temp = sun8i_ths_calc_temp, +}; + +static const struct ths_thermal_chip sun8i_r40_ths = { + .sensor_num = 3, + .offset = 251086, + .scale = 1130, + .has_mod_clk = true, + .has_bus_clk_reset = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, + .calc_temp = sun8i_ths_calc_temp, +}; + +static const struct ths_thermal_chip sun50i_a64_ths = { + .sensor_num = 3, + .offset = 253890, + .scale = 1170, + .has_mod_clk = true, + .has_bus_clk_reset = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, + .calc_temp = sun8i_ths_calc_temp, +}; + +static const struct ths_thermal_chip sun50i_h5_ths = { + .sensor_num = 2, + .has_mod_clk = true, + .has_bus_clk_reset = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, + .calc_temp = sun50i_h5_calc_temp, +}; + +static const struct ths_thermal_chip sun50i_h6_ths = { + .sensor_num = 2, + .has_bus_clk_reset = true, + .ft_deviation = 7000, + .offset = 187744, + .scale = 672, + .temp_data_base = SUN50I_H6_THS_TEMP_DATA, + .calibrate = sun50i_h6_ths_calibrate, + .init = sun50i_h6_thermal_init, + .irq_ack = sun50i_h6_irq_ack, + .calc_temp = sun8i_ths_calc_temp, +}; + +static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths }, + { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, + { .compatible = "allwinner,sun8i-r40-ths", .data = &sun8i_r40_ths }, + { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths }, + { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, + { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, of_ths_match); + +static struct platform_driver ths_driver = { + .probe = sun8i_ths_probe, + .remove = sun8i_ths_remove, + .driver = { + .name = "sun8i-thermal", + .of_match_table = of_ths_match, + }, +}; +module_platform_driver(ths_driver); + +MODULE_DESCRIPTION("Thermal sensor driver for Allwinner SOC"); +MODULE_LICENSE("GPL v2"); -- 2.24.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 1/7] thermal: sun8i: add thermal driver for H6/H5/H3/A64/A83T/R40 Vasily Khoruzhick @ 2019-12-18 4:21 ` Vasily Khoruzhick 2019-12-18 22:00 ` Maxime Ripard 2019-12-18 4:21 ` [PATCH v7 3/7] ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones Vasily Khoruzhick ` (4 subsequent siblings) 6 siblings, 1 reply; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick From: Yangtao Li <tiny.windzz@gmail.com> sun8i-thermal driver supports thermal sensor in wide range of Allwinner SoCs. Add YAML schema for its bindings. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- .../thermal/allwinner,sun8i-a83t-ths.yaml | 146 ++++++++++++++++++ 1 file changed, 146 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml new file mode 100644 index 000000000000..8768c2450633 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml @@ -0,0 +1,146 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner SUN8I Thermal Controller Device Tree Bindings + +maintainers: + - Yangtao Li <tiny.windzz@gmail.com> + +properties: + compatible: + enum: + - allwinner,sun8i-a83t-ths + - allwinner,sun8i-h3-ths + - allwinner,sun8i-r40-ths + - allwinner,sun50i-a64-ths + - allwinner,sun50i-h5-ths + - allwinner,sun50i-h6-ths + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + nvmem-cells: + maxItems: 1 + description: Calibration data for thermal sensors + + nvmem-cell-names: + const: calibration + +allOf: + - if: + properties: + compatible: + contains: + const: allwinner,sun50i-h6-ths + + then: + properties: + clocks: + minItems: 1 + maxItems: 1 + + clock-names: + minItems: 1 + maxItems: 1 + items: + - const: bus + + else: + properties: + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + items: + - const: bus + - const: mod + + - if: + properties: + compatible: + contains: + const: allwinner,sun8i-h3-ths + + then: + properties: + "#thermal-sensor-cells": + const: 0 + + else: + properties: + "#thermal-sensor-cells": + const: 1 + + - if: + properties: + compatible: + contains: + enum: + - const: allwinner,sun8i-h3-ths + - const: allwinner,sun8i-r40-ths + - const: allwinner,sun50i-a64-ths + - const: allwinner,sun50i-h5-ths + - const: allwinner,sun50i-h6-ths + + then: + required: + - clocks + - clock-names + - resets + +required: + - compatible + - reg + - interrupts + - '#thermal-sensor-cells' + +examples: + - | + thermal-sensor@1f04000 { + compatible = "allwinner,sun8i-a83t-ths"; + reg = <0x01f04000 0x100>; + interrupts = <0 31 0>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + + - | + thermal-sensor@1c25000 { + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>; + clocks = <&ccu 0>, <&ccu 1>; + clock-names = "bus", "mod"; + resets = <&ccu 2>; + interrupts = <0 31 0>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <0>; + }; + + - | + thermal-sensor@5070400 { + compatible = "allwinner,sun50i-h6-ths"; + reg = <0x05070400 0x100>; + clocks = <&ccu 0>; + clock-names = "bus"; + resets = <&ccu 2>; + interrupts = <0 15 0>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + +... -- 2.24.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings 2019-12-18 4:21 ` [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings Vasily Khoruzhick @ 2019-12-18 22:00 ` Maxime Ripard 2019-12-18 22:27 ` Vasily Khoruzhick 0 siblings, 1 reply; 16+ messages in thread From: Maxime Ripard @ 2019-12-18 22:00 UTC (permalink / raw) To: Vasily Khoruzhick Cc: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel [-- Attachment #1: Type: text/plain, Size: 4263 bytes --] Hi, On Tue, Dec 17, 2019 at 08:21:16PM -0800, Vasily Khoruzhick wrote: > From: Yangtao Li <tiny.windzz@gmail.com> > > sun8i-thermal driver supports thermal sensor in wide range of Allwinner > SoCs. Add YAML schema for its bindings. > > Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > --- > .../thermal/allwinner,sun8i-a83t-ths.yaml | 146 ++++++++++++++++++ > 1 file changed, 146 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > new file mode 100644 > index 000000000000..8768c2450633 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > @@ -0,0 +1,146 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Allwinner SUN8I Thermal Controller Device Tree Bindings > + > +maintainers: > + - Yangtao Li <tiny.windzz@gmail.com> > + > +properties: > + compatible: > + enum: > + - allwinner,sun8i-a83t-ths > + - allwinner,sun8i-h3-ths > + - allwinner,sun8i-r40-ths > + - allwinner,sun50i-a64-ths > + - allwinner,sun50i-h5-ths > + - allwinner,sun50i-h6-ths > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + nvmem-cells: > + maxItems: 1 > + description: Calibration data for thermal sensors > + > + nvmem-cell-names: > + const: calibration > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: allwinner,sun50i-h6-ths > + > + then: > + properties: > + clocks: > + minItems: 1 > + maxItems: 1 When minItems and maxItems are equal, you can only set one, the other will be filled automatically. > + > + clock-names: > + minItems: 1 > + maxItems: 1 > + items: > + - const: bus And this can even be just clock-names: const: bus > + > + else: > + properties: > + clocks: > + minItems: 1 > + maxItems: 2 > + > + clock-names: > + minItems: 1 > + maxItems: 2 > + items: > + - const: bus > + - const: mod I'm not sure why you need the minItems set to 1 here though? it's always 2 for the !H6 case, right? if so, then we should even do something like: properties: ... # This is needed because we will need to check both the H6 and !H6 # case, and it must validate. So we make sure we match against the # union of both cases. clocks: minItems: 1 maxItems: 2 items: - description: Bus Clock - description: Module Clock # Same story here clock-names: minItems: 1 maxItems: 2 items: - const: bus - const: mod allOf: - if: properties: compatible: contains: const: allwinner,sun50i-h6-ths # Here we validate in the H6 case we only have one clock then: properties: clocks: maxItems: 1 clock-names: maxItems: 1 # and here that in the other case we have two clocks, the names # being validated by the schema above else: properties: clocks: maxItems: 2 clock-names: maxItems: 2 # And now we can set this since all our properties will have been # expressed in the upper level schema additionalProperties: false > + > + - if: > + properties: > + compatible: > + contains: > + const: allwinner,sun8i-h3-ths > + > + then: > + properties: > + "#thermal-sensor-cells": > + const: 0 > + > + else: > + properties: > + "#thermal-sensor-cells": > + const: 1 Same thing here, you should have an enum accepting both values in the upper schema, the condition here only making further checks. Also, in the case where #thermal-sensor-cells is one, then you need to document what that argument is. Thanks! Maxime [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings 2019-12-18 22:00 ` Maxime Ripard @ 2019-12-18 22:27 ` Vasily Khoruzhick 2019-12-19 9:12 ` Maxime Ripard 0 siblings, 1 reply; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 22:27 UTC (permalink / raw) To: Maxime Ripard Cc: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, Linux PM, devicetree, arm-linux, Ondřej Jirman, linux-kernel On Wed, Dec 18, 2019 at 2:00 PM Maxime Ripard <mripard@kernel.org> wrote: > > Hi, > > On Tue, Dec 17, 2019 at 08:21:16PM -0800, Vasily Khoruzhick wrote: > > From: Yangtao Li <tiny.windzz@gmail.com> > > > > sun8i-thermal driver supports thermal sensor in wide range of Allwinner > > SoCs. Add YAML schema for its bindings. > > > > Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > > --- > > .../thermal/allwinner,sun8i-a83t-ths.yaml | 146 ++++++++++++++++++ > > 1 file changed, 146 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > > > diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > new file mode 100644 > > index 000000000000..8768c2450633 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > @@ -0,0 +1,146 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Allwinner SUN8I Thermal Controller Device Tree Bindings > > + > > +maintainers: > > + - Yangtao Li <tiny.windzz@gmail.com> > > + > > +properties: > > + compatible: > > + enum: > > + - allwinner,sun8i-a83t-ths > > + - allwinner,sun8i-h3-ths > > + - allwinner,sun8i-r40-ths > > + - allwinner,sun50i-a64-ths > > + - allwinner,sun50i-h5-ths > > + - allwinner,sun50i-h6-ths > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + > > + nvmem-cells: > > + maxItems: 1 > > + description: Calibration data for thermal sensors > > + > > + nvmem-cell-names: > > + const: calibration > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: allwinner,sun50i-h6-ths > > + > > + then: > > + properties: > > + clocks: > > + minItems: 1 > > + maxItems: 1 > > When minItems and maxItems are equal, you can only set one, the other > will be filled automatically. Is it documented anywhere? I have a feeling like I'm shooting in the dark. So far I've read Documentation/devicetree/writing-schema.rst, Documentation/devicetree/bindings/example-schema.yaml and few other schemas for inspiration but yet I don't have solid understanding how it's supposed to be written. Examples are pretty scarce and figuring out why certain construction doesn't work is pretty tricky. > > + > > + clock-names: > > + minItems: 1 > > + maxItems: 1 > > + items: > > + - const: bus > > And this can even be just > > clock-names: > const: bus OK > > + > > + else: > > + properties: > > + clocks: > > + minItems: 1 > > + maxItems: 2 > > + > > + clock-names: > > + minItems: 1 > > + maxItems: 2 > > + items: > > + - const: bus > > + - const: mod > > I'm not sure why you need the minItems set to 1 here though? > > it's always 2 for the !H6 case, right? > > if so, then we should even do something like: > > properties: > ... > > # This is needed because we will need to check both the H6 and !H6 > # case, and it must validate. So we make sure we match against the > # union of both cases. > clocks: > minItems: 1 > maxItems: 2 > items: > - description: Bus Clock > - description: Module Clock > > # Same story here > clock-names: > minItems: 1 > maxItems: 2 > items: > - const: bus > - const: mod > > allOf: > - if: > properties: > compatible: > contains: > const: allwinner,sun50i-h6-ths > > # Here we validate in the H6 case we only have one clock > then: > properties: > clocks: > maxItems: 1 > > clock-names: > maxItems: 1 > > # and here that in the other case we have two clocks, the names > # being validated by the schema above > else: > properties: > clocks: > maxItems: 2 > > clock-names: > maxItems: 2 > > # And now we can set this since all our properties will have been > # expressed in the upper level schema > additionalProperties: false OK > > + > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: allwinner,sun8i-h3-ths > > + > > + then: > > + properties: > > + "#thermal-sensor-cells": > > + const: 0 > > + > > + else: > > + properties: > > + "#thermal-sensor-cells": > > + const: 1 > > Same thing here, you should have an enum accepting both values in the > upper schema, the condition here only making further checks. Also, in > the case where #thermal-sensor-cells is one, then you need to document > what that argument is. OK > > Thanks! > Maxime ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings 2019-12-18 22:27 ` Vasily Khoruzhick @ 2019-12-19 9:12 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2019-12-19 9:12 UTC (permalink / raw) To: Vasily Khoruzhick Cc: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, Linux PM, devicetree, arm-linux, Ondřej Jirman, linux-kernel [-- Attachment #1: Type: text/plain, Size: 3318 bytes --] On Wed, Dec 18, 2019 at 02:27:00PM -0800, Vasily Khoruzhick wrote: > On Wed, Dec 18, 2019 at 2:00 PM Maxime Ripard <mripard@kernel.org> wrote: > > On Tue, Dec 17, 2019 at 08:21:16PM -0800, Vasily Khoruzhick wrote: > > > From: Yangtao Li <tiny.windzz@gmail.com> > > > > > > sun8i-thermal driver supports thermal sensor in wide range of Allwinner > > > SoCs. Add YAML schema for its bindings. > > > > > > Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> > > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > > > --- > > > .../thermal/allwinner,sun8i-a83t-ths.yaml | 146 ++++++++++++++++++ > > > 1 file changed, 146 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > > new file mode 100644 > > > index 000000000000..8768c2450633 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml > > > @@ -0,0 +1,146 @@ > > > +# SPDX-License-Identifier: GPL-2.0 > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Allwinner SUN8I Thermal Controller Device Tree Bindings > > > + > > > +maintainers: > > > + - Yangtao Li <tiny.windzz@gmail.com> > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - allwinner,sun8i-a83t-ths > > > + - allwinner,sun8i-h3-ths > > > + - allwinner,sun8i-r40-ths > > > + - allwinner,sun50i-a64-ths > > > + - allwinner,sun50i-h5-ths > > > + - allwinner,sun50i-h6-ths > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + interrupts: > > > + maxItems: 1 > > > + > > > + resets: > > > + maxItems: 1 > > > + > > > + nvmem-cells: > > > + maxItems: 1 > > > + description: Calibration data for thermal sensors > > > + > > > + nvmem-cell-names: > > > + const: calibration > > > + > > > +allOf: > > > + - if: > > > + properties: > > > + compatible: > > > + contains: > > > + const: allwinner,sun50i-h6-ths > > > + > > > + then: > > > + properties: > > > + clocks: > > > + minItems: 1 > > > + maxItems: 1 > > > > When minItems and maxItems are equal, you can only set one, the other > > will be filled automatically. > > Is it documented anywhere? I have a feeling like I'm shooting in the > dark. So far I've read Documentation/devicetree/writing-schema.rst, > Documentation/devicetree/bindings/example-schema.yaml and few other > schemas for inspiration but yet I don't have solid understanding how > it's supposed to be written. Examples are pretty scarce and figuring > out why certain construction doesn't work is pretty tricky. It's somewhat documented with https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/example-schema.yaml#n80 and https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/example-schema.yaml#n102 But I guess it wasn't clear enough? Feel free to update it to something that would be better Maxime [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v7 3/7] ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 1/7] thermal: sun8i: add thermal driver for H6/H5/H3/A64/A83T/R40 Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings Vasily Khoruzhick @ 2019-12-18 4:21 ` Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 4/7] ARM: dts: sun8i-h3: " Vasily Khoruzhick ` (3 subsequent siblings) 6 siblings, 0 replies; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick From: Ondrej Jirman <megous@megous.com> There are three sensors, two for each CPU cluster, one for GPU. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 36 +++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 53c38deb8a08..93a6df11cb18 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -50,6 +50,7 @@ #include <dt-bindings/reset/sun8i-a83t-ccu.h> #include <dt-bindings/reset/sun8i-de2.h> #include <dt-bindings/reset/sun8i-r-ccu.h> +#include <dt-bindings/thermal/thermal.h> / { interrupt-parent = <&gic>; @@ -581,6 +582,12 @@ mmc2: mmc@1c11000 { sid: eeprom@1c14000 { compatible = "allwinner,sun8i-a83t-sid"; reg = <0x1c14000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@34 { + reg = <0x34 8>; + }; }; crypto: crypto@1c15000 { @@ -1165,5 +1172,34 @@ r_rsb: rsb@1f03400 { #address-cells = <1>; #size-cells = <0>; }; + + ths: thermal-sensor@1f04000 { + compatible = "allwinner,sun8i-a83t-ths"; + reg = <0x01f04000 0x100>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; + }; + + cpu1_thermal: cpu1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 2>; + }; }; }; -- 2.24.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v7 4/7] ARM: dts: sun8i-h3: Add thermal sensor and thermal zones 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick ` (2 preceding siblings ...) 2019-12-18 4:21 ` [PATCH v7 3/7] ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones Vasily Khoruzhick @ 2019-12-18 4:21 ` Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 5/7] arm64: dts: allwinner: h5: " Vasily Khoruzhick ` (2 subsequent siblings) 6 siblings, 0 replies; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick From: Ondrej Jirman <megous@megous.com> There is just one sensor for the CPU. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 20 ++++++++++++++++++++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index fe773c72a69b..be8f601ab8cf 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -199,6 +199,26 @@ mali: gpu@1c40000 { assigned-clocks = <&ccu CLK_GPU>; assigned-clock-rates = <384000000>; }; + + ths: thermal-sensor@1c25000 { + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ccu RST_BUS_THS>; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "bus", "mod"; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <0>; + }; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; + }; }; }; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 0afea59486c2..6e68ed831015 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -231,6 +231,12 @@ mmc2: mmc@1c11000 { sid: eeprom@1c14000 { /* compatible is in per SoC .dtsi file */ reg = <0x1c14000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@34 { + reg = <0x34 4>; + }; }; usb_otg: usb@1c19000 { -- 2.24.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v7 5/7] arm64: dts: allwinner: h5: Add thermal sensor and thermal zones 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick ` (3 preceding siblings ...) 2019-12-18 4:21 ` [PATCH v7 4/7] ARM: dts: sun8i-h3: " Vasily Khoruzhick @ 2019-12-18 4:21 ` Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 6/7] arm64: dts: allwinner: h6: " Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 7/7] arm64: dts: allwinner: a64: Add thermal sensors " Vasily Khoruzhick 6 siblings, 0 replies; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick From: Ondrej Jirman <megous@megous.com> There are two sensors, one for CPU, one for GPU. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 26 ++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index e92c4de5bf3b..f9df95b2d542 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -176,6 +176,32 @@ mali: gpu@1e80000 { assigned-clocks = <&ccu CLK_GPU>; assigned-clock-rates = <384000000>; }; + + ths: thermal-sensor@1c25000 { + compatible = "allwinner,sun50i-h5-ths"; + reg = <0x01c25000 0x400>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ccu RST_BUS_THS>; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "bus", "mod"; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; + }; + + gpu_thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + }; }; }; -- 2.24.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v7 6/7] arm64: dts: allwinner: h6: Add thermal sensor and thermal zones 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick ` (4 preceding siblings ...) 2019-12-18 4:21 ` [PATCH v7 5/7] arm64: dts: allwinner: h5: " Vasily Khoruzhick @ 2019-12-18 4:21 ` Vasily Khoruzhick 2019-12-18 4:32 ` Chen-Yu Tsai 2019-12-18 4:21 ` [PATCH v7 7/7] arm64: dts: allwinner: a64: Add thermal sensors " Vasily Khoruzhick 6 siblings, 1 reply; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick From: Ondrej Jirman <megous@megous.com> There are two sensors, one for CPU, one for GPU. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 ++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 29824081b43b..cdcb1a36301a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/reset/sun50i-h6-ccu.h> #include <dt-bindings/reset/sun50i-h6-r-ccu.h> #include <dt-bindings/reset/sun8i-de2.h> +#include <dt-bindings/thermal/thermal.h> / { interrupt-parent = <&gic>; @@ -233,6 +234,12 @@ dma: dma-controller@3002000 { sid: efuse@3006000 { compatible = "allwinner,sun50i-h6-sid"; reg = <0x03006000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@14 { + reg = <0x14 0x6>; + }; }; watchdog: watchdog@30090a0 { @@ -856,5 +863,31 @@ r_i2c: i2c@7081400 { #address-cells = <1>; #size-cells = <0>; }; + + ths: thermal-sensor@5070400 { + compatible = "allwinner,sun50i-h6-ths"; + reg = <0x05070400 0x100>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; + }; + + gpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + }; }; }; -- 2.24.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v7 6/7] arm64: dts: allwinner: h6: Add thermal sensor and thermal zones 2019-12-18 4:21 ` [PATCH v7 6/7] arm64: dts: allwinner: h6: " Vasily Khoruzhick @ 2019-12-18 4:32 ` Chen-Yu Tsai 2019-12-18 23:18 ` Vasily Khoruzhick 0 siblings, 1 reply; 16+ messages in thread From: Chen-Yu Tsai @ 2019-12-18 4:32 UTC (permalink / raw) To: Vasily Khoruzhick Cc: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, open list:THERMAL, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel On Wed, Dec 18, 2019 at 12:22 PM Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > From: Ondrej Jirman <megous@megous.com> > > There are two sensors, one for CPU, one for GPU. > > Signed-off-by: Ondrej Jirman <megous@megous.com> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > --- > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 ++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > index 29824081b43b..cdcb1a36301a 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > @@ -11,6 +11,7 @@ > #include <dt-bindings/reset/sun50i-h6-ccu.h> > #include <dt-bindings/reset/sun50i-h6-r-ccu.h> > #include <dt-bindings/reset/sun8i-de2.h> > +#include <dt-bindings/thermal/thermal.h> > > / { > interrupt-parent = <&gic>; > @@ -233,6 +234,12 @@ dma: dma-controller@3002000 { > sid: efuse@3006000 { > compatible = "allwinner,sun50i-h6-sid"; > reg = <0x03006000 0x400>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + ths_calibration: thermal-sensor-calibration@14 { > + reg = <0x14 0x6>; Nit: my preference is to use words as the smallest increment, so this would have a size of 8 instead of 6. Same goes for the A64 dts. AFAICT this doesn't impact the driver in any way. ChenYu > + }; > }; > > watchdog: watchdog@30090a0 { > @@ -856,5 +863,31 @@ r_i2c: i2c@7081400 { > #address-cells = <1>; > #size-cells = <0>; > }; > + > + ths: thermal-sensor@5070400 { > + compatible = "allwinner,sun50i-h6-ths"; > + reg = <0x05070400 0x100>; > + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_THS>; > + clock-names = "bus"; > + resets = <&ccu RST_BUS_THS>; > + nvmem-cells = <&ths_calibration>; > + nvmem-cell-names = "calibration"; > + #thermal-sensor-cells = <1>; > + }; > + }; > + > + thermal-zones { > + cpu-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&ths 0>; > + }; > + > + gpu-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&ths 1>; > + }; > }; > }; > -- > 2.24.1 > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v7 6/7] arm64: dts: allwinner: h6: Add thermal sensor and thermal zones 2019-12-18 4:32 ` Chen-Yu Tsai @ 2019-12-18 23:18 ` Vasily Khoruzhick 2019-12-19 1:03 ` Ondřej Jirman 0 siblings, 1 reply; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 23:18 UTC (permalink / raw) To: Chen-Yu Tsai Cc: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, open list:THERMAL, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel On Tue, Dec 17, 2019 at 8:32 PM Chen-Yu Tsai <wens@csie.org> wrote: > > On Wed, Dec 18, 2019 at 12:22 PM Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > > > From: Ondrej Jirman <megous@megous.com> > > > > There are two sensors, one for CPU, one for GPU. > > > > Signed-off-by: Ondrej Jirman <megous@megous.com> > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > > --- > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 ++++++++++++++++++++ > > 1 file changed, 33 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > index 29824081b43b..cdcb1a36301a 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > @@ -11,6 +11,7 @@ > > #include <dt-bindings/reset/sun50i-h6-ccu.h> > > #include <dt-bindings/reset/sun50i-h6-r-ccu.h> > > #include <dt-bindings/reset/sun8i-de2.h> > > +#include <dt-bindings/thermal/thermal.h> > > > > / { > > interrupt-parent = <&gic>; > > @@ -233,6 +234,12 @@ dma: dma-controller@3002000 { > > sid: efuse@3006000 { > > compatible = "allwinner,sun50i-h6-sid"; > > reg = <0x03006000 0x400>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + ths_calibration: thermal-sensor-calibration@14 { > > + reg = <0x14 0x6>; > > Nit: my preference is to use words as the smallest increment, so this > would have a size of 8 instead of 6. Same goes for the A64 dts. > > AFAICT this doesn't impact the driver in any way. H6 has only 2 sensors, so it should be 4. That's my overlook, I'll change it to 4 for H6 and to 8 for A64. > > ChenYu > > > > + }; > > }; > > > > watchdog: watchdog@30090a0 { > > @@ -856,5 +863,31 @@ r_i2c: i2c@7081400 { > > #address-cells = <1>; > > #size-cells = <0>; > > }; > > + > > + ths: thermal-sensor@5070400 { > > + compatible = "allwinner,sun50i-h6-ths"; > > + reg = <0x05070400 0x100>; > > + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_THS>; > > + clock-names = "bus"; > > + resets = <&ccu RST_BUS_THS>; > > + nvmem-cells = <&ths_calibration>; > > + nvmem-cell-names = "calibration"; > > + #thermal-sensor-cells = <1>; > > + }; > > + }; > > + > > + thermal-zones { > > + cpu-thermal { > > + polling-delay-passive = <0>; > > + polling-delay = <0>; > > + thermal-sensors = <&ths 0>; > > + }; > > + > > + gpu-thermal { > > + polling-delay-passive = <0>; > > + polling-delay = <0>; > > + thermal-sensors = <&ths 1>; > > + }; > > }; > > }; > > -- > > 2.24.1 > > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v7 6/7] arm64: dts: allwinner: h6: Add thermal sensor and thermal zones 2019-12-18 23:18 ` Vasily Khoruzhick @ 2019-12-19 1:03 ` Ondřej Jirman 2019-12-19 1:42 ` Vasily Khoruzhick 0 siblings, 1 reply; 16+ messages in thread From: Ondřej Jirman @ 2019-12-19 1:03 UTC (permalink / raw) To: Vasily Khoruzhick Cc: Chen-Yu Tsai, Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, open list:THERMAL, devicetree, linux-arm-kernel, linux-kernel On Wed, Dec 18, 2019 at 03:18:51PM -0800, Vasily Khoruzhick wrote: > On Tue, Dec 17, 2019 at 8:32 PM Chen-Yu Tsai <wens@csie.org> wrote: > > > > On Wed, Dec 18, 2019 at 12:22 PM Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > > > > > From: Ondrej Jirman <megous@megous.com> > > > > > > There are two sensors, one for CPU, one for GPU. > > > > > > Signed-off-by: Ondrej Jirman <megous@megous.com> > > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > > > --- > > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 ++++++++++++++++++++ > > > 1 file changed, 33 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > index 29824081b43b..cdcb1a36301a 100644 > > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > @@ -11,6 +11,7 @@ > > > #include <dt-bindings/reset/sun50i-h6-ccu.h> > > > #include <dt-bindings/reset/sun50i-h6-r-ccu.h> > > > #include <dt-bindings/reset/sun8i-de2.h> > > > +#include <dt-bindings/thermal/thermal.h> > > > > > > / { > > > interrupt-parent = <&gic>; > > > @@ -233,6 +234,12 @@ dma: dma-controller@3002000 { > > > sid: efuse@3006000 { > > > compatible = "allwinner,sun50i-h6-sid"; > > > reg = <0x03006000 0x400>; > > > + #address-cells = <1>; > > > + #size-cells = <1>; > > > + > > > + ths_calibration: thermal-sensor-calibration@14 { > > > + reg = <0x14 0x6>; > > > > Nit: my preference is to use words as the smallest increment, so this > > would have a size of 8 instead of 6. Same goes for the A64 dts. > > > > AFAICT this doesn't impact the driver in any way. > > H6 has only 2 sensors, so it should be 4. That's my overlook, I'll > change it to 4 for H6 and to 8 for A64. No it's correct. There's 2 bytes reference temperature and 2x 2 byte values for individual sensor calibration constants. regards, o. > > > > ChenYu > > > > > > > + }; > > > }; > > > > > > watchdog: watchdog@30090a0 { > > > @@ -856,5 +863,31 @@ r_i2c: i2c@7081400 { > > > #address-cells = <1>; > > > #size-cells = <0>; > > > }; > > > + > > > + ths: thermal-sensor@5070400 { > > > + compatible = "allwinner,sun50i-h6-ths"; > > > + reg = <0x05070400 0x100>; > > > + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > > > + clocks = <&ccu CLK_BUS_THS>; > > > + clock-names = "bus"; > > > + resets = <&ccu RST_BUS_THS>; > > > + nvmem-cells = <&ths_calibration>; > > > + nvmem-cell-names = "calibration"; > > > + #thermal-sensor-cells = <1>; > > > + }; > > > + }; > > > + > > > + thermal-zones { > > > + cpu-thermal { > > > + polling-delay-passive = <0>; > > > + polling-delay = <0>; > > > + thermal-sensors = <&ths 0>; > > > + }; > > > + > > > + gpu-thermal { > > > + polling-delay-passive = <0>; > > > + polling-delay = <0>; > > > + thermal-sensors = <&ths 1>; > > > + }; > > > }; > > > }; > > > -- > > > 2.24.1 > > > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v7 6/7] arm64: dts: allwinner: h6: Add thermal sensor and thermal zones 2019-12-19 1:03 ` Ondřej Jirman @ 2019-12-19 1:42 ` Vasily Khoruzhick 2019-12-19 2:59 ` Chen-Yu Tsai 0 siblings, 1 reply; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-19 1:42 UTC (permalink / raw) To: Vasily Khoruzhick, Chen-Yu Tsai, Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, open list:THERMAL, devicetree, linux-arm-kernel, linux-kernel On Wed, Dec 18, 2019 at 5:03 PM Ondřej Jirman <megous@megous.com> wrote: > > On Wed, Dec 18, 2019 at 03:18:51PM -0800, Vasily Khoruzhick wrote: > > On Tue, Dec 17, 2019 at 8:32 PM Chen-Yu Tsai <wens@csie.org> wrote: > > > > > > On Wed, Dec 18, 2019 at 12:22 PM Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > > > > > > > From: Ondrej Jirman <megous@megous.com> > > > > > > > > There are two sensors, one for CPU, one for GPU. > > > > > > > > Signed-off-by: Ondrej Jirman <megous@megous.com> > > > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > > > > --- > > > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 ++++++++++++++++++++ > > > > 1 file changed, 33 insertions(+) > > > > > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > > index 29824081b43b..cdcb1a36301a 100644 > > > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > > @@ -11,6 +11,7 @@ > > > > #include <dt-bindings/reset/sun50i-h6-ccu.h> > > > > #include <dt-bindings/reset/sun50i-h6-r-ccu.h> > > > > #include <dt-bindings/reset/sun8i-de2.h> > > > > +#include <dt-bindings/thermal/thermal.h> > > > > > > > > / { > > > > interrupt-parent = <&gic>; > > > > @@ -233,6 +234,12 @@ dma: dma-controller@3002000 { > > > > sid: efuse@3006000 { > > > > compatible = "allwinner,sun50i-h6-sid"; > > > > reg = <0x03006000 0x400>; > > > > + #address-cells = <1>; > > > > + #size-cells = <1>; > > > > + > > > > + ths_calibration: thermal-sensor-calibration@14 { > > > > + reg = <0x14 0x6>; > > > > > > Nit: my preference is to use words as the smallest increment, so this > > > would have a size of 8 instead of 6. Same goes for the A64 dts. > > > > > > AFAICT this doesn't impact the driver in any way. > > > > H6 has only 2 sensors, so it should be 4. That's my overlook, I'll > > change it to 4 for H6 and to 8 for A64. > > No it's correct. There's 2 bytes reference temperature and 2x 2 byte > values for individual sensor calibration constants. So it should be 8 if we round it up to word boundary? > regards, > o. > > > > > > > ChenYu > > > > > > > > > > + }; > > > > }; > > > > > > > > watchdog: watchdog@30090a0 { > > > > @@ -856,5 +863,31 @@ r_i2c: i2c@7081400 { > > > > #address-cells = <1>; > > > > #size-cells = <0>; > > > > }; > > > > + > > > > + ths: thermal-sensor@5070400 { > > > > + compatible = "allwinner,sun50i-h6-ths"; > > > > + reg = <0x05070400 0x100>; > > > > + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > > > > + clocks = <&ccu CLK_BUS_THS>; > > > > + clock-names = "bus"; > > > > + resets = <&ccu RST_BUS_THS>; > > > > + nvmem-cells = <&ths_calibration>; > > > > + nvmem-cell-names = "calibration"; > > > > + #thermal-sensor-cells = <1>; > > > > + }; > > > > + }; > > > > + > > > > + thermal-zones { > > > > + cpu-thermal { > > > > + polling-delay-passive = <0>; > > > > + polling-delay = <0>; > > > > + thermal-sensors = <&ths 0>; > > > > + }; > > > > + > > > > + gpu-thermal { > > > > + polling-delay-passive = <0>; > > > > + polling-delay = <0>; > > > > + thermal-sensors = <&ths 1>; > > > > + }; > > > > }; > > > > }; > > > > -- > > > > 2.24.1 > > > > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v7 6/7] arm64: dts: allwinner: h6: Add thermal sensor and thermal zones 2019-12-19 1:42 ` Vasily Khoruzhick @ 2019-12-19 2:59 ` Chen-Yu Tsai 0 siblings, 0 replies; 16+ messages in thread From: Chen-Yu Tsai @ 2019-12-19 2:59 UTC (permalink / raw) To: Vasily Khoruzhick Cc: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, open list:THERMAL, devicetree, linux-arm-kernel, linux-kernel On Thu, Dec 19, 2019 at 9:42 AM Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > On Wed, Dec 18, 2019 at 5:03 PM Ondřej Jirman <megous@megous.com> wrote: > > > > On Wed, Dec 18, 2019 at 03:18:51PM -0800, Vasily Khoruzhick wrote: > > > On Tue, Dec 17, 2019 at 8:32 PM Chen-Yu Tsai <wens@csie.org> wrote: > > > > > > > > On Wed, Dec 18, 2019 at 12:22 PM Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > > > > > > > > > From: Ondrej Jirman <megous@megous.com> > > > > > > > > > > There are two sensors, one for CPU, one for GPU. > > > > > > > > > > Signed-off-by: Ondrej Jirman <megous@megous.com> > > > > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > > > > > --- > > > > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 ++++++++++++++++++++ > > > > > 1 file changed, 33 insertions(+) > > > > > > > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > > > index 29824081b43b..cdcb1a36301a 100644 > > > > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > > > @@ -11,6 +11,7 @@ > > > > > #include <dt-bindings/reset/sun50i-h6-ccu.h> > > > > > #include <dt-bindings/reset/sun50i-h6-r-ccu.h> > > > > > #include <dt-bindings/reset/sun8i-de2.h> > > > > > +#include <dt-bindings/thermal/thermal.h> > > > > > > > > > > / { > > > > > interrupt-parent = <&gic>; > > > > > @@ -233,6 +234,12 @@ dma: dma-controller@3002000 { > > > > > sid: efuse@3006000 { > > > > > compatible = "allwinner,sun50i-h6-sid"; > > > > > reg = <0x03006000 0x400>; > > > > > + #address-cells = <1>; > > > > > + #size-cells = <1>; > > > > > + > > > > > + ths_calibration: thermal-sensor-calibration@14 { > > > > > + reg = <0x14 0x6>; > > > > > > > > Nit: my preference is to use words as the smallest increment, so this > > > > would have a size of 8 instead of 6. Same goes for the A64 dts. > > > > > > > > AFAICT this doesn't impact the driver in any way. > > > > > > H6 has only 2 sensors, so it should be 4. That's my overlook, I'll > > > change it to 4 for H6 and to 8 for A64. > > > > No it's correct. There's 2 bytes reference temperature and 2x 2 byte > > values for individual sensor calibration constants. > > So it should be 8 if we round it up to word boundary? That is correct. > > regards, > > o. > > > > > > > > > > ChenYu > > > > > > > > > > > > > + }; > > > > > }; > > > > > > > > > > watchdog: watchdog@30090a0 { > > > > > @@ -856,5 +863,31 @@ r_i2c: i2c@7081400 { > > > > > #address-cells = <1>; > > > > > #size-cells = <0>; > > > > > }; > > > > > + > > > > > + ths: thermal-sensor@5070400 { > > > > > + compatible = "allwinner,sun50i-h6-ths"; > > > > > + reg = <0x05070400 0x100>; > > > > > + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > > > > > + clocks = <&ccu CLK_BUS_THS>; > > > > > + clock-names = "bus"; > > > > > + resets = <&ccu RST_BUS_THS>; > > > > > + nvmem-cells = <&ths_calibration>; > > > > > + nvmem-cell-names = "calibration"; > > > > > + #thermal-sensor-cells = <1>; > > > > > + }; > > > > > + }; > > > > > + > > > > > + thermal-zones { > > > > > + cpu-thermal { > > > > > + polling-delay-passive = <0>; > > > > > + polling-delay = <0>; > > > > > + thermal-sensors = <&ths 0>; > > > > > + }; > > > > > + > > > > > + gpu-thermal { > > > > > + polling-delay-passive = <0>; > > > > > + polling-delay = <0>; > > > > > + thermal-sensors = <&ths 1>; > > > > > + }; > > > > > }; > > > > > }; > > > > > -- > > > > > 2.24.1 > > > > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v7 7/7] arm64: dts: allwinner: a64: Add thermal sensors and thermal zones 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick ` (5 preceding siblings ...) 2019-12-18 4:21 ` [PATCH v7 6/7] arm64: dts: allwinner: h6: " Vasily Khoruzhick @ 2019-12-18 4:21 ` Vasily Khoruzhick 6 siblings, 0 replies; 16+ messages in thread From: Vasily Khoruzhick @ 2019-12-18 4:21 UTC (permalink / raw) To: Yangtao Li, Zhang Rui, Daniel Lezcano, Amit Kucheria, Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai, Mauro Carvalho Chehab, David S. Miller, Greg Kroah-Hartman, linux-pm, devicetree, linux-arm-kernel, Ondřej Jirman, linux-kernel Cc: Vasily Khoruzhick A64 has 3 thermal sensors: 1 for CPU, 2 for GPU. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 27e48234f1c2..e6556c6d7777 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -49,6 +49,7 @@ #include <dt-bindings/reset/sun50i-a64-ccu.h> #include <dt-bindings/reset/sun8i-de2.h> #include <dt-bindings/reset/sun8i-r-ccu.h> +#include <dt-bindings/thermal/thermal.h> / { interrupt-parent = <&gic>; @@ -211,6 +212,29 @@ timer { (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + thermal-zones { + cpu_thermal: cpu0-thermal { + /* milliseconds */ + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; + }; + + gpu0_thermal: gpu0-thermal { + /* milliseconds */ + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + }; + + gpu1_thermal: gpu1-thermal { + /* milliseconds */ + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 2>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -485,6 +509,12 @@ mmc2: mmc@1c11000 { sid: eeprom@1c14000 { compatible = "allwinner,sun50i-a64-sid"; reg = <0x1c14000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@34 { + reg = <0x34 0x6>; + }; }; crypto: crypto@1c15000 { @@ -810,6 +840,18 @@ codec: codec@1c22e00 { status = "disabled"; }; + ths: thermal-sensor@1c25000 { + compatible = "allwinner,sun50i-a64-ths"; + reg = <0x01c25000 0x100>; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "bus", "mod"; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ccu RST_BUS_THS>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; -- 2.24.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
end of thread, other threads:[~2019-12-19 9:12 UTC | newest] Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-12-18 4:21 [PATCH v7 0/7] add thermal sensor driver for A64, A83T, H3, H5, H6, R40 Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 1/7] thermal: sun8i: add thermal driver for H6/H5/H3/A64/A83T/R40 Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 2/7] dt-bindings: thermal: add YAML schema for sun8i-thermal driver bindings Vasily Khoruzhick 2019-12-18 22:00 ` Maxime Ripard 2019-12-18 22:27 ` Vasily Khoruzhick 2019-12-19 9:12 ` Maxime Ripard 2019-12-18 4:21 ` [PATCH v7 3/7] ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 4/7] ARM: dts: sun8i-h3: " Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 5/7] arm64: dts: allwinner: h5: " Vasily Khoruzhick 2019-12-18 4:21 ` [PATCH v7 6/7] arm64: dts: allwinner: h6: " Vasily Khoruzhick 2019-12-18 4:32 ` Chen-Yu Tsai 2019-12-18 23:18 ` Vasily Khoruzhick 2019-12-19 1:03 ` Ondřej Jirman 2019-12-19 1:42 ` Vasily Khoruzhick 2019-12-19 2:59 ` Chen-Yu Tsai 2019-12-18 4:21 ` [PATCH v7 7/7] arm64: dts: allwinner: a64: Add thermal sensors " Vasily Khoruzhick
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