* [PATCH v13 1/7] dt-bindings: sun6i-dsi: Document A64 MIPI-DSI controller
2019-12-18 19:10 [PATCH v13 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
@ 2019-12-18 19:10 ` Jagan Teki
2019-12-18 19:10 ` [PATCH v13 2/7] dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback) Jagan Teki
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2019-12-18 19:10 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, David Airlie, Daniel Vetter,
Rob Herring, Mark Rutland
Cc: michael, Icenowy Zheng, linux-sunxi, dri-devel, linux-arm-kernel,
linux-kernel, devicetree, linux-amarula, Jagan Teki
The MIPI DSI controller in Allwinner A64 is similar to A33.
But unlike A33, A64 doesn't have DSI_SCLK gating so it is valid
to have separate compatible for A64 on the same driver.
DSI_SCLK uses mod clock-names on dt-bindings, so the same
is not required for A64.
On that note
- A64 require minimum of 1 clock like the bus clock
- A33 require minimum of 2 clocks like both bus, mod clocks
So, update dt-bindings so-that it can document both A33,
A64 bindings requirements.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v13:
- Add if statement for A64 with single clock
.../display/allwinner,sun6i-a31-mipi-dsi.yaml | 33 +++++++++++++++++--
1 file changed, 31 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
index dafc0980c4fa..d41ecb5e7f7c 100644
--- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
@@ -15,7 +15,9 @@ properties:
"#size-cells": true
compatible:
- const: allwinner,sun6i-a31-mipi-dsi
+ enum:
+ - allwinner,sun6i-a31-mipi-dsi
+ - allwinner,sun50i-a64-mipi-dsi
reg:
maxItems: 1
@@ -24,6 +26,8 @@ properties:
maxItems: 1
clocks:
+ minItems: 1
+ maxItems: 2
items:
- description: Bus Clock
- description: Module Clock
@@ -63,13 +67,38 @@ required:
- reg
- interrupts
- clocks
- - clock-names
- phys
- phy-names
- resets
- vcc-dsi-supply
- port
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun6i-a31-mipi-dsi
+
+ then:
+ properties:
+ clocks:
+ minItems: 2
+
+ required:
+ - clock-names
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun50i-a64-mipi-dsi
+
+ then:
+ properties:
+ clocks:
+ minItems: 1
+
additionalProperties: false
examples:
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 2/7] dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback)
2019-12-18 19:10 [PATCH v13 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2019-12-18 19:10 ` [PATCH v13 1/7] dt-bindings: sun6i-dsi: Document A64 MIPI-DSI controller Jagan Teki
@ 2019-12-18 19:10 ` Jagan Teki
2019-12-18 19:10 ` [PATCH v13 3/7] drm/sun4i: dsi: Get the mod clock for A31 Jagan Teki
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2019-12-18 19:10 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, David Airlie, Daniel Vetter,
Rob Herring, Mark Rutland
Cc: michael, Icenowy Zheng, linux-sunxi, dri-devel, linux-arm-kernel,
linux-kernel, devicetree, linux-amarula, Jagan Teki
The MIPI DSI PHY controller on Allwinner A64 is similar
on the one on A31.
Add A64 compatible and append A31 compatible as fallback.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v13:
- collect Rob review tag
.../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
index fa46670de299..8841938050b2 100644
--- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
+++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
@@ -15,7 +15,11 @@ properties:
const: 0
compatible:
- const: allwinner,sun6i-a31-mipi-dphy
+ oneOf:
+ - const: allwinner,sun6i-a31-mipi-dphy
+ - items:
+ - const: allwinner,sun50i-a64-mipi-dphy
+ - const: allwinner,sun6i-a31-mipi-dphy
reg:
maxItems: 1
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 3/7] drm/sun4i: dsi: Get the mod clock for A31
2019-12-18 19:10 [PATCH v13 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2019-12-18 19:10 ` [PATCH v13 1/7] dt-bindings: sun6i-dsi: Document A64 MIPI-DSI controller Jagan Teki
2019-12-18 19:10 ` [PATCH v13 2/7] dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback) Jagan Teki
@ 2019-12-18 19:10 ` Jagan Teki
2019-12-18 19:10 ` [PATCH v13 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk Jagan Teki
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2019-12-18 19:10 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, David Airlie, Daniel Vetter,
Rob Herring, Mark Rutland
Cc: michael, Icenowy Zheng, linux-sunxi, dri-devel, linux-arm-kernel,
linux-kernel, devicetree, linux-amarula, Jagan Teki
As per the user manual, look like mod clock is not mandatory
for all Allwinner MIPI DSI controllers, it is connected to
CLK_DSI_SCLK for A31 and not available in A64.
So, add compatible check for A31 and get mod clock accordingly.
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v13:
- Drop has_mod_clk quirk as commented by Chen-Yu
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index c958ca9bae63..68b88a3dc4c5 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -1120,10 +1120,13 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
return PTR_ERR(dsi->reset);
}
- dsi->mod_clk = devm_clk_get(dev, "mod");
- if (IS_ERR(dsi->mod_clk)) {
- dev_err(dev, "Couldn't get the DSI mod clock\n");
- return PTR_ERR(dsi->mod_clk);
+ if (of_device_is_compatible(dev->of_node,
+ "allwinner,sun6i-a31-mipi-dsi")) {
+ dsi->mod_clk = devm_clk_get(dev, "mod");
+ if (IS_ERR(dsi->mod_clk)) {
+ dev_err(dev, "Couldn't get the DSI mod clock\n");
+ return PTR_ERR(dsi->mod_clk);
+ }
}
/*
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk
2019-12-18 19:10 [PATCH v13 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
` (2 preceding siblings ...)
2019-12-18 19:10 ` [PATCH v13 3/7] drm/sun4i: dsi: Get the mod clock for A31 Jagan Teki
@ 2019-12-18 19:10 ` Jagan Teki
2019-12-18 22:05 ` Maxime Ripard
2019-12-18 19:10 ` [PATCH v13 5/7] drm/sun4i: dsi: Add Allwinner A64 MIPI DSI support Jagan Teki
` (2 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Jagan Teki @ 2019-12-18 19:10 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, David Airlie, Daniel Vetter,
Rob Herring, Mark Rutland
Cc: michael, Icenowy Zheng, linux-sunxi, dri-devel, linux-arm-kernel,
linux-kernel, devicetree, linux-amarula, Jagan Teki
regmap has special API to enable the controller bus clock while
initializing register space, and current driver is using
devm_regmap_init_mmio_clk which require to specify bus
clk_id argument as "bus"
But, the usage of clocks are varies between different Allwinner
DSI controllers. Clocking in A33 would need bus and mod clocks
where as A64 would need only bus clock.
Since A64 support only single bus clock, it is optional to
specify the clock-names on the controller device tree node.
So using NULL on clk_id would get the attached clock.
To support clk_id as "bus" and "NULL" during clock enablement
between controllers, this patch add generic code to handle
the bus clock using regmap_mmio_attach_clk with associated
regmap APIs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v13:
- update the changes since has_mod_clk is dropped in previous patch
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 45 +++++++++++++++++++++-----
1 file changed, 37 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index 68b88a3dc4c5..de8955fbeb00 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -1081,6 +1081,7 @@ static const struct component_ops sun6i_dsi_ops = {
static int sun6i_dsi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
+ const char *bus_clk_name = NULL;
struct sun6i_dsi *dsi;
struct resource *res;
void __iomem *base;
@@ -1094,6 +1095,10 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
dsi->host.ops = &sun6i_dsi_host_ops;
dsi->host.dev = dev;
+ if (of_device_is_compatible(dev->of_node,
+ "allwinner,sun6i-a31-mipi-dsi"))
+ bus_clk_name = "bus";
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(dev, res);
if (IS_ERR(base)) {
@@ -1107,25 +1112,36 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
return PTR_ERR(dsi->regulator);
}
- dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base,
- &sun6i_dsi_regmap_config);
- if (IS_ERR(dsi->regs)) {
- dev_err(dev, "Couldn't create the DSI encoder regmap\n");
- return PTR_ERR(dsi->regs);
- }
-
dsi->reset = devm_reset_control_get_shared(dev, NULL);
if (IS_ERR(dsi->reset)) {
dev_err(dev, "Couldn't get our reset line\n");
return PTR_ERR(dsi->reset);
}
+ dsi->regs = devm_regmap_init_mmio(dev, base, &sun6i_dsi_regmap_config);
+ if (IS_ERR(dsi->regs)) {
+ dev_err(dev, "Couldn't init regmap\n");
+ return PTR_ERR(dsi->regs);
+ }
+
+ dsi->bus_clk = devm_clk_get(dev, bus_clk_name);
+ if (IS_ERR(dsi->bus_clk)) {
+ dev_err(dev, "Couldn't get the DSI bus clock\n");
+ ret = PTR_ERR(dsi->bus_clk);
+ goto err_regmap;
+ } else {
+ ret = regmap_mmio_attach_clk(dsi->regs, dsi->bus_clk);
+ if (ret)
+ goto err_bus_clk;
+ }
+
if (of_device_is_compatible(dev->of_node,
"allwinner,sun6i-a31-mipi-dsi")) {
dsi->mod_clk = devm_clk_get(dev, "mod");
if (IS_ERR(dsi->mod_clk)) {
dev_err(dev, "Couldn't get the DSI mod clock\n");
- return PTR_ERR(dsi->mod_clk);
+ ret = PTR_ERR(dsi->mod_clk);
+ goto err_attach_clk;
}
}
@@ -1164,6 +1180,14 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
pm_runtime_disable(dev);
err_unprotect_clk:
clk_rate_exclusive_put(dsi->mod_clk);
+err_attach_clk:
+ if (!IS_ERR(dsi->bus_clk))
+ regmap_mmio_detach_clk(dsi->regs);
+err_bus_clk:
+ if (!IS_ERR(dsi->bus_clk))
+ clk_put(dsi->bus_clk);
+err_regmap:
+ regmap_exit(dsi->regs);
return ret;
}
@@ -1177,6 +1201,11 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
pm_runtime_disable(dev);
clk_rate_exclusive_put(dsi->mod_clk);
+ if (!IS_ERR(dsi->bus_clk))
+ regmap_mmio_detach_clk(dsi->regs);
+
+ regmap_exit(dsi->regs);
+
return 0;
}
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v13 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk
2019-12-18 19:10 ` [PATCH v13 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk Jagan Teki
@ 2019-12-18 22:05 ` Maxime Ripard
2019-12-21 11:41 ` Jagan Teki
0 siblings, 1 reply; 11+ messages in thread
From: Maxime Ripard @ 2019-12-18 22:05 UTC (permalink / raw)
To: Jagan Teki
Cc: Chen-Yu Tsai, David Airlie, Daniel Vetter, Rob Herring,
Mark Rutland, michael, Icenowy Zheng, linux-sunxi, dri-devel,
linux-arm-kernel, linux-kernel, devicetree, linux-amarula
[-- Attachment #1: Type: text/plain, Size: 4191 bytes --]
On Thu, Dec 19, 2019 at 12:40:14AM +0530, Jagan Teki wrote:
> regmap has special API to enable the controller bus clock while
> initializing register space, and current driver is using
> devm_regmap_init_mmio_clk which require to specify bus
> clk_id argument as "bus"
>
> But, the usage of clocks are varies between different Allwinner
> DSI controllers. Clocking in A33 would need bus and mod clocks
> where as A64 would need only bus clock.
>
> Since A64 support only single bus clock, it is optional to
> specify the clock-names on the controller device tree node.
> So using NULL on clk_id would get the attached clock.
>
> To support clk_id as "bus" and "NULL" during clock enablement
> between controllers, this patch add generic code to handle
> the bus clock using regmap_mmio_attach_clk with associated
> regmap APIs.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v13:
> - update the changes since has_mod_clk is dropped in previous patch
>
> drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 45 +++++++++++++++++++++-----
> 1 file changed, 37 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> index 68b88a3dc4c5..de8955fbeb00 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -1081,6 +1081,7 @@ static const struct component_ops sun6i_dsi_ops = {
> static int sun6i_dsi_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> + const char *bus_clk_name = NULL;
> struct sun6i_dsi *dsi;
> struct resource *res;
> void __iomem *base;
> @@ -1094,6 +1095,10 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> dsi->host.ops = &sun6i_dsi_host_ops;
> dsi->host.dev = dev;
>
> + if (of_device_is_compatible(dev->of_node,
> + "allwinner,sun6i-a31-mipi-dsi"))
> + bus_clk_name = "bus";
> +
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> base = devm_ioremap_resource(dev, res);
> if (IS_ERR(base)) {
> @@ -1107,25 +1112,36 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> return PTR_ERR(dsi->regulator);
> }
>
> - dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base,
> - &sun6i_dsi_regmap_config);
> - if (IS_ERR(dsi->regs)) {
> - dev_err(dev, "Couldn't create the DSI encoder regmap\n");
> - return PTR_ERR(dsi->regs);
> - }
> -
> dsi->reset = devm_reset_control_get_shared(dev, NULL);
> if (IS_ERR(dsi->reset)) {
> dev_err(dev, "Couldn't get our reset line\n");
> return PTR_ERR(dsi->reset);
> }
>
> + dsi->regs = devm_regmap_init_mmio(dev, base, &sun6i_dsi_regmap_config);
> + if (IS_ERR(dsi->regs)) {
> + dev_err(dev, "Couldn't init regmap\n");
> + return PTR_ERR(dsi->regs);
> + }
> +
> + dsi->bus_clk = devm_clk_get(dev, bus_clk_name);
> + if (IS_ERR(dsi->bus_clk)) {
> + dev_err(dev, "Couldn't get the DSI bus clock\n");
> + ret = PTR_ERR(dsi->bus_clk);
> + goto err_regmap;
> + } else {
> + ret = regmap_mmio_attach_clk(dsi->regs, dsi->bus_clk);
> + if (ret)
> + goto err_bus_clk;
> + }
> +
> if (of_device_is_compatible(dev->of_node,
> "allwinner,sun6i-a31-mipi-dsi")) {
> dsi->mod_clk = devm_clk_get(dev, "mod");
> if (IS_ERR(dsi->mod_clk)) {
> dev_err(dev, "Couldn't get the DSI mod clock\n");
> - return PTR_ERR(dsi->mod_clk);
> + ret = PTR_ERR(dsi->mod_clk);
> + goto err_attach_clk;
> }
> }
>
> @@ -1164,6 +1180,14 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> pm_runtime_disable(dev);
> err_unprotect_clk:
> clk_rate_exclusive_put(dsi->mod_clk);
> +err_attach_clk:
> + if (!IS_ERR(dsi->bus_clk))
> + regmap_mmio_detach_clk(dsi->regs);
> +err_bus_clk:
> + if (!IS_ERR(dsi->bus_clk))
> + clk_put(dsi->bus_clk);
You still have an unbalanced clk_get / clk_put here
> +err_regmap:
> + regmap_exit(dsi->regs);
That's not needed.
> return ret;
> }
>
> @@ -1177,6 +1201,11 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
> pm_runtime_disable(dev);
> clk_rate_exclusive_put(dsi->mod_clk);
>
> + if (!IS_ERR(dsi->bus_clk))
> + regmap_mmio_detach_clk(dsi->regs);
> +
> + regmap_exit(dsi->regs);
Same thing here.
Maxime
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v13 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk
2019-12-18 22:05 ` Maxime Ripard
@ 2019-12-21 11:41 ` Jagan Teki
2019-12-21 16:02 ` Maxime Ripard
0 siblings, 1 reply; 11+ messages in thread
From: Jagan Teki @ 2019-12-21 11:41 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, David Airlie, Daniel Vetter, Rob Herring,
Mark Rutland, Michael Trimarchi, Icenowy Zheng, linux-sunxi,
dri-devel, linux-arm-kernel, linux-kernel, devicetree,
linux-amarula
On Thu, Dec 19, 2019 at 3:35 AM Maxime Ripard <mripard@kernel.org> wrote:
>
> On Thu, Dec 19, 2019 at 12:40:14AM +0530, Jagan Teki wrote:
> > regmap has special API to enable the controller bus clock while
> > initializing register space, and current driver is using
> > devm_regmap_init_mmio_clk which require to specify bus
> > clk_id argument as "bus"
> >
> > But, the usage of clocks are varies between different Allwinner
> > DSI controllers. Clocking in A33 would need bus and mod clocks
> > where as A64 would need only bus clock.
> >
> > Since A64 support only single bus clock, it is optional to
> > specify the clock-names on the controller device tree node.
> > So using NULL on clk_id would get the attached clock.
> >
> > To support clk_id as "bus" and "NULL" during clock enablement
> > between controllers, this patch add generic code to handle
> > the bus clock using regmap_mmio_attach_clk with associated
> > regmap APIs.
> >
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> > Changes for v13:
> > - update the changes since has_mod_clk is dropped in previous patch
> >
> > drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 45 +++++++++++++++++++++-----
> > 1 file changed, 37 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > index 68b88a3dc4c5..de8955fbeb00 100644
> > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > @@ -1081,6 +1081,7 @@ static const struct component_ops sun6i_dsi_ops = {
> > static int sun6i_dsi_probe(struct platform_device *pdev)
> > {
> > struct device *dev = &pdev->dev;
> > + const char *bus_clk_name = NULL;
> > struct sun6i_dsi *dsi;
> > struct resource *res;
> > void __iomem *base;
> > @@ -1094,6 +1095,10 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> > dsi->host.ops = &sun6i_dsi_host_ops;
> > dsi->host.dev = dev;
> >
> > + if (of_device_is_compatible(dev->of_node,
> > + "allwinner,sun6i-a31-mipi-dsi"))
> > + bus_clk_name = "bus";
> > +
> > res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > base = devm_ioremap_resource(dev, res);
> > if (IS_ERR(base)) {
> > @@ -1107,25 +1112,36 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> > return PTR_ERR(dsi->regulator);
> > }
> >
> > - dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base,
> > - &sun6i_dsi_regmap_config);
> > - if (IS_ERR(dsi->regs)) {
> > - dev_err(dev, "Couldn't create the DSI encoder regmap\n");
> > - return PTR_ERR(dsi->regs);
> > - }
> > -
> > dsi->reset = devm_reset_control_get_shared(dev, NULL);
> > if (IS_ERR(dsi->reset)) {
> > dev_err(dev, "Couldn't get our reset line\n");
> > return PTR_ERR(dsi->reset);
> > }
> >
> > + dsi->regs = devm_regmap_init_mmio(dev, base, &sun6i_dsi_regmap_config);
> > + if (IS_ERR(dsi->regs)) {
> > + dev_err(dev, "Couldn't init regmap\n");
> > + return PTR_ERR(dsi->regs);
> > + }
> > +
> > + dsi->bus_clk = devm_clk_get(dev, bus_clk_name);
> > + if (IS_ERR(dsi->bus_clk)) {
> > + dev_err(dev, "Couldn't get the DSI bus clock\n");
> > + ret = PTR_ERR(dsi->bus_clk);
> > + goto err_regmap;
> > + } else {
> > + ret = regmap_mmio_attach_clk(dsi->regs, dsi->bus_clk);
> > + if (ret)
> > + goto err_bus_clk;
> > + }
> > +
> > if (of_device_is_compatible(dev->of_node,
> > "allwinner,sun6i-a31-mipi-dsi")) {
> > dsi->mod_clk = devm_clk_get(dev, "mod");
> > if (IS_ERR(dsi->mod_clk)) {
> > dev_err(dev, "Couldn't get the DSI mod clock\n");
> > - return PTR_ERR(dsi->mod_clk);
> > + ret = PTR_ERR(dsi->mod_clk);
> > + goto err_attach_clk;
> > }
> > }
> >
> > @@ -1164,6 +1180,14 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> > pm_runtime_disable(dev);
> > err_unprotect_clk:
> > clk_rate_exclusive_put(dsi->mod_clk);
> > +err_attach_clk:
> > + if (!IS_ERR(dsi->bus_clk))
> > + regmap_mmio_detach_clk(dsi->regs);
> > +err_bus_clk:
> > + if (!IS_ERR(dsi->bus_clk))
> > + clk_put(dsi->bus_clk);
>
> You still have an unbalanced clk_get / clk_put here
You mean it is not needed right since devm_clk_get has release call
via devres_alloc? or the wrong position for clk_put?
>
> > +err_regmap:
> > + regmap_exit(dsi->regs);
>
> That's not needed.
Yes. look like __devm_regmap_init has release call with regmap_exit.
Thanks for the comments, I will update these and send next version.
Let me know if you have any more comments?
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v13 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk
2019-12-21 11:41 ` Jagan Teki
@ 2019-12-21 16:02 ` Maxime Ripard
0 siblings, 0 replies; 11+ messages in thread
From: Maxime Ripard @ 2019-12-21 16:02 UTC (permalink / raw)
To: Jagan Teki
Cc: Chen-Yu Tsai, David Airlie, Daniel Vetter, Rob Herring,
Mark Rutland, Michael Trimarchi, Icenowy Zheng, linux-sunxi,
dri-devel, linux-arm-kernel, linux-kernel, devicetree,
linux-amarula
[-- Attachment #1: Type: text/plain, Size: 4976 bytes --]
On Sat, Dec 21, 2019 at 05:11:00PM +0530, Jagan Teki wrote:
> On Thu, Dec 19, 2019 at 3:35 AM Maxime Ripard <mripard@kernel.org> wrote:
> >
> > On Thu, Dec 19, 2019 at 12:40:14AM +0530, Jagan Teki wrote:
> > > regmap has special API to enable the controller bus clock while
> > > initializing register space, and current driver is using
> > > devm_regmap_init_mmio_clk which require to specify bus
> > > clk_id argument as "bus"
> > >
> > > But, the usage of clocks are varies between different Allwinner
> > > DSI controllers. Clocking in A33 would need bus and mod clocks
> > > where as A64 would need only bus clock.
> > >
> > > Since A64 support only single bus clock, it is optional to
> > > specify the clock-names on the controller device tree node.
> > > So using NULL on clk_id would get the attached clock.
> > >
> > > To support clk_id as "bus" and "NULL" during clock enablement
> > > between controllers, this patch add generic code to handle
> > > the bus clock using regmap_mmio_attach_clk with associated
> > > regmap APIs.
> > >
> > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > > ---
> > > Changes for v13:
> > > - update the changes since has_mod_clk is dropped in previous patch
> > >
> > > drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 45 +++++++++++++++++++++-----
> > > 1 file changed, 37 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > > index 68b88a3dc4c5..de8955fbeb00 100644
> > > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> > > @@ -1081,6 +1081,7 @@ static const struct component_ops sun6i_dsi_ops = {
> > > static int sun6i_dsi_probe(struct platform_device *pdev)
> > > {
> > > struct device *dev = &pdev->dev;
> > > + const char *bus_clk_name = NULL;
> > > struct sun6i_dsi *dsi;
> > > struct resource *res;
> > > void __iomem *base;
> > > @@ -1094,6 +1095,10 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> > > dsi->host.ops = &sun6i_dsi_host_ops;
> > > dsi->host.dev = dev;
> > >
> > > + if (of_device_is_compatible(dev->of_node,
> > > + "allwinner,sun6i-a31-mipi-dsi"))
> > > + bus_clk_name = "bus";
> > > +
> > > res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > > base = devm_ioremap_resource(dev, res);
> > > if (IS_ERR(base)) {
> > > @@ -1107,25 +1112,36 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> > > return PTR_ERR(dsi->regulator);
> > > }
> > >
> > > - dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base,
> > > - &sun6i_dsi_regmap_config);
> > > - if (IS_ERR(dsi->regs)) {
> > > - dev_err(dev, "Couldn't create the DSI encoder regmap\n");
> > > - return PTR_ERR(dsi->regs);
> > > - }
> > > -
> > > dsi->reset = devm_reset_control_get_shared(dev, NULL);
> > > if (IS_ERR(dsi->reset)) {
> > > dev_err(dev, "Couldn't get our reset line\n");
> > > return PTR_ERR(dsi->reset);
> > > }
> > >
> > > + dsi->regs = devm_regmap_init_mmio(dev, base, &sun6i_dsi_regmap_config);
> > > + if (IS_ERR(dsi->regs)) {
> > > + dev_err(dev, "Couldn't init regmap\n");
> > > + return PTR_ERR(dsi->regs);
> > > + }
> > > +
> > > + dsi->bus_clk = devm_clk_get(dev, bus_clk_name);
> > > + if (IS_ERR(dsi->bus_clk)) {
> > > + dev_err(dev, "Couldn't get the DSI bus clock\n");
> > > + ret = PTR_ERR(dsi->bus_clk);
> > > + goto err_regmap;
> > > + } else {
> > > + ret = regmap_mmio_attach_clk(dsi->regs, dsi->bus_clk);
> > > + if (ret)
> > > + goto err_bus_clk;
> > > + }
> > > +
> > > if (of_device_is_compatible(dev->of_node,
> > > "allwinner,sun6i-a31-mipi-dsi")) {
> > > dsi->mod_clk = devm_clk_get(dev, "mod");
> > > if (IS_ERR(dsi->mod_clk)) {
> > > dev_err(dev, "Couldn't get the DSI mod clock\n");
> > > - return PTR_ERR(dsi->mod_clk);
> > > + ret = PTR_ERR(dsi->mod_clk);
> > > + goto err_attach_clk;
> > > }
> > > }
> > >
> > > @@ -1164,6 +1180,14 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> > > pm_runtime_disable(dev);
> > > err_unprotect_clk:
> > > clk_rate_exclusive_put(dsi->mod_clk);
> > > +err_attach_clk:
> > > + if (!IS_ERR(dsi->bus_clk))
> > > + regmap_mmio_detach_clk(dsi->regs);
> > > +err_bus_clk:
> > > + if (!IS_ERR(dsi->bus_clk))
> > > + clk_put(dsi->bus_clk);
> >
> > You still have an unbalanced clk_get / clk_put here
>
> You mean it is not needed right since devm_clk_get has release call
> via devres_alloc?
Yes
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v13 5/7] drm/sun4i: dsi: Add Allwinner A64 MIPI DSI support
2019-12-18 19:10 [PATCH v13 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
` (3 preceding siblings ...)
2019-12-18 19:10 ` [PATCH v13 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk Jagan Teki
@ 2019-12-18 19:10 ` Jagan Teki
2019-12-18 19:10 ` [PATCH v13 6/7] arm64: dts: allwinner: a64: Add MIPI DSI pipeline Jagan Teki
2019-12-18 19:10 ` [DO NOT MERGE] [PATCH v13 7/7] arm64: dts: allwinner: bananapi-m64: Enable Bananapi S070WV20-CT16 DSI panel Jagan Teki
6 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2019-12-18 19:10 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, David Airlie, Daniel Vetter,
Rob Herring, Mark Rutland
Cc: michael, Icenowy Zheng, linux-sunxi, dri-devel, linux-arm-kernel,
linux-kernel, devicetree, linux-amarula, Jagan Teki
The MIPI DSI controller in Allwinner A64 is similar to A33.
But unlike A33, A64 doesn't have DSI_SCLK gating so add compatible
for Allwinner A64 with uninitialized has_mod_clk driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
---
Changes for v13:
- update the changes since has_mod_clk is dropped in previous patch
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index de8955fbeb00..8669d5f0e744 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -1264,6 +1264,7 @@ static const struct dev_pm_ops sun6i_dsi_pm_ops = {
static const struct of_device_id sun6i_dsi_of_table[] = {
{ .compatible = "allwinner,sun6i-a31-mipi-dsi" },
+ { .compatible = "allwinner,sun50i-a64-mipi-dsi" },
{ }
};
MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table);
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 6/7] arm64: dts: allwinner: a64: Add MIPI DSI pipeline
2019-12-18 19:10 [PATCH v13 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
` (4 preceding siblings ...)
2019-12-18 19:10 ` [PATCH v13 5/7] drm/sun4i: dsi: Add Allwinner A64 MIPI DSI support Jagan Teki
@ 2019-12-18 19:10 ` Jagan Teki
2019-12-18 19:10 ` [DO NOT MERGE] [PATCH v13 7/7] arm64: dts: allwinner: bananapi-m64: Enable Bananapi S070WV20-CT16 DSI panel Jagan Teki
6 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2019-12-18 19:10 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, David Airlie, Daniel Vetter,
Rob Herring, Mark Rutland
Cc: michael, Icenowy Zheng, linux-sunxi, dri-devel, linux-arm-kernel,
linux-kernel, devicetree, linux-amarula, Jagan Teki
Add MIPI DSI pipeline for Allwinner A64.
- dsi node, with A64 compatible since it doesn't support
DSI_SCLK gating unlike A33
- dphy node, with A64 compatible with A33 fallback since
DPHY on A64 and A33 is similar
- finally, attach the dsi_in to tcon0 for complete MIPI DSI
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
---
Changes for v13:
- none
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 27e48234f1c2..1db8378f59a4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -382,6 +382,12 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+
+ tcon0_out_dsi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&dsi_in_tcon0>;
+ allwinner,tcon-channel = <1>;
+ };
};
};
};
@@ -1014,6 +1020,37 @@
status = "disabled";
};
+ dsi: dsi@1ca0000 {
+ compatible = "allwinner,sun50i-a64-mipi-dsi";
+ reg = <0x01ca0000 0x1000>;
+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_MIPI_DSI>;
+ resets = <&ccu RST_BUS_MIPI_DSI>;
+ phys = <&dphy>;
+ phy-names = "dphy";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port {
+ dsi_in_tcon0: endpoint {
+ remote-endpoint = <&tcon0_out_dsi>;
+ };
+ };
+ };
+
+ dphy: d-phy@1ca1000 {
+ compatible = "allwinner,sun50i-a64-mipi-dphy",
+ "allwinner,sun6i-a31-mipi-dphy";
+ reg = <0x01ca1000 0x1000>;
+ clocks = <&ccu CLK_BUS_MIPI_DSI>,
+ <&ccu CLK_DSI_DPHY>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_MIPI_DSI>;
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
hdmi: hdmi@1ee0000 {
compatible = "allwinner,sun50i-a64-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [DO NOT MERGE] [PATCH v13 7/7] arm64: dts: allwinner: bananapi-m64: Enable Bananapi S070WV20-CT16 DSI panel
2019-12-18 19:10 [PATCH v13 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
` (5 preceding siblings ...)
2019-12-18 19:10 ` [PATCH v13 6/7] arm64: dts: allwinner: a64: Add MIPI DSI pipeline Jagan Teki
@ 2019-12-18 19:10 ` Jagan Teki
6 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2019-12-18 19:10 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, David Airlie, Daniel Vetter,
Rob Herring, Mark Rutland
Cc: michael, Icenowy Zheng, linux-sunxi, dri-devel, linux-arm-kernel,
linux-kernel, devicetree, linux-amarula, Jagan Teki
This patch add support for Bananapi S070WV20-CT16 DSI panel to
BPI-M64 board.
DSI panel connected via board DSI port with,
- DLDO1 as VCC-DSI supply
- DCDC1 as VDD supply
- PD7 gpio for lcd enable pin
- PD6 gpio for lcd reset pin
- PD5 gpio for backlight enable pin
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
.../dts/allwinner/sun50i-a64-bananapi-m64.dts | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 208373efee49..6beaecdd802a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -45,6 +45,7 @@
#include "sun50i-a64.dtsi"
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "BananaPi-M64";
@@ -56,6 +57,14 @@
serial1 = &uart1;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <1 2 4 8 16 32 64 128 255>;
+ default-brightness-level = <2>;
+ enable-gpios = <&pio 3 5 GPIO_ACTIVE_HIGH>; /* LCD-BL-EN: PD5 */
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -116,6 +125,24 @@
status = "okay";
};
+&dphy {
+ status = "okay";
+};
+
+&dsi {
+ vcc-dsi-supply = <®_dldo1>; /* VCC3V3-DSI */
+ status = "okay";
+
+ panel@0 {
+ compatible = "bananapi,s070wv20-ct16-icn6211";
+ reg = <0>;
+ enable-gpios = <&pio 3 7 GPIO_ACTIVE_HIGH>; /* LCD-PWR-EN: PD7 */
+ reset-gpios = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD6 */
+ vdd-supply = <®_dcdc1>;
+ backlight = <&backlight>;
+ };
+};
+
&ehci0 {
status = "okay";
};
@@ -206,6 +233,10 @@
status = "okay";
};
+&r_pwm {
+ status = "okay";
+};
+
&r_rsb {
status = "okay";
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread