[PATCH v2 1/2] dt-bindings: arm: Add Akebi96 board support

[PATCH v2 1/2] dt-bindings: arm: Add Akebi96 board support

[Masami Hiramatsu]

Add uniphier-ld20-akebi96 compatible string for
Akebi96 board support.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
---
 .../bindings/arm/socionext/uniphier.yaml           |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml b/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
index 65ad6d8a3c99..10a7f0752281 100644
--- a/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
+++ b/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
@@ -51,6 +51,7 @@ properties:
       - description: LD20 SoC boards
         items:
           - enum:
+            - socionext,uniphier-ld20-akebi96
             - socionext,uniphier-ld20-global
             - socionext,uniphier-ld20-ref
           - const: socionext,uniphier-ld20

[PATCH v2 2/2] arm64: dts: uniphier: Add support for Akebi96

[Masami Hiramatsu]

Add the device tree for Akebi96. Akebi96 is a 96boards certified
development board based on UniPhir LD20.
( https://www.96boards.org/product/akebi96/ )

This board has;
- MAX3421 USB-SPI chip on SPI port3 (for USB gadget port)
- Simple frame buffer with 1080p fixed resolution.
- I2S port which is connected to aout1b instead of aout1.
- 3 serial ports, only serial3 has CTS/RTS.
- No NAND, only eMMC on the board.
- OP-TEE support.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm64/boot/dts/socionext/Makefile             |    1 
 .../boot/dts/socionext/uniphier-ld20-akebi96.dts   |  200 ++++++++++++++++++++
 arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi   |    2 
 3 files changed, 202 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts

diff --git a/arch/arm64/boot/dts/socionext/Makefile b/arch/arm64/boot/dts/socionext/Makefile
index d45441249cb5..dda3da33614b 100644
--- a/arch/arm64/boot/dts/socionext/Makefile
+++ b/arch/arm64/boot/dts/socionext/Makefile
@@ -2,6 +2,7 @@
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
 	uniphier-ld11-global.dtb \
 	uniphier-ld11-ref.dtb \
+	uniphier-ld20-akebi96.dtb \
 	uniphier-ld20-global.dtb \
 	uniphier-ld20-ref.dtb \
 	uniphier-pxs3-ref.dtb
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
new file mode 100644
index 000000000000..84ff98d96751
--- /dev/null
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for Akebi96 Development Board
+//
+// Derived from uniphier-ld20-global.dts.
+//
+// Copyright (C) 2015-2017 Socionext Inc.
+// Copyright (C) 2019-2020 Linaro Ltd.
+
+/dts-v1/;
+#include <dt-bindings/gpio/uniphier-gpio.h>
+#include "uniphier-ld20.dtsi"
+
+/ {
+	model = "Akebi96";
+	compatible = "socionext,uniphier-ld20-akebi96",
+		     "socionext,uniphier-ld20";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		serial3 = &serial3;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		spi2 = &spi2;
+		spi3 = &spi3;
+		ethernet0 = &eth;
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0xc0000000>;
+	};
+
+	framebuffer {
+		compatible = "simple-framebuffer";
+		reg = <0 0xc0000000 0 0x02000000>;
+		width = <1920>;
+		height = <1080>;
+		stride = <7680>;
+		format = "a8r8g8b8";
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		memory@c0000000 {
+			reg = <0 0xc0000000 0 0x02000000>;
+			no-map;
+		};
+	};
+
+	sound {
+		compatible = "audio-graph-card";
+		label = "UniPhier LD20";
+		dais = <&spdif_port0
+			&comp_spdif_port0>;
+	};
+
+	spdif-out {
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+
+		port@0 {
+			spdif_tx: endpoint {
+				remote-endpoint = <&spdif_hiecout1>;
+			};
+		};
+	};
+
+	comp-spdif-out {
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+
+		port@0 {
+			comp_spdif_tx: endpoint {
+				remote-endpoint = <&comp_spdif_hiecout1>;
+			};
+		};
+	};
+
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
+};
+
+&serial0 {
+	/* Onboard USB-UART */
+	status = "okay";
+};
+
+&serial2 {
+	/* LS connector UART1 */
+	status = "okay";
+};
+
+&serial3 {
+	/* LS connector UART0 */
+	status = "okay";
+	pinctrl-0 = <&pinctrl_uart3_ctsrts>;
+};
+
+&spdif_hiecout1 {
+	remote-endpoint = <&spdif_tx>;
+};
+
+&comp_spdif_hiecout1 {
+	remote-endpoint = <&comp_spdif_tx>;
+};
+
+&eth {
+	status = "okay";
+	phy-mode = "rgmii";
+	pinctrl-0 = <&pinctrl_ether_rgmii>;
+	phy-handle = <&ethphy>;
+};
+
+&mdio {
+	ethphy: ethphy@0 {
+		reg = <0>;
+	};
+};
+
+&usb {
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&i2c0 {
+	/* LS connector I2C0 */
+	status = "okay";
+};
+
+&i2c1 {
+	/* LS connector I2C1 */
+	status = "okay";
+};
+
+&audio {
+	pinctrl-0 = <&pinctrl_aout1b>,
+		    <&pinctrl_aoutiec1>;
+};
+
+&spi3 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	usb-over-spi@0 {
+		compatible = "maxim,max3421-udc";
+		reg = <0>;
+		spi-max-frequency = <12500000>;
+		interrupt-parent = <&gpio>;
+		interrupts = <0 2>, <10 3>;
+	};
+};
+
+&gpio {
+	/* IRQs for Max3421 */
+	xirq0 {
+		gpio-hog;
+		gpios = <UNIPHIER_GPIO_IRQ(0) 1>;
+		input;
+	};
+	xirq10 {
+		gpio-hog;
+		gpios = <UNIPHIER_GPIO_IRQ(10) 1>;
+		input;
+	};
+};
+
+&pinctrl {
+	pinctrl_aout1b: aout1b {
+		groups = "aout1", "aout1b";
+		function = "aout1";
+	};
+
+	pinctrl_uart3_ctsrts: uart3-ctsrts {
+		groups = "uart3", "uart3_ctsrts";
+		function = "uart3";
+	};
+};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index a93148c2088f..8f799f4bcda4 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -337,7 +337,7 @@
 						     <21 217 3>;
 		};
 
-		audio@56000000 {
+		audio: audio@56000000 {
 			compatible = "socionext,uniphier-ld20-aio";
 			reg = <0x56000000 0x80000>;
 			interrupts = <0 144 4>;

Re: [PATCH v2 2/2] arm64: dts: uniphier: Add support for Akebi96

[Masahiro Yamada]

On Mon, Apr 20, 2020 at 7:08 PM Masami Hiramatsu
<masami.hiramatsu@linaro.org> wrote:
>
> Add the device tree for Akebi96. Akebi96 is a 96boards certified
> development board based on UniPhir LD20.
> ( https://www.96boards.org/product/akebi96/ )
>
> This board has;
> - MAX3421 USB-SPI chip on SPI port3 (for USB gadget port)
> - Simple frame buffer with 1080p fixed resolution.
> - I2S port which is connected to aout1b instead of aout1.
> - 3 serial ports, only serial3 has CTS/RTS.
> - No NAND, only eMMC on the board.
> - OP-TEE support.


I did not know "OP-TEE support" was board spec.

Anyway, I decided to not worry about that.


You are adding lots of redundant code.

Delete as follows.


diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
b/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
index 84ff98d96751..aaf86162da84 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
@@ -113,7 +113,6 @@ &serial2 {
 &serial3 {
        /* LS connector UART0 */
        status = "okay";
-       pinctrl-0 = <&pinctrl_uart3_ctsrts>;
 };

 &spdif_hiecout1 {
@@ -155,11 +154,6 @@ &i2c1 {
        status = "okay";
 };

-&audio {
-       pinctrl-0 = <&pinctrl_aout1b>,
-                   <&pinctrl_aoutiec1>;
-};
-
 &spi3 {
        status = "okay";
        #address-cells = <1>;
@@ -187,14 +181,10 @@ xirq10 {
        };
 };

-&pinctrl {
-       pinctrl_aout1b: aout1b {
-               groups = "aout1", "aout1b";
-               function = "aout1";
-       };
+&pinctrl_aout1 {
+       groups = "aout1", "aout1b";
+};

-       pinctrl_uart3_ctsrts: uart3-ctsrts {
-               groups = "uart3", "uart3_ctsrts";
-               function = "uart3";
-       };
+&pinctrl_uart3 {
+       groups = "uart3", "uart3_ctsrts";
 };
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index f93519793bfb..afa90b762ea9 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -337,7 +337,7 @@ gpio: gpio@55000000 {
                                                     <21 217 3>;
                };

-               audio: audio@56000000 {
+               audio@56000000 {
                        compatible = "socionext,uniphier-ld20-aio";
                        reg = <0x56000000 0x80000>;
                        interrupts = <0 144 4>;





Lastly, is the pin-setting "aout1", "aout1b" correct ?



-- 
Best Regards
Masahiro Yamada

Re: [PATCH v2 2/2] arm64: dts: uniphier: Add support for Akebi96

[Masahiro Yamada]

Hiramatsu-san,

On Mon, Apr 20, 2020 at 8:15 PM Masahiro Yamada <masahiroy@kernel.org> wrote:
>
> On Mon, Apr 20, 2020 at 7:08 PM Masami Hiramatsu
> <masami.hiramatsu@linaro.org> wrote:
> >
> > Add the device tree for Akebi96. Akebi96 is a 96boards certified
> > development board based on UniPhir LD20.
> > ( https://www.96boards.org/product/akebi96/ )
> >
> > This board has;
> > - MAX3421 USB-SPI chip on SPI port3 (for USB gadget port)
> > - Simple frame buffer with 1080p fixed resolution.
> > - I2S port which is connected to aout1b instead of aout1.
> > - 3 serial ports, only serial3 has CTS/RTS.
> > - No NAND, only eMMC on the board.
> > - OP-TEE support.
>
>



> Lastly, is the pin-setting "aout1", "aout1b" correct ?


I am not sure if I understood this code correctly, but
there are two ports "aout1" and "aout1b"
outputting the same audio, is this correct?



-- 
Best Regards
Masahiro Yamada

Re: [PATCH v2 2/2] arm64: dts: uniphier: Add support for Akebi96

[Masami Hiramatsu]

Hi Yamada-san,

Thank you for your review.

2020年4月20日(月) 20:16 Masahiro Yamada <masahiroy@kernel.org>:
>
> On Mon, Apr 20, 2020 at 7:08 PM Masami Hiramatsu
> <masami.hiramatsu@linaro.org> wrote:
> >
> > Add the device tree for Akebi96. Akebi96 is a 96boards certified
> > development board based on UniPhir LD20.
> > ( https://www.96boards.org/product/akebi96/ )
> >
> > This board has;
> > - MAX3421 USB-SPI chip on SPI port3 (for USB gadget port)
> > - Simple frame buffer with 1080p fixed resolution.
> > - I2S port which is connected to aout1b instead of aout1.
> > - 3 serial ports, only serial3 has CTS/RTS.
> > - No NAND, only eMMC on the board.
> > - OP-TEE support.
>
>
> I did not know "OP-TEE support" was board spec.

Indeed, that is a feature in the firmware on the board. Actually I was
wondering too, but as other boards already have OP-TEE firmware entry,
I decided to add it.

>
> Anyway, I decided to not worry about that.

Thanks :)

>
>
> You are adding lots of redundant code.
>
> Delete as follows.

Thanks for the comment. OK, I'll update it.

>
>
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
> b/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
> index 84ff98d96751..aaf86162da84 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts
> @@ -113,7 +113,6 @@ &serial2 {
>  &serial3 {
>         /* LS connector UART0 */
>         status = "okay";
> -       pinctrl-0 = <&pinctrl_uart3_ctsrts>;
>  };
>
>  &spdif_hiecout1 {
> @@ -155,11 +154,6 @@ &i2c1 {
>         status = "okay";
>  };
>
> -&audio {
> -       pinctrl-0 = <&pinctrl_aout1b>,
> -                   <&pinctrl_aoutiec1>;
> -};
> -
>  &spi3 {
>         status = "okay";
>         #address-cells = <1>;
> @@ -187,14 +181,10 @@ xirq10 {
>         };
>  };
>
> -&pinctrl {
> -       pinctrl_aout1b: aout1b {
> -               groups = "aout1", "aout1b";
> -               function = "aout1";
> -       };
> +&pinctrl_aout1 {
> +       groups = "aout1", "aout1b";
> +};
>
> -       pinctrl_uart3_ctsrts: uart3-ctsrts {
> -               groups = "uart3", "uart3_ctsrts";
> -               function = "uart3";
> -       };
> +&pinctrl_uart3 {
> +       groups = "uart3", "uart3_ctsrts";
>  };
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> index f93519793bfb..afa90b762ea9 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> @@ -337,7 +337,7 @@ gpio: gpio@55000000 {
>                                                      <21 217 3>;
>                 };
>
> -               audio: audio@56000000 {
> +               audio@56000000 {
>                         compatible = "socionext,uniphier-ld20-aio";
>                         reg = <0x56000000 0x80000>;
>                         interrupts = <0 144 4>;
>
>
> Lastly, is the pin-setting "aout1", "aout1b" correct ?

Yes, according to the schematics of Akebi96(*), it is connected to
aout1b(XIRQ*) instead of aout1(AO1*).

(*) https://www.96boards.org/documentation/enterprise/akebi96/hardware-docs/akebi96-schematics.pdf

Best regards,



>
>
>
> --
> Best Regards
> Masahiro Yamada



--
Masami Hiramatsu

Re: [PATCH v2 2/2] arm64: dts: uniphier: Add support for Akebi96

[Masahiro Yamada]

On Mon, Apr 20, 2020 at 10:21 PM Masami Hiramatsu
<masami.hiramatsu@linaro.org> wrote:
> > index f93519793bfb..afa90b762ea9 100644
> > --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> > +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> > @@ -337,7 +337,7 @@ gpio: gpio@55000000 {
> >                                                      <21 217 3>;
> >                 };
> >
> > -               audio: audio@56000000 {
> > +               audio@56000000 {
> >                         compatible = "socionext,uniphier-ld20-aio";
> >                         reg = <0x56000000 0x80000>;
> >                         interrupts = <0 144 4>;
> >
> >
> > Lastly, is the pin-setting "aout1", "aout1b" correct ?
>
> Yes, according to the schematics of Akebi96(*), it is connected to
> aout1b(XIRQ*) instead of aout1(AO1*).
>
> (*) https://www.96boards.org/documentation/enterprise/akebi96/hardware-docs/akebi96-schematics.pdf



So, I was asking about "aout1", not "aout1b".

According to the schematic, nothing is connected to AO1*.
See sheet 6.

Why do you need to assign the apparently unused pins?



-- 
Best Regards
Masahiro Yamada

Re: [PATCH v2 2/2] arm64: dts: uniphier: Add support for Akebi96

[Masami Hiramatsu]

Hi Yamada-san,

2020年4月21日(火) 21:57 Masahiro Yamada <masahiroy@kernel.org>:
>
> On Mon, Apr 20, 2020 at 10:21 PM Masami Hiramatsu
> <masami.hiramatsu@linaro.org> wrote:
> > > index f93519793bfb..afa90b762ea9 100644
> > > --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> > > +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> > > @@ -337,7 +337,7 @@ gpio: gpio@55000000 {
> > >                                                      <21 217 3>;
> > >                 };
> > >
> > > -               audio: audio@56000000 {
> > > +               audio@56000000 {
> > >                         compatible = "socionext,uniphier-ld20-aio";
> > >                         reg = <0x56000000 0x80000>;
> > >                         interrupts = <0 144 4>;
> > >
> > >
> > > Lastly, is the pin-setting "aout1", "aout1b" correct ?
> >
> > Yes, according to the schematics of Akebi96(*), it is connected to
> > aout1b(XIRQ*) instead of aout1(AO1*).
> >
> > (*) https://www.96boards.org/documentation/enterprise/akebi96/hardware-docs/akebi96-schematics.pdf
>
> So, I was asking about "aout1", not "aout1b".

Ah, I got it.

>
> According to the schematic, nothing is connected to AO1*.
> See sheet 6.
>
> Why do you need to assign the apparently unused pins?

No, we don't need it. I confirmed we only need groups = "aout1b".
I'll update the series with that fix.

Thank you!

>
>
>
> --
> Best Regards
> Masahiro Yamada



-- 
Masami Hiramatsu