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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Thomas Gleixner <tglx@linutronix.de>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
	Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>,
	Vadim Vlasov <V.Vlasov@baikalelectronics.ru>,
	Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
	Alessandro Zummo <a.zummo@towertech.it>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>, <linux-mips@vger.kernel.org>,
	<linux-rtc@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v5 0/8] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support
Date: Thu, 21 May 2020 23:48:09 +0300
Message-ID: <20200521204818.25436-1-Sergey.Semin@baikalelectronics.ru> (raw)

As for all Baikal-T1 SoC related patchsets, which need this, we replaced
the DW APB Timer legacy plain text-based dt-binding file with DT schema.
Similarly the MIPS GIC bindings file is also converted to DT schema seeing
it also defines the MIPS GIC Timer binding.

Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a
functionality of two another timers: embedded into the MIPS GIC timer and
three external DW timers available over APB bus. But we can't use them
before the corresponding drivers are properly fixed. First of all DW APB
Timer shouldn't be bound to a single CPU, since as being accessible over
APB they are external with respect to all possible CPUs. Secondly there
might be more than just two DW APB Timers in the system (Baikal-T1 has
three of them), so permit the driver to use one of them as a clocksource
and the rest - for clockevents. Thirdly it's possible to use MIPS GIC
timer as a clocksource so register it in the corresponding subsystem
(the patch has been found in the Paul Burton MIPS repo so I left the
original Signed-off-by attribute). Finally in the same way as r4k timer
the MIPS GIC timer should be used with care when CPUFREQ config is enabled
since in case of CM2 the timer counting depends on the CPU reference clock
frequency while the clocksource subsystem currently doesn't support the
timers with non-stable clock.

This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4:
base-commit: 0e698dfa2822 ("Linux 5.7-rc4")
tag: v5.7-rc4

Changelog v2:
- Fix the SoB tags.
- Our corporate email server doesn't change Message-Id anymore, so the
  patchset is resubmitted being in the cover-letter-threaded format.
- Convert the "snps,dw-apb-timer" binding to DT schema in a dedicated
  patch.
- Convert the "mti,gic" binding to DT schema in a dedicated patch.

Link: https://lore.kernel.org/linux-rtc/20200324174325.14213-1-Sergey.Semin@baikalelectronics.ru
Changelog v3:
- Make the MIPS GIC timer sub-node name not having a unit-address number.
- Discard allOf: [ $ref: /schemas/interrupt-controller.yaml# ] from MIPS
  GIC bindings.
- Add patch moving the "snps,dw-apb-timer" binding file to the directory
  with timers binding files.

Link: https://lore.kernel.org/linux-rtc/20200506214107.25956-1-Sergey.Semin@baikalelectronics.ru
Changelog v4:
- Mark clocksource as unstable instead of lowering its rating.
- Move conditional sched clocks registration to the Paul' patch.
- Add Thomas Gleixner to the patchset To-list to draw his attention to the
  patch "dt-bindings: interrupt-controller: Convert mti,gic to DT schema".

Link: https://lore.kernel.org/linux-rtc/20200521005321.12129-1-Sergey.Semin@baikalelectronics.ru/
Changelog v5:
- Fix mistakenly added "git_" prefix. Obviously it was supposed to be gic_.
- Add new patch "clocksource: dw_apb_timer: Affiliate of-based timer with
  any CPU"

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>
Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>
Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Cc: Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>
Cc: Vadim Vlasov <V.Vlasov@baikalelectronics.ru>
Cc: Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-rtc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Paul Burton (1):
  clocksource: mips-gic-timer: Register as sched_clock

Serge Semin (7):
  dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema
  dt-bindings: timer: Move snps,dw-apb-timer DT schema from rtc
  dt-bindings: interrupt-controller: Convert mti,gic to DT schema
  clocksource: dw_apb_timer: Make CPU-affiliation being optional
  clocksource: dw_apb_timer: Affiliate of-based timer with any CPU
  clocksource: dw_apb_timer_of: Fix missing clockevent timers
  clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock
    changes

 .../interrupt-controller/mips-gic.txt         |  67 --------
 .../interrupt-controller/mti,gic.yaml         | 148 ++++++++++++++++++
 .../devicetree/bindings/rtc/dw-apb.txt        |  32 ----
 .../bindings/timer/snps,dw-apb-timer.yaml     |  88 +++++++++++
 drivers/clocksource/Kconfig                   |   1 +
 drivers/clocksource/dw_apb_timer.c            |   5 +-
 drivers/clocksource/dw_apb_timer_of.c         |   8 +-
 drivers/clocksource/mips-gic-timer.c          |  50 +++++-
 8 files changed, 288 insertions(+), 111 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml
 delete mode 100644 Documentation/devicetree/bindings/rtc/dw-apb.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml

-- 
2.25.1


             reply index

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-21 20:48 Serge Semin [this message]
2020-05-21 20:48 ` [PATCH v5 1/8] dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema Serge Semin
2020-05-21 20:48 ` [PATCH v5 2/8] dt-bindings: timer: Move snps,dw-apb-timer DT schema from rtc Serge Semin
2020-05-21 20:48 ` [PATCH v5 3/8] dt-bindings: interrupt-controller: Convert mti,gic to DT schema Serge Semin
2020-05-21 20:48 ` [PATCH v5 4/8] clocksource: dw_apb_timer: Make CPU-affiliation being optional Serge Semin
2020-06-01 13:11   ` [tip: timers/core] " tip-bot2 for Serge Semin
2020-05-21 20:48 ` [PATCH v5 5/8] clocksource: dw_apb_timer: Affiliate of-based timer with any CPU Serge Semin
2020-06-01 13:11   ` [tip: timers/core] " tip-bot2 for Serge Semin
2020-05-21 20:48 ` [PATCH v5 6/8] clocksource: dw_apb_timer_of: Fix missing clockevent timers Serge Semin
2020-06-01 13:11   ` [tip: timers/core] " tip-bot2 for Serge Semin
2020-05-21 20:48 ` [PATCH v5 7/8] clocksource: mips-gic-timer: Register as sched_clock Serge Semin
2020-06-01 13:11   ` [tip: timers/core] " tip-bot2 for Paul Burton
2020-05-21 20:48 ` [PATCH v5 8/8] clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes Serge Semin
2020-06-01 13:11   ` [tip: timers/core] " tip-bot2 for Serge Semin
2020-05-22 15:28 ` [PATCH v5 0/8] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support Daniel Lezcano
2020-05-22 15:41   ` Serge Semin
2020-05-22 15:44     ` Daniel Lezcano
2020-05-22 16:02       ` Serge Semin

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