[PATCH 0/3] Add PCIe EP to RZ/G2H

[PATCH 0/3] Add PCIe EP to RZ/G2H

[Lad Prabhakar]

Hi All,

This patch series adds PCIe EP support to R8A774E1 SoC.

patch 2/3 applies on top of [1] and patch 3/3 is dependent
on series [2].

[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/
    renesas-devel.git/log/?h=renesas-arm-dt-for-v5.10
[2] https://patchwork.kernel.org/project/linux-pci/list/
    ?series=332849&submitter=&state=&q=&archive=&delegate=

Cheers,
Prabhakar


Lad Prabhakar (3):
  dt-bindings: pci: rcar-pci-ep: Document r8a774e1
  arm64: dts: renesas: r8a774e1: Add PCIe EP nodes
  misc: pci_endpoint_test: Add Device ID for RZ/G2H PCIe controller

 .../devicetree/bindings/pci/rcar-pci-ep.yaml  |  1 +
 arch/arm64/boot/dts/renesas/r8a774e1.dtsi     | 38 +++++++++++++++++++
 drivers/misc/pci_endpoint_test.c              |  2 +
 3 files changed, 41 insertions(+)

-- 
2.17.1

[PATCH 1/3] dt-bindings: pci: rcar-pci-ep: Document r8a774e1

[Lad Prabhakar]

Document the support for R-Car PCIe EP on R8A774E1 SoC device.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
index 70c45f72ab20..a059c96c294b 100644
--- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
@@ -18,6 +18,7 @@ properties:
           - renesas,r8a774a1-pcie-ep     # RZ/G2M
           - renesas,r8a774b1-pcie-ep     # RZ/G2N
           - renesas,r8a774c0-pcie-ep     # RZ/G2E
+          - renesas,r8a774e1-pcie-ep     # RZ/G2H
       - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2
 
   reg:
-- 
2.17.1

[PATCH 2/3] arm64: dts: renesas: r8a774e1: Add PCIe EP nodes

[Lad Prabhakar]

Add PCIe EP nodes for R8A774E1 Soc dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 38 +++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
index e5445ba99e84..272df6022442 100644
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
@@ -2468,6 +2468,44 @@
 			status = "disabled";
 		};
 
+		pciec0_ep: pcie-ep@fe000000 {
+			compatible = "renesas,r8a774e1-pcie-ep",
+				     "renesas,rcar-gen3-pcie-ep";
+			reg = <0x0 0xfe000000 0 0x80000>,
+			      <0x0 0xfe100000 0 0x100000>,
+			      <0x0 0xfe200000 0 0x200000>,
+			      <0x0 0x30000000 0 0x8000000>,
+			      <0x0 0x38000000 0 0x8000000>;
+			reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 319>;
+			clock-names = "pcie";
+			resets = <&cpg 319>;
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			status = "disabled";
+		};
+
+		pciec1_ep: pcie-ep@ee800000 {
+			compatible = "renesas,r8a774e1-pcie-ep",
+				     "renesas,rcar-gen3-pcie-ep";
+			reg = <0x0 0xee800000 0 0x80000>,
+			      <0x0 0xee900000 0 0x100000>,
+			      <0x0 0xeea00000 0 0x200000>,
+			      <0x0 0xc0000000 0 0x8000000>,
+			      <0x0 0xc8000000 0 0x8000000>;
+			reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 318>;
+			clock-names = "pcie";
+			resets = <&cpg 318>;
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			status = "disabled";
+		};
+
 		vspbc: vsp@fe920000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfe920000 0 0x8000>;
-- 
2.17.1

[PATCH 3/3] misc: pci_endpoint_test: Add Device ID for RZ/G2H PCIe controller

[Lad Prabhakar]

Add Renesas R8A774E1 in pci_device_id table so that pci-epf-test
can be used for testing PCIe EP on RZ/G2H.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/misc/pci_endpoint_test.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
index ba654f42dc10..ed7425bb073d 100644
--- a/drivers/misc/pci_endpoint_test.c
+++ b/drivers/misc/pci_endpoint_test.c
@@ -77,6 +77,7 @@
 #define PCI_DEVICE_ID_RENESAS_R8A774A1		0x0028
 #define PCI_DEVICE_ID_RENESAS_R8A774B1		0x002b
 #define PCI_DEVICE_ID_RENESAS_R8A774C0		0x002d
+#define PCI_DEVICE_ID_RENESAS_R8A774E1		0x0025
 
 static DEFINE_IDA(pci_endpoint_test_ida);
 
@@ -955,6 +956,7 @@ static const struct pci_device_id pci_endpoint_test_tbl[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774A1),},
 	{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774B1),},
 	{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774C0),},
+	{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774E1),},
 	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
 	  .driver_data = (kernel_ulong_t)&j721e_data,
 	},
-- 
2.17.1

Re: [PATCH 1/3] dt-bindings: pci: rcar-pci-ep: Document r8a774e1

[Geert Uytterhoeven]

On Fri, Sep 4, 2020 at 12:40 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Document the support for R-Car PCIe EP on R8A774E1 SoC device.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/3] misc: pci_endpoint_test: Add Device ID for RZ/G2H PCIe controller

[Geert Uytterhoeven]

On Fri, Sep 4, 2020 at 12:40 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Add Renesas R8A774E1 in pci_device_id table so that pci-epf-test
> can be used for testing PCIe EP on RZ/G2H.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/3] arm64: dts: renesas: r8a774e1: Add PCIe EP nodes

[Geert Uytterhoeven]

On Fri, Sep 4, 2020 at 12:40 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Add PCIe EP nodes for R8A774E1 Soc dtsi.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.10.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 0/3] Add PCIe EP to RZ/G2H

[Lorenzo Pieralisi]

On Fri, Sep 04, 2020 at 11:38:48AM +0100, Lad Prabhakar wrote:
> Hi All,
> 
> This patch series adds PCIe EP support to R8A774E1 SoC.
> 
> patch 2/3 applies on top of [1] and patch 3/3 is dependent
> on series [2].
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/
>     renesas-devel.git/log/?h=renesas-arm-dt-for-v5.10
> [2] https://patchwork.kernel.org/project/linux-pci/list/
>     ?series=332849&submitter=&state=&q=&archive=&delegate=
> 
> Cheers,
> Prabhakar
> 
> 
> Lad Prabhakar (3):
>   dt-bindings: pci: rcar-pci-ep: Document r8a774e1
>   arm64: dts: renesas: r8a774e1: Add PCIe EP nodes
>   misc: pci_endpoint_test: Add Device ID for RZ/G2H PCIe controller
> 
>  .../devicetree/bindings/pci/rcar-pci-ep.yaml  |  1 +
>  arch/arm64/boot/dts/renesas/r8a774e1.dtsi     | 38 +++++++++++++++++++
>  drivers/misc/pci_endpoint_test.c              |  2 +
>  3 files changed, 41 insertions(+)

Took patches (1) and (3) in pci/rcar, thanks.

Lorenzo

Re: [PATCH 1/3] dt-bindings: pci: rcar-pci-ep: Document r8a774e1

[Bjorn Helgaas]

On Fri, Sep 04, 2020 at 11:38:49AM +0100, Lad Prabhakar wrote:
> Document the support for R-Car PCIe EP on R8A774E1 SoC device.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> index 70c45f72ab20..a059c96c294b 100644
> --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> @@ -18,6 +18,7 @@ properties:
>            - renesas,r8a774a1-pcie-ep     # RZ/G2M
>            - renesas,r8a774b1-pcie-ep     # RZ/G2N
>            - renesas,r8a774c0-pcie-ep     # RZ/G2E
> +          - renesas,r8a774e1-pcie-ep     # RZ/G2H

This is on Lorenzo's pci/rcar branch and headed to -next.

There's a similar older commit on that branch, 2de82ec86674
("dt-bindings: pci: rcar-pci-ep: Document r8a774a1 and r8a774b1") that
came with a companion that added device IDs to pci_endpoint_test.c:
cfb824ddd1c0 ("misc: pci_endpoint_test: Add Device ID for RZ/G2M and
RZ/G2N PCIe controllers").

Is there, or should there be a similar device ID patch for
renesas,r8a774e1-pcie-ep?

>        - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2
>  
>    reg:
> -- 
> 2.17.1
> 

Re: [PATCH 1/3] dt-bindings: pci: rcar-pci-ep: Document r8a774e1

[Bjorn Helgaas]

On Tue, Sep 08, 2020 at 02:26:01PM -0500, Bjorn Helgaas wrote:
> On Fri, Sep 04, 2020 at 11:38:49AM +0100, Lad Prabhakar wrote:
> > Document the support for R-Car PCIe EP on R8A774E1 SoC device.
> > 
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> >  Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> > index 70c45f72ab20..a059c96c294b 100644
> > --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> > +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> > @@ -18,6 +18,7 @@ properties:
> >            - renesas,r8a774a1-pcie-ep     # RZ/G2M
> >            - renesas,r8a774b1-pcie-ep     # RZ/G2N
> >            - renesas,r8a774c0-pcie-ep     # RZ/G2E
> > +          - renesas,r8a774e1-pcie-ep     # RZ/G2H
> 
> This is on Lorenzo's pci/rcar branch and headed to -next.
> 
> There's a similar older commit on that branch, 2de82ec86674
> ("dt-bindings: pci: rcar-pci-ep: Document r8a774a1 and r8a774b1") that
> came with a companion that added device IDs to pci_endpoint_test.c:
> cfb824ddd1c0 ("misc: pci_endpoint_test: Add Device ID for RZ/G2M and
> RZ/G2N PCIe controllers").
> 
> Is there, or should there be a similar device ID patch for
> renesas,r8a774e1-pcie-ep?

Sheesh, sorry, could have saved all of us a little time if I'd
scrolled up to see the next patch, a63c5f3db07d ("misc:
pci_endpoint_test: Add Device ID for RZ/G2H PCIe controller")