* [PATCH v2 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller
2020-09-25 10:31 [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
@ 2020-09-25 10:31 ` Srinivas Kandagatla
2020-09-28 17:24 ` Rob Herring
2020-09-25 10:31 ` [PATCH v2 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller Srinivas Kandagatla
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Srinivas Kandagatla @ 2020-09-25 10:31 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm,
linux-kernel, Srinivas Kandagatla
Audio Clock controller is a block inside LPASS which controls
2 Glitch free muxes to LPASS codec Macros.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/clock/qcom,audiocc-sm8250.yaml | 58 +++++++++++++++++++
.../clock/qcom,sm8250-lpass-audiocc.h | 13 +++++
2 files changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
new file mode 100644
index 000000000000..915d76206ad0
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ The clock consumer should specify the desired clock by having the clock
+ ID in its "clocks" phandle cell.
+ See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
+ of Audio Clock controller clock IDs.
+
+properties:
+ compatible:
+ const: qcom,sm8250-lpass-audiocc
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ clocks:
+ items:
+ - description: LPASS Core voting clock
+ - description: Glitch Free Mux register clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: bus
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
+ #include <dt-bindings/sound/qcom,q6afe.h>
+ clock-controller@3300000 {
+ #clock-cells = <1>;
+ compatible = "qcom,sm8250-lpass-audiocc";
+ reg = <0x03300000 0x30000>;
+ clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "core", "bus";
+ };
diff --git a/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h b/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
new file mode 100644
index 000000000000..a1aa6cb5d840
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H
+#define _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H
+
+/* From AudioCC */
+#define LPASS_CDC_WSA_NPL 0
+#define LPASS_CDC_WSA_MCLK 1
+#define LPASS_CDC_RX_MCLK 2
+#define LPASS_CDC_RX_NPL 3
+#define LPASS_CDC_RX_MCLK_MCLK2 4
+
+#endif /* _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H */
--
2.21.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller
2020-09-25 10:31 ` [PATCH v2 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller Srinivas Kandagatla
@ 2020-09-28 17:24 ` Rob Herring
0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2020-09-28 17:24 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: devicetree, linux-arm-msm, sboyd, bjorn.andersson, linux-kernel,
robh+dt, mturquette, linux-clk
On Fri, 25 Sep 2020 11:31:12 +0100, Srinivas Kandagatla wrote:
> Audio Clock controller is a block inside LPASS which controls
> 2 Glitch free muxes to LPASS codec Macros.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/clock/qcom,audiocc-sm8250.yaml | 58 +++++++++++++++++++
> .../clock/qcom,sm8250-lpass-audiocc.h | 13 +++++
> 2 files changed, 71 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
> create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
>
My bot found errors running 'make dt_binding_check' on your patch:
Error: Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.example.dts:25.30-31 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1366: dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1371157
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller
2020-09-25 10:31 [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
2020-09-25 10:31 ` [PATCH v2 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller Srinivas Kandagatla
@ 2020-09-25 10:31 ` Srinivas Kandagatla
2020-09-28 17:26 ` Rob Herring
2020-09-25 10:31 ` [PATCH v2 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks Srinivas Kandagatla
` (2 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Srinivas Kandagatla @ 2020-09-25 10:31 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm,
linux-kernel, Srinivas Kandagatla
Always ON Clock controller is a block inside LPASS which controls
1 Glitch free muxes to LPASS codec Macros.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/clock/qcom,aoncc-sm8250.yaml | 58 +++++++++++++++++++
.../clock/qcom,sm8250-lpass-aoncc.h | 11 ++++
2 files changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
new file mode 100644
index 000000000000..c40a74b5d672
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ The clock consumer should specify the desired clock by having the clock
+ ID in its "clocks" phandle cell.
+ See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
+ of Audio Clock controller clock IDs.
+
+properties:
+ compatible:
+ const: qcom,sm8250-lpass-aon
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ clocks:
+ items:
+ - description: LPASS Core voting clock
+ - description: Glitch Free Mux register clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: bus
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
+ #include <dt-bindings/sound/qcom,q6afe.h>
+ clock-controller@3800000 {
+ #clock-cells = <1>;
+ compatible = "qcom,sm8250-lpass-aon";
+ reg = <0x03380000 0x40000>;
+ clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "core", "bus";
+ };
diff --git a/include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h b/include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
new file mode 100644
index 000000000000..f5a1cfac8612
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _DT_BINDINGS_CLK_LPASS_AONCC_SM8250_H
+#define _DT_BINDINGS_CLK_LPASS_AONCC_SM8250_H
+
+/* from AOCC */
+#define LPASS_CDC_VA_MCLK 0
+#define LPASS_CDC_TX_NPL 1
+#define LPASS_CDC_TX_MCLK 2
+
+#endif /* _DT_BINDINGS_CLK_LPASS_AONCC_SM8250_H */
--
2.21.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller
2020-09-25 10:31 ` [PATCH v2 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller Srinivas Kandagatla
@ 2020-09-28 17:26 ` Rob Herring
0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2020-09-28 17:26 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: linux-arm-msm, bjorn.andersson, sboyd, robh+dt, linux-clk,
devicetree, linux-kernel, mturquette
On Fri, 25 Sep 2020 11:31:13 +0100, Srinivas Kandagatla wrote:
> Always ON Clock controller is a block inside LPASS which controls
> 1 Glitch free muxes to LPASS codec Macros.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/clock/qcom,aoncc-sm8250.yaml | 58 +++++++++++++++++++
> .../clock/qcom,sm8250-lpass-aoncc.h | 11 ++++
> 2 files changed, 69 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
> create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
>
My bot found errors running 'make dt_binding_check' on your patch:
Error: Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.example.dts:25.30-31 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1366: dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1371159
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
2020-09-25 10:31 [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
2020-09-25 10:31 ` [PATCH v2 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller Srinivas Kandagatla
2020-09-25 10:31 ` [PATCH v2 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller Srinivas Kandagatla
@ 2020-09-25 10:31 ` Srinivas Kandagatla
2020-10-14 1:51 ` Stephen Boyd
2020-09-25 10:31 ` [PATCH v2 4/4] clk: qcom: Add support to LPASS AON_CC " Srinivas Kandagatla
2020-10-14 1:45 ` [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Stephen Boyd
4 siblings, 1 reply; 10+ messages in thread
From: Srinivas Kandagatla @ 2020-09-25 10:31 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm,
linux-kernel, Srinivas Kandagatla
GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
This patch adds support to these muxes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/clk/qcom/Kconfig | 6 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/lpass-gfm-sm8250.c | 260 ++++++++++++++++++++++++++++
3 files changed, 267 insertions(+)
create mode 100644 drivers/clk/qcom/lpass-gfm-sm8250.c
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 058327310c25..08078f4b0591 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -475,4 +475,10 @@ config KRAITCC
Support for the Krait CPU clocks on Qualcomm devices.
Say Y if you want to support CPU frequency scaling.
+config CLK_GFM_LPASS_SM8250
+ tristate "GFM LPASS Clocks"
+ help
+ Support for the GFM Glitch Free Mux LPASS clock. Say Y
+ if you want to support GFM Clocks on LPASS for SM8250 SoC.
+
endif
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 9677e769e7e9..7465cabc86aa 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -19,6 +19,7 @@ clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o
# Keep alphabetically sorted by config
obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o
obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
+obj-$(CONFIG_CLK_GFM_LPASS_SM8250) += lpass-gfm-sm8250.o
obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
obj-$(CONFIG_IPQ_APSS_6018) += apss-ipq6018.o
obj-$(CONFIG_IPQ_GCC_4019) += gcc-ipq4019.o
diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
new file mode 100644
index 000000000000..c79854e1494d
--- /dev/null
+++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
@@ -0,0 +1,260 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * LPASS Audio CC and Always ON CC Glitch Free Mux clock driver
+ *
+ * Copyright (c) 2020 Linaro Ltd.
+ * Author: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/clk-provider.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/pm_clock.h>
+#include <linux/pm_runtime.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/of_device.h>
+#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
+
+struct lpass_gfm {
+ struct device *dev;
+ void __iomem *base;
+};
+
+struct clk_gfm {
+ unsigned int mux_reg;
+ unsigned int mux_mask;
+ struct clk_hw hw;
+ struct lpass_gfm *priv;
+ void __iomem *gfm_mux;
+};
+
+#define GFM_MASK BIT(1)
+#define to_clk_gfm(_hw) container_of(_hw, struct clk_gfm, hw)
+
+static u8 clk_gfm_get_parent(struct clk_hw *hw)
+{
+ struct clk_gfm *clk = to_clk_gfm(hw);
+
+ return readl(clk->gfm_mux) & GFM_MASK;
+}
+
+static int clk_gfm_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct clk_gfm *clk = to_clk_gfm(hw);
+ unsigned int val;
+
+ val = readl(clk->gfm_mux);
+
+ if (index)
+ val |= GFM_MASK;
+ else
+ val &= ~GFM_MASK;
+
+ writel(val, clk->gfm_mux);
+
+ return 0;
+}
+
+static const struct clk_ops clk_gfm_ops = {
+ .get_parent = clk_gfm_get_parent,
+ .set_parent = clk_gfm_set_parent,
+ .determine_rate = __clk_mux_determine_rate,
+};
+
+static struct clk_gfm lpass_gfm_wsa_mclk = {
+ .mux_reg = 0x220d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "WSA_MCLK",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_data = (const struct clk_parent_data[]){
+ {
+ .index = 0,
+ .name = "LPASS_CLK_ID_TX_CORE_MCLK",
+ }, {
+ .index = 1,
+ .name = "LPASS_CLK_ID_WSA_CORE_MCLK",
+ },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm lpass_gfm_wsa_npl = {
+ .mux_reg = 0x220d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "WSA_NPL",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_data = (const struct clk_parent_data[]){
+ {
+ .index = 0,
+ .name = "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
+ }, {
+ .index = 1,
+ .name = "LPASS_CLK_ID_WSA_CORE_NPL_MCLK",
+ },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm lpass_gfm_rx_mclk_mclk2 = {
+ .mux_reg = 0x240d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "RX_MCLK_MCLK2",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_data = (const struct clk_parent_data[]){
+ {
+ .index = 0,
+ .name = "LPASS_CLK_ID_TX_CORE_MCLK",
+ }, {
+ .index = 1,
+ .name = "LPASS_CLK_ID_RX_CORE_MCLK",
+ },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm lpass_gfm_rx_npl = {
+ .mux_reg = 0x240d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "RX_NPL",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_data = (const struct clk_parent_data[]){
+ {
+ .index = 0,
+ .name = "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
+ }, {
+ .index = 1,
+ .name = "LPASS_CLK_ID_RX_CORE_NPL_MCLK",
+ },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm *audiocc_gfm_clks[] = {
+ [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl,
+ [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk,
+ [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl,
+ [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2,
+};
+
+static struct clk_hw_onecell_data audiocc_hw_onecell_data = {
+ .hws = {
+ [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl.hw,
+ [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk.hw,
+ [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl.hw,
+ [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2.hw,
+ },
+ .num = ARRAY_SIZE(audiocc_gfm_clks),
+};
+
+struct lpass_gfm_data {
+ struct clk_hw_onecell_data *onecell_data;
+ struct clk_gfm **gfm_clks;
+};
+
+static struct lpass_gfm_data audiocc_data = {
+ .onecell_data = &audiocc_hw_onecell_data,
+ .gfm_clks = audiocc_gfm_clks,
+};
+
+static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
+{
+ const struct lpass_gfm_data *data;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct clk_gfm *gfm;
+ struct lpass_gfm *cc;
+ int err, i;
+
+ data = of_device_get_match_data(dev);
+ if (!data)
+ return -EINVAL;
+
+ cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
+ if (!cc)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ cc->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(cc->base))
+ return PTR_ERR(cc->base);
+
+ pm_runtime_enable(dev);
+ err = pm_clk_create(dev);
+ if (err)
+ goto pm_clk_err;
+
+ err = of_pm_clk_add_clks(dev);
+ if (err < 0) {
+ dev_dbg(dev, "Failed to get lpass core voting clocks\n");
+ goto clk_reg_err;
+ }
+
+ for (i = 0; i < data->onecell_data->num; i++) {
+ if (!data->gfm_clks[i])
+ continue;
+
+ gfm = data->gfm_clks[i];
+ gfm->priv = cc;
+ gfm->gfm_mux = cc->base;
+ gfm->gfm_mux = gfm->gfm_mux + data->gfm_clks[i]->mux_reg;
+
+ err = devm_clk_hw_register(dev, &data->gfm_clks[i]->hw);
+ if (err)
+ goto clk_reg_err;
+
+ }
+
+ err = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
+ data->onecell_data);
+ if (err)
+ goto clk_reg_err;
+
+ return 0;
+
+clk_reg_err:
+ pm_clk_destroy(dev);
+pm_clk_err:
+ pm_runtime_disable(dev);
+ return err;
+}
+
+static const struct of_device_id lpass_gfm_clk_match_table[] = {
+ {
+ .compatible = "qcom,sm8250-lpass-audiocc",
+ .data = &audiocc_data,
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(of, lpass_gfm_clk_match_table);
+
+static const struct dev_pm_ops lpass_gfm_pm_ops = {
+ SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
+};
+
+static struct platform_driver lpass_gfm_clk_driver = {
+ .probe = lpass_gfm_clk_driver_probe,
+ .driver = {
+ .name = "lpass-gfm-clk",
+ .of_match_table = lpass_gfm_clk_match_table,
+ .pm = &lpass_gfm_pm_ops,
+ },
+};
+module_platform_driver(lpass_gfm_clk_driver);
+MODULE_LICENSE("GPL v2");
--
2.21.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
2020-09-25 10:31 ` [PATCH v2 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks Srinivas Kandagatla
@ 2020-10-14 1:51 ` Stephen Boyd
0 siblings, 0 replies; 10+ messages in thread
From: Stephen Boyd @ 2020-10-14 1:51 UTC (permalink / raw)
To: Srinivas Kandagatla, devicetree, linux-clk
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm,
linux-kernel, Srinivas Kandagatla
Quoting Srinivas Kandagatla (2020-09-25 03:31:14)
> GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
> This patch adds support to these muxes.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> drivers/clk/qcom/Kconfig | 6 +
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/lpass-gfm-sm8250.c | 260 ++++++++++++++++++++++++++++
> 3 files changed, 267 insertions(+)
> create mode 100644 drivers/clk/qcom/lpass-gfm-sm8250.c
>
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 058327310c25..08078f4b0591 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -475,4 +475,10 @@ config KRAITCC
> Support for the Krait CPU clocks on Qualcomm devices.
> Say Y if you want to support CPU frequency scaling.
>
> +config CLK_GFM_LPASS_SM8250
> + tristate "GFM LPASS Clocks"
Can we get SM8250 in the name? And also sort this into the other SoC
compatible strings with a name that matches how it's been done
otherwise. I guess CONFIG_SM_LPASS_8250? GFM for Glitch Free Mux doesn't
seem very important unless it is actually part of the device name?
> + help
> + Support for the GFM Glitch Free Mux LPASS clock. Say Y
I'd write "Support for the Glitch Free Mux (GFM) Low power audio
subsystem (LPASS) clocks found on SM8250 SoCs."
> + if you want to support GFM Clocks on LPASS for SM8250 SoC.
> +
> endif
> diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
> new file mode 100644
> index 000000000000..c79854e1494d
> --- /dev/null
> +++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
> @@ -0,0 +1,260 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * LPASS Audio CC and Always ON CC Glitch Free Mux clock driver
> + *
> + * Copyright (c) 2020 Linaro Ltd.
> + * Author: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/clk-provider.h>
> +#include <linux/io.h>
> +#include <linux/clk.h>
Is this include used?
> +#include <linux/slab.h>
> +#include <linux/err.h>
> +#include <linux/pm_clock.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/device.h>
> +#include <linux/platform_device.h>
> +#include <linux/of_device.h>
> +#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
> +
> +static struct clk_gfm lpass_gfm_wsa_mclk = {
> + .mux_reg = 0x220d8,
> + .mux_mask = BIT(0),
> + .hw.init = &(struct clk_init_data) {
> + .name = "WSA_MCLK",
> + .ops = &clk_gfm_ops,
> + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
> + .parent_data = (const struct clk_parent_data[]){
> + {
> + .index = 0,
> + .name = "LPASS_CLK_ID_TX_CORE_MCLK",
Can these use .fw_name instead of .name? The .fw_name is the future and
.name is for drivers that don't use DT bindings or existed before we
parsed clks from DT in the core.
> + }, {
> + .index = 1,
> + .name = "LPASS_CLK_ID_WSA_CORE_MCLK",
> + },
> + },
> + .num_parents = 2,
> + },
> +};
> +
[...]
> +static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
> +{
> + const struct lpass_gfm_data *data;
> + struct device *dev = &pdev->dev;
> + struct resource *res;
> + struct clk_gfm *gfm;
> + struct lpass_gfm *cc;
> + int err, i;
> +
> + data = of_device_get_match_data(dev);
> + if (!data)
> + return -EINVAL;
> +
> + cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
> + if (!cc)
> + return -ENOMEM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + cc->base = devm_ioremap_resource(dev, res);
devm_platform_ioremap_resource()
> + if (IS_ERR(cc->base))
> + return PTR_ERR(cc->base);
> +
> + pm_runtime_enable(dev);
> + err = pm_clk_create(dev);
> + if (err)
> + goto pm_clk_err;
> +
> + err = of_pm_clk_add_clks(dev);
> + if (err < 0) {
> + dev_dbg(dev, "Failed to get lpass core voting clocks\n");
> + goto clk_reg_err;
> + }
> +
> + for (i = 0; i < data->onecell_data->num; i++) {
> + if (!data->gfm_clks[i])
> + continue;
> +
> + gfm = data->gfm_clks[i];
> + gfm->priv = cc;
> + gfm->gfm_mux = cc->base;
> + gfm->gfm_mux = gfm->gfm_mux + data->gfm_clks[i]->mux_reg;
> +
> + err = devm_clk_hw_register(dev, &data->gfm_clks[i]->hw);
> + if (err)
> + goto clk_reg_err;
> +
> + }
> +
> + err = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
> + data->onecell_data);
> + if (err)
> + goto clk_reg_err;
> +
> + return 0;
> +
> +clk_reg_err:
> + pm_clk_destroy(dev);
> +pm_clk_err:
> + pm_runtime_disable(dev);
> + return err;
> +}
> +
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 4/4] clk: qcom: Add support to LPASS AON_CC Glitch Free Mux clocks
2020-09-25 10:31 [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
` (2 preceding siblings ...)
2020-09-25 10:31 ` [PATCH v2 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks Srinivas Kandagatla
@ 2020-09-25 10:31 ` Srinivas Kandagatla
2020-10-14 1:45 ` [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Stephen Boyd
4 siblings, 0 replies; 10+ messages in thread
From: Srinivas Kandagatla @ 2020-09-25 10:31 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm,
linux-kernel, Srinivas Kandagatla
LPASS Always ON Clock controller has one GFM mux to control VA
and TX clocks to codec macro on LPASS.
This patch adds support to this mux.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/clk/qcom/lpass-gfm-sm8250.c | 63 +++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
index c79854e1494d..61a89347885e 100644
--- a/drivers/clk/qcom/lpass-gfm-sm8250.c
+++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
@@ -19,6 +19,7 @@
#include <linux/platform_device.h>
#include <linux/of_device.h>
#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
+#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
struct lpass_gfm {
struct device *dev;
@@ -66,6 +67,46 @@ static const struct clk_ops clk_gfm_ops = {
.determine_rate = __clk_mux_determine_rate,
};
+static struct clk_gfm lpass_gfm_va_mclk = {
+ .mux_reg = 0x20000,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "VA_MCLK",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .num_parents = 2,
+ .parent_data = (const struct clk_parent_data[]){
+ {
+ .index = 0,
+ .name = "LPASS_CLK_ID_TX_CORE_MCLK",
+ }, {
+ .index = 1,
+ .name = "LPASS_CLK_ID_VA_CORE_MCLK",
+ },
+ },
+ },
+};
+
+static struct clk_gfm lpass_gfm_tx_npl = {
+ .mux_reg = 0x20000,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "TX_NPL",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_data = (const struct clk_parent_data[]){
+ {
+ .index = 0,
+ .name = "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
+ }, {
+ .index = 1,
+ .name = "LPASS_CLK_ID_VA_CORE_2X_MCLK",
+ },
+ },
+ .num_parents = 2,
+ },
+};
+
static struct clk_gfm lpass_gfm_wsa_mclk = {
.mux_reg = 0x220d8,
.mux_mask = BIT(0),
@@ -146,6 +187,19 @@ static struct clk_gfm lpass_gfm_rx_npl = {
},
};
+static struct clk_gfm *aoncc_gfm_clks[] = {
+ [LPASS_CDC_VA_MCLK] = &lpass_gfm_va_mclk,
+ [LPASS_CDC_TX_NPL] = &lpass_gfm_tx_npl,
+};
+
+static struct clk_hw_onecell_data aoncc_hw_onecell_data = {
+ .hws = {
+ [LPASS_CDC_VA_MCLK] = &lpass_gfm_va_mclk.hw,
+ [LPASS_CDC_TX_NPL] = &lpass_gfm_tx_npl.hw,
+ },
+ .num = ARRAY_SIZE(aoncc_gfm_clks),
+};
+
static struct clk_gfm *audiocc_gfm_clks[] = {
[LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl,
[LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk,
@@ -173,6 +227,11 @@ static struct lpass_gfm_data audiocc_data = {
.gfm_clks = audiocc_gfm_clks,
};
+static struct lpass_gfm_data aoncc_data = {
+ .onecell_data = &aoncc_hw_onecell_data,
+ .gfm_clks = aoncc_gfm_clks,
+};
+
static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
{
const struct lpass_gfm_data *data;
@@ -236,6 +295,10 @@ static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
}
static const struct of_device_id lpass_gfm_clk_match_table[] = {
+ {
+ .compatible = "qcom,sm8250-lpass-aoncc",
+ .data = &aoncc_data,
+ },
{
.compatible = "qcom,sm8250-lpass-audiocc",
.data = &audiocc_data,
--
2.21.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers
2020-09-25 10:31 [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
` (3 preceding siblings ...)
2020-09-25 10:31 ` [PATCH v2 4/4] clk: qcom: Add support to LPASS AON_CC " Srinivas Kandagatla
@ 2020-10-14 1:45 ` Stephen Boyd
2020-10-16 13:57 ` Srinivas Kandagatla
4 siblings, 1 reply; 10+ messages in thread
From: Stephen Boyd @ 2020-10-14 1:45 UTC (permalink / raw)
To: Srinivas Kandagatla, devicetree, linux-clk
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm,
linux-kernel, Srinivas Kandagatla
Quoting Srinivas Kandagatla (2020-09-25 03:31:11)
> This patchset adds support for GFM Muxes found in LPASS
> (Low Power Audio SubSystem) IP in Audio Clock Controller
> and Always ON clock controller.
>
> Clocks derived from these muxes are consumed by LPASS Digital Codec.
> Currently the driver for Audio and Always ON clock controller only
> supports GFM Muxes, however it should be easy to add more clock
> support when required
>
> Changes since v1:
> -removed unnecessary Kconfig dependencies
> - cleaned up header includes.
> - moved to using pm_clk
> - Moved to right place in Makefile
> - moved to use module_platform_driver instead of builtin_platform_driver
> - add null check for of_device_get_match_data
>
> verified dt_binding_check to pass on linux next https://paste.ubuntu.com/p/6nVzjRwvsW/
Rob's bot complained again. Can you run with
make DT_SCHEMA_FILES=<path to schema file.yaml> dt_binding_check
and make sure the schema is up to date?
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers
2020-10-14 1:45 ` [PATCH v2 0/4] clk: qcom : add sm8250 LPASS GFM drivers Stephen Boyd
@ 2020-10-16 13:57 ` Srinivas Kandagatla
0 siblings, 0 replies; 10+ messages in thread
From: Srinivas Kandagatla @ 2020-10-16 13:57 UTC (permalink / raw)
To: Stephen Boyd, devicetree, linux-clk
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel
thanks Stephen,
On 14/10/2020 02:45, Stephen Boyd wrote:
>> Changes since v1:
>> -removed unnecessary Kconfig dependencies
>> - cleaned up header includes.
>> - moved to using pm_clk
>> - Moved to right place in Makefile
>> - moved to use module_platform_driver instead of builtin_platform_driver
>> - add null check for of_device_get_match_data
>>
>> verified dt_binding_check to pass on linux nexthttps://paste.ubuntu.com/p/6nVzjRwvsW/
> Rob's bot complained again. Can you run with
Yes, I think the bot is probably checking against linus master branch.
Now the dependent patches are merged in master.
dt_binding_check passes, I will send v3 with the suggested changes!
--srini
>
> make DT_SCHEMA_FILES=<path to schema file.yaml> dt_binding_check
>
> and make sure the schema is up to date?
^ permalink raw reply [flat|nested] 10+ messages in thread