* [PATCH 1/3] arm64: dts: imx8mm: adjust GIC CPU mask to match number of CPUs
@ 2020-09-29 8:40 Krzysztof Kozlowski
2020-09-29 8:40 ` [PATCH 2/3] arm64: dts: imx8mn: " Krzysztof Kozlowski
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2020-09-29 8:40 UTC (permalink / raw)
To: Rob Herring, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Anson Huang, devicetree,
linux-arm-kernel, linux-kernel
Cc: Jacky Bai, Krzysztof Kozlowski
i.MX 8M Mini has four Cortex-A CPUs, not six. Using higher value is
harmless but adjust it to match real HW.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index b83f400def8b..ee486597afc0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -194,16 +194,16 @@
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 7
- (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
};
timer {
compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */
clock-frequency = <8000000>;
arm,no-tick-in-suspend;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/3] arm64: dts: imx8mn: adjust GIC CPU mask to match number of CPUs
2020-09-29 8:40 [PATCH 1/3] arm64: dts: imx8mm: adjust GIC CPU mask to match number of CPUs Krzysztof Kozlowski
@ 2020-09-29 8:40 ` Krzysztof Kozlowski
2020-09-29 8:40 ` [PATCH 3/3] arm64: dts: imx8mp: " Krzysztof Kozlowski
2020-10-30 0:53 ` [PATCH 1/3] arm64: dts: imx8mm: " Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2020-09-29 8:40 UTC (permalink / raw)
To: Rob Herring, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Anson Huang, devicetree,
linux-arm-kernel, linux-kernel
Cc: Jacky Bai, Krzysztof Kozlowski
i.MX 8M Nano has four Cortex-A CPUs, not six. Using higher value is
harmless but adjust it to match real HW.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 746faf1cf2fb..390fbd2bfa7e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -225,10 +225,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <8000000>;
arm,no-tick-in-suspend;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/3] arm64: dts: imx8mp: adjust GIC CPU mask to match number of CPUs
2020-09-29 8:40 [PATCH 1/3] arm64: dts: imx8mm: adjust GIC CPU mask to match number of CPUs Krzysztof Kozlowski
2020-09-29 8:40 ` [PATCH 2/3] arm64: dts: imx8mn: " Krzysztof Kozlowski
@ 2020-09-29 8:40 ` Krzysztof Kozlowski
2020-09-29 8:52 ` Jacky Bai
2020-10-30 0:53 ` [PATCH 1/3] arm64: dts: imx8mm: " Shawn Guo
2 siblings, 1 reply; 5+ messages in thread
From: Krzysztof Kozlowski @ 2020-09-29 8:40 UTC (permalink / raw)
To: Rob Herring, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Anson Huang, devicetree,
linux-arm-kernel, linux-kernel
Cc: Jacky Bai, Krzysztof Kozlowski
i.MX 8M Plus has four Cortex-A CPUs, not six. Using higher value is
harmless but adjust it to match real HW.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 6038f66aefc1..c69c206068a4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -202,10 +202,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <8000000>;
arm,no-tick-in-suspend;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* RE: [PATCH 3/3] arm64: dts: imx8mp: adjust GIC CPU mask to match number of CPUs
2020-09-29 8:40 ` [PATCH 3/3] arm64: dts: imx8mp: " Krzysztof Kozlowski
@ 2020-09-29 8:52 ` Jacky Bai
0 siblings, 0 replies; 5+ messages in thread
From: Jacky Bai @ 2020-09-29 8:52 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, dl-linux-imx,
Anson Huang, devicetree, linux-arm-kernel, linux-kernel
> -----Original Message-----
> From: Krzysztof Kozlowski [mailto:krzk@kernel.org]
> Sent: Tuesday, September 29, 2020 4:40 PM
> To: Rob Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>;
> Sascha Hauer <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>;
> dl-linux-imx <linux-imx@nxp.com>; Anson Huang <anson.huang@nxp.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Cc: Jacky Bai <ping.bai@nxp.com>; Krzysztof Kozlowski <krzk@kernel.org>
> Subject: [PATCH 3/3] arm64: dts: imx8mp: adjust GIC CPU mask to match
> number of CPUs
>
> i.MX 8M Plus has four Cortex-A CPUs, not six. Using higher value is harmless
> but adjust it to match real HW.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
For this patchset
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
BR
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 6038f66aefc1..c69c206068a4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -202,10 +202,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) |
> IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) |
> IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) |
> IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) |
> IRQ_TYPE_LEVEL_LOW)>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_LOW)>;
> clock-frequency = <8000000>;
> arm,no-tick-in-suspend;
> };
> --
> 2.17.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] arm64: dts: imx8mm: adjust GIC CPU mask to match number of CPUs
2020-09-29 8:40 [PATCH 1/3] arm64: dts: imx8mm: adjust GIC CPU mask to match number of CPUs Krzysztof Kozlowski
2020-09-29 8:40 ` [PATCH 2/3] arm64: dts: imx8mn: " Krzysztof Kozlowski
2020-09-29 8:40 ` [PATCH 3/3] arm64: dts: imx8mp: " Krzysztof Kozlowski
@ 2020-10-30 0:53 ` Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2020-10-30 0:53 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Anson Huang, devicetree,
linux-arm-kernel, linux-kernel, Jacky Bai
On Tue, Sep 29, 2020 at 10:40:13AM +0200, Krzysztof Kozlowski wrote:
> i.MX 8M Mini has four Cortex-A CPUs, not six. Using higher value is
> harmless but adjust it to match real HW.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Applied all, thanks.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-10-30 0:53 UTC | newest]
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2020-09-29 8:40 [PATCH 1/3] arm64: dts: imx8mm: adjust GIC CPU mask to match number of CPUs Krzysztof Kozlowski
2020-09-29 8:40 ` [PATCH 2/3] arm64: dts: imx8mn: " Krzysztof Kozlowski
2020-09-29 8:40 ` [PATCH 3/3] arm64: dts: imx8mp: " Krzysztof Kozlowski
2020-09-29 8:52 ` Jacky Bai
2020-10-30 0:53 ` [PATCH 1/3] arm64: dts: imx8mm: " Shawn Guo
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