* [PATCH v5 01/17] dt-bindings: mfd: syscon: add some compatible strings for Hisilicon
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:24 ` Rob Herring
2020-09-29 14:14 ` [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers Zhen Lei
` (15 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Add some compatible strings for Hisilicon controllers:
hisilicon,hi6220-sramctrl --> Hi6220 SRAM controller
hisilicon,pcie-sas-subctrl --> HiP05/HiP06 PCIe-SAS subsystem controller
hisilicon,peri-subctrl --> HiP05/HiP06 PERI subsystem controller
hisilicon,dsa-subctrl --> HiP05/HiP06 DSA subsystem controller
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 049ec2ffc7f97e4..fc2e85004d363bf 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -40,7 +40,10 @@ properties:
- allwinner,sun50i-a64-system-controller
- microchip,sparx5-cpu-syscon
- mstar,msc313-pmsleep
-
+ - hisilicon,hi6220-sramctrl
+ - hisilicon,pcie-sas-subctrl
+ - hisilicon,peri-subctrl
+ - hisilicon,dsa-subctrl
- const: syscon
- contains:
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 01/17] dt-bindings: mfd: syscon: add some compatible strings for Hisilicon
2020-09-29 14:14 ` [PATCH v5 01/17] dt-bindings: mfd: syscon: add some compatible strings for Hisilicon Zhen Lei
@ 2020-09-29 20:24 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:24 UTC (permalink / raw)
To: Zhen Lei
Cc: Kefeng Wang, Jonathan Cameron, Wei Xu, Libin, linux-arm-kernel,
Rob Herring, devicetree, linux-kernel
On Tue, 29 Sep 2020 22:14:38 +0800, Zhen Lei wrote:
> Add some compatible strings for Hisilicon controllers:
> hisilicon,hi6220-sramctrl --> Hi6220 SRAM controller
> hisilicon,pcie-sas-subctrl --> HiP05/HiP06 PCIe-SAS subsystem controller
> hisilicon,peri-subctrl --> HiP05/HiP06 PERI subsystem controller
> hisilicon,dsa-subctrl --> HiP05/HiP06 DSA subsystem controller
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> Documentation/devicetree/bindings/mfd/syscon.yaml | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
2020-09-29 14:14 ` [PATCH v5 01/17] dt-bindings: mfd: syscon: add some compatible strings for Hisilicon Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:24 ` Rob Herring
2020-09-29 14:14 ` [PATCH v5 03/17] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file Zhen Lei
` (14 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
The compatible strings of Hi6220 SRAM controller, HiP05/HiP06 PCIe-SAS
subsystem controller, HiP05/HiP06 PERI subsystem controller and
HiP05/HiP06 DSA subsystem controller is in syscon.yaml now.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../bindings/arm/hisilicon/hisilicon.txt | 68 ----------------------
1 file changed, 68 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index a97f643e7d1c760..54f423d87a80a6a 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -186,24 +186,6 @@ Example:
#clock-cells = <1>;
};
-
-Hisilicon Hi6220 SRAM controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-sramctrl", "syscon"
-- reg : Register address and size
-
-Hisilicon's SoCs use sram for multiple purpose; on Hi6220 there have several
-SRAM banks for power management, modem, security, etc. Further, use "syscon"
-managing the common sram which can be shared by multiple modules.
-
-Example:
- /*for Hi6220*/
- sram: sram@fff80000 {
- compatible = "hisilicon,hi6220-sramctrl", "syscon";
- reg = <0x0 0xfff80000 0x0 0x12000>;
- };
-
-----------------------------------------------------------------------
Hisilicon HiP01 system controller
@@ -226,56 +208,6 @@ Example:
};
-----------------------------------------------------------------------
-Hisilicon HiP05/HiP06 PCIe-SAS sub system controller
-
-Required properties:
-- compatible : "hisilicon,pcie-sas-subctrl", "syscon";
-- reg : Register address and size
-
-The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in
-HiP05 or HiP06 Soc to implement some basic configurations.
-
-Example:
- /* for HiP05 PCIe-SAS sub system */
- pcie_sas: system_controller@b0000000 {
- compatible = "hisilicon,pcie-sas-subctrl", "syscon";
- reg = <0xb0000000 0x10000>;
- };
-
-Hisilicon HiP05/HiP06 PERI sub system controller
-
-Required properties:
-- compatible : "hisilicon,peri-subctrl", "syscon";
-- reg : Register address and size
-
-The PERI sub system controller is shared by peripheral controllers in
-HiP05 or HiP06 Soc to implement some basic configurations. The peripheral
-controllers include mdio, ddr, iic, uart, timer and so on.
-
-Example:
- /* for HiP05 sub peri system */
- peri_c_subctrl: syscon@80000000 {
- compatible = "hisilicon,peri-subctrl", "syscon";
- reg = <0x0 0x80000000 0x0 0x10000>;
- };
-
-Hisilicon HiP05/HiP06 DSA sub system controller
-
-Required properties:
-- compatible : "hisilicon,dsa-subctrl", "syscon";
-- reg : Register address and size
-
-The DSA sub system controller is shared by peripheral controllers in
-HiP05 or HiP06 Soc to implement some basic configurations.
-
-Example:
- /* for HiP05 dsa sub system */
- pcie_sas: system_controller@a0000000 {
- compatible = "hisilicon,dsa-subctrl", "syscon";
- reg = <0xa0000000 0x10000>;
- };
-
------------------------------------------------------------------------
Hisilicon CPU controller
Required properties:
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers
2020-09-29 14:14 ` [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers Zhen Lei
@ 2020-09-29 20:24 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:24 UTC (permalink / raw)
To: Zhen Lei
Cc: devicetree, linux-arm-kernel, Rob Herring, Jonathan Cameron,
Libin, Wei Xu, Kefeng Wang, linux-kernel
On Tue, 29 Sep 2020 22:14:39 +0800, Zhen Lei wrote:
> The compatible strings of Hi6220 SRAM controller, HiP05/HiP06 PCIe-SAS
> subsystem controller, HiP05/HiP06 PERI subsystem controller and
> HiP05/HiP06 DSA subsystem controller is in syscon.yaml now.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../bindings/arm/hisilicon/hisilicon.txt | 68 ----------------------
> 1 file changed, 68 deletions(-)
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 03/17] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
2020-09-29 14:14 ` [PATCH v5 01/17] dt-bindings: mfd: syscon: add some compatible strings for Hisilicon Zhen Lei
2020-09-29 14:14 ` [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:28 ` Rob Herring
2020-09-29 14:14 ` [PATCH v5 04/17] dt-bindings: arm: hisilicon: convert Hisilicon board/soc bindings to json-schema Zhen Lei
` (13 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Split the devicetree bindings of each Hisilicon controller from
hisilicon.txt into a separate file, the file name is the compatible name
attach the .txt file name extension.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../arm/hisilicon/controller/hisilicon,cpuctrl.txt | 8 +
.../controller/hisilicon,hi3798cv200-perictrl.txt | 21 +++
.../controller/hisilicon,hi6220-aoctrl.txt | 18 ++
.../controller/hisilicon,hi6220-mediactrl.txt | 18 ++
.../controller/hisilicon,hi6220-pmctrl.txt | 18 ++
.../controller/hisilicon,hi6220-sysctrl.txt | 19 ++
.../controller/hisilicon,hip01-sysctrl.txt | 19 ++
.../controller/hisilicon,hip04-bootwrapper.txt | 9 +
.../controller/hisilicon,hip04-fabric.txt | 5 +
.../arm/hisilicon/controller/hisilicon,pctrl.txt | 13 ++
.../arm/hisilicon/controller/hisilicon,sysctrl.txt | 25 +++
.../bindings/arm/hisilicon/hisilicon.txt | 194 ---------------------
12 files changed, 173 insertions(+), 194 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
new file mode 100644
index 000000000000000..ceffac537671668
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
@@ -0,0 +1,8 @@
+Hisilicon CPU controller
+
+Required properties:
+- compatible : "hisilicon,cpuctrl"
+- reg : Register address and size
+
+The clock registers and power registers of secondary cores are defined
+in CPU controller, especially in HIX5HD2 SoC.
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
new file mode 100644
index 000000000000000..0d5282f4670658d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
@@ -0,0 +1,21 @@
+Hisilicon Hi3798CV200 Peripheral Controller
+
+The Hi3798CV200 Peripheral Controller controls peripherals, queries
+their status, and configures some functions of peripherals.
+
+Required properties:
+- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon"
+ and "simple-mfd".
+- reg: Register address and size of Peripheral Controller.
+- #address-cells: Should be 1.
+- #size-cells: Should be 1.
+
+Examples:
+
+ perictrl: peripheral-controller@8a20000 {
+ compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
+ "simple-mfd";
+ reg = <0x8a20000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
new file mode 100644
index 000000000000000..5a723c1d45f4a17
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
@@ -0,0 +1,18 @@
+Hisilicon Hi6220 Power Always ON domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-aoctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+ under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power always
+on domain for mobile platform.
+
+Example:
+ /*for Hi6220*/
+ ao_ctrl: ao_ctrl@f7800000 {
+ compatible = "hisilicon,hi6220-aoctrl", "syscon";
+ reg = <0x0 0xf7800000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
new file mode 100644
index 000000000000000..dcfdcbcb6455771
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
@@ -0,0 +1,18 @@
+Hisilicon Hi6220 Media domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-mediactrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+ under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the multimedia
+domain(e.g. codec, G3D ...) for mobile platform.
+
+Example:
+ /*for Hi6220*/
+ media_ctrl: media_ctrl@f4410000 {
+ compatible = "hisilicon,hi6220-mediactrl", "syscon";
+ reg = <0x0 0xf4410000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
new file mode 100644
index 000000000000000..972842f07b5a2ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
@@ -0,0 +1,18 @@
+Hisilicon Hi6220 Power Management domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-pmctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, some clock registers are define
+ under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power management
+domain for mobile platform.
+
+Example:
+ /*for Hi6220*/
+ pm_ctrl: pm_ctrl@f7032000 {
+ compatible = "hisilicon,hi6220-pmctrl", "syscon";
+ reg = <0x0 0xf7032000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
new file mode 100644
index 000000000000000..07e318eda254f52
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
@@ -0,0 +1,19 @@
+Hisilicon Hi6220 system controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-sysctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+ under this controller and this property must be present.
+
+Hisilicon designs this controller as one of the system controllers,
+its main functions are the same as Hisilicon system controller, but
+the register offset of some core modules are different.
+
+Example:
+ /*for Hi6220*/
+ sys_ctrl: sys_ctrl@f7030000 {
+ compatible = "hisilicon,hi6220-sysctrl", "syscon";
+ reg = <0x0 0xf7030000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
new file mode 100644
index 000000000000000..db2dfdce799db91
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
@@ -0,0 +1,19 @@
+Hisilicon HiP01 system controller
+
+Required properties:
+- compatible : "hisilicon,hip01-sysctrl"
+- reg : Register address and size
+
+The HiP01 system controller is mostly compatible with hisilicon
+system controller,but it has some specific control registers for
+HIP01 SoC family, such as slave core boot, and also some same
+registers located at different offset.
+
+Example:
+
+ /* for hip01-ca9x2 */
+ sysctrl: system-controller@10000000 {
+ compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
+ reg = <0x10000000 0x1000>;
+ reboot-offset = <0x4>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
new file mode 100644
index 000000000000000..b0d53333f4fdae1
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
@@ -0,0 +1,9 @@
+Bootwrapper boot method (software protocol on SMP):
+
+Required Properties:
+- compatible: "hisilicon,hip04-bootwrapper";
+- boot-method: Address and size of boot method.
+ [0]: bootwrapper physical address
+ [1]: bootwrapper size
+ [2]: relocation physical address
+ [3]: relocation size
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
new file mode 100644
index 000000000000000..40453d02f2024bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
@@ -0,0 +1,5 @@
+Fabric:
+
+Required Properties:
+- compatible: "hisilicon,hip04-fabric";
+- reg: Address and size of Fabric
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
new file mode 100644
index 000000000000000..deec777bc3a850a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
@@ -0,0 +1,13 @@
+PCTRL: Peripheral misc control register
+
+Required Properties:
+- compatible: "hisilicon,pctrl"
+- reg: Address and size of pctrl.
+
+Example:
+
+ /* for Hi3620 */
+ pctrl: pctrl@fca09000 {
+ compatible = "hisilicon,pctrl";
+ reg = <0xfca09000 0x1000>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
new file mode 100644
index 000000000000000..963f7f1ca7a2f0c
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
@@ -0,0 +1,25 @@
+Hisilicon system controller
+
+Required properties:
+- compatible : "hisilicon,sysctrl"
+- reg : Register address and size
+
+Optional properties:
+- smp-offset : offset in sysctrl for notifying slave cpu booting
+ cpu 1, reg;
+ cpu 2, reg + 0x4;
+ cpu 3, reg + 0x8;
+ If reg value is not zero, cpun exit wfi and go
+- resume-offset : offset in sysctrl for notifying cpu0 when resume
+- reboot-offset : offset in sysctrl for system reboot
+
+Example:
+
+ /* for Hi3620 */
+ sysctrl: system-controller@fc802000 {
+ compatible = "hisilicon,sysctrl";
+ reg = <0xfc802000 0x1000>;
+ smp-offset = <0x31c>;
+ resume-offset = <0x308>;
+ reboot-offset = <0x4>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index 54f423d87a80a6a..ffe760a636b5e7f 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -55,197 +55,3 @@ Required root node properties:
HiP07 D05 Board
Required root node properties:
- compatible = "hisilicon,hip07-d05";
-
-Hisilicon system controller
-
-Required properties:
-- compatible : "hisilicon,sysctrl"
-- reg : Register address and size
-
-Optional properties:
-- smp-offset : offset in sysctrl for notifying slave cpu booting
- cpu 1, reg;
- cpu 2, reg + 0x4;
- cpu 3, reg + 0x8;
- If reg value is not zero, cpun exit wfi and go
-- resume-offset : offset in sysctrl for notifying cpu0 when resume
-- reboot-offset : offset in sysctrl for system reboot
-
-Example:
-
- /* for Hi3620 */
- sysctrl: system-controller@fc802000 {
- compatible = "hisilicon,sysctrl";
- reg = <0xfc802000 0x1000>;
- smp-offset = <0x31c>;
- resume-offset = <0x308>;
- reboot-offset = <0x4>;
- };
-
------------------------------------------------------------------------
-Hisilicon Hi3798CV200 Peripheral Controller
-
-The Hi3798CV200 Peripheral Controller controls peripherals, queries
-their status, and configures some functions of peripherals.
-
-Required properties:
-- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon"
- and "simple-mfd".
-- reg: Register address and size of Peripheral Controller.
-- #address-cells: Should be 1.
-- #size-cells: Should be 1.
-
-Examples:
-
- perictrl: peripheral-controller@8a20000 {
- compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
- "simple-mfd";
- reg = <0x8a20000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
------------------------------------------------------------------------
-Hisilicon Hi6220 system controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-sysctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
- under this controller and this property must be present.
-
-Hisilicon designs this controller as one of the system controllers,
-its main functions are the same as Hisilicon system controller, but
-the register offset of some core modules are different.
-
-Example:
- /*for Hi6220*/
- sys_ctrl: sys_ctrl@f7030000 {
- compatible = "hisilicon,hi6220-sysctrl", "syscon";
- reg = <0x0 0xf7030000 0x0 0x2000>;
- #clock-cells = <1>;
- };
-
-
-Hisilicon Hi6220 Power Always ON domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-aoctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
- under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the power always
-on domain for mobile platform.
-
-Example:
- /*for Hi6220*/
- ao_ctrl: ao_ctrl@f7800000 {
- compatible = "hisilicon,hi6220-aoctrl", "syscon";
- reg = <0x0 0xf7800000 0x0 0x2000>;
- #clock-cells = <1>;
- };
-
-
-Hisilicon Hi6220 Media domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-mediactrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
- under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the multimedia
-domain(e.g. codec, G3D ...) for mobile platform.
-
-Example:
- /*for Hi6220*/
- media_ctrl: media_ctrl@f4410000 {
- compatible = "hisilicon,hi6220-mediactrl", "syscon";
- reg = <0x0 0xf4410000 0x0 0x1000>;
- #clock-cells = <1>;
- };
-
-
-Hisilicon Hi6220 Power Management domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-pmctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, some clock registers are define
- under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the power management
-domain for mobile platform.
-
-Example:
- /*for Hi6220*/
- pm_ctrl: pm_ctrl@f7032000 {
- compatible = "hisilicon,hi6220-pmctrl", "syscon";
- reg = <0x0 0xf7032000 0x0 0x1000>;
- #clock-cells = <1>;
- };
-
------------------------------------------------------------------------
-Hisilicon HiP01 system controller
-
-Required properties:
-- compatible : "hisilicon,hip01-sysctrl"
-- reg : Register address and size
-
-The HiP01 system controller is mostly compatible with hisilicon
-system controller,but it has some specific control registers for
-HIP01 SoC family, such as slave core boot, and also some same
-registers located at different offset.
-
-Example:
-
- /* for hip01-ca9x2 */
- sysctrl: system-controller@10000000 {
- compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
- reg = <0x10000000 0x1000>;
- reboot-offset = <0x4>;
- };
-
------------------------------------------------------------------------
-Hisilicon CPU controller
-
-Required properties:
-- compatible : "hisilicon,cpuctrl"
-- reg : Register address and size
-
-The clock registers and power registers of secondary cores are defined
-in CPU controller, especially in HIX5HD2 SoC.
-
------------------------------------------------------------------------
-PCTRL: Peripheral misc control register
-
-Required Properties:
-- compatible: "hisilicon,pctrl"
-- reg: Address and size of pctrl.
-
-Example:
-
- /* for Hi3620 */
- pctrl: pctrl@fca09000 {
- compatible = "hisilicon,pctrl";
- reg = <0xfca09000 0x1000>;
- };
-
------------------------------------------------------------------------
-Fabric:
-
-Required Properties:
-- compatible: "hisilicon,hip04-fabric";
-- reg: Address and size of Fabric
-
------------------------------------------------------------------------
-Bootwrapper boot method (software protocol on SMP):
-
-Required Properties:
-- compatible: "hisilicon,hip04-bootwrapper";
-- boot-method: Address and size of boot method.
- [0]: bootwrapper physical address
- [1]: bootwrapper size
- [2]: relocation physical address
- [3]: relocation size
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 03/17] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file
2020-09-29 14:14 ` [PATCH v5 03/17] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file Zhen Lei
@ 2020-09-29 20:28 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:28 UTC (permalink / raw)
To: Zhen Lei
Cc: Jonathan Cameron, Wei Xu, Rob Herring, devicetree, Libin,
Kefeng Wang, linux-kernel, linux-arm-kernel
On Tue, 29 Sep 2020 22:14:40 +0800, Zhen Lei wrote:
> Split the devicetree bindings of each Hisilicon controller from
> hisilicon.txt into a separate file, the file name is the compatible name
> attach the .txt file name extension.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../arm/hisilicon/controller/hisilicon,cpuctrl.txt | 8 +
> .../controller/hisilicon,hi3798cv200-perictrl.txt | 21 +++
> .../controller/hisilicon,hi6220-aoctrl.txt | 18 ++
> .../controller/hisilicon,hi6220-mediactrl.txt | 18 ++
> .../controller/hisilicon,hi6220-pmctrl.txt | 18 ++
> .../controller/hisilicon,hi6220-sysctrl.txt | 19 ++
> .../controller/hisilicon,hip01-sysctrl.txt | 19 ++
> .../controller/hisilicon,hip04-bootwrapper.txt | 9 +
> .../controller/hisilicon,hip04-fabric.txt | 5 +
> .../arm/hisilicon/controller/hisilicon,pctrl.txt | 13 ++
> .../arm/hisilicon/controller/hisilicon,sysctrl.txt | 25 +++
> .../bindings/arm/hisilicon/hisilicon.txt | 194 ---------------------
> 12 files changed, 173 insertions(+), 194 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 04/17] dt-bindings: arm: hisilicon: convert Hisilicon board/soc bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (2 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 03/17] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 14:14 ` [PATCH v5 05/17] dt-bindings: arm: hisilicon: add binding for SD5203 SoC Zhen Lei
` (12 subsequent siblings)
16 siblings, 0 replies; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert Hisilicon SoC bindings to DT schema format using json-schema.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/arm/hisilicon/hisilicon.txt | 57 --------------------
.../bindings/arm/hisilicon/hisilicon.yaml | 62 ++++++++++++++++++++++
2 files changed, 62 insertions(+), 57 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
deleted file mode 100644
index ffe760a636b5e7f..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-Hisilicon Platforms Device Tree Bindings
-----------------------------------------------------
-Hi3660 SoC
-Required root node properties:
- - compatible = "hisilicon,hi3660";
-
-HiKey960 Board
-Required root node properties:
- - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
-
-Hi3670 SoC
-Required root node properties:
- - compatible = "hisilicon,hi3670";
-
-HiKey970 Board
-Required root node properties:
- - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
-
-Hi3798cv200 SoC
-Required root node properties:
- - compatible = "hisilicon,hi3798cv200";
-
-Hi3798cv200 Poplar Board
-Required root node properties:
- - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
-
-Hi4511 Board
-Required root node properties:
- - compatible = "hisilicon,hi3620-hi4511";
-
-Hi6220 SoC
-Required root node properties:
- - compatible = "hisilicon,hi6220";
-
-HiKey Board
-Required root node properties:
- - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
-
-HiP01 ca9x2 Board
-Required root node properties:
- - compatible = "hisilicon,hip01-ca9x2";
-
-HiP04 D01 Board
-Required root node properties:
- - compatible = "hisilicon,hip04-d01";
-
-HiP05 D02 Board
-Required root node properties:
- - compatible = "hisilicon,hip05-d02";
-
-HiP06 D03 Board
-Required root node properties:
- - compatible = "hisilicon,hip06-d03";
-
-HiP07 D05 Board
-Required root node properties:
- - compatible = "hisilicon,hip07-d05";
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
new file mode 100644
index 000000000000000..6d17309c7c84308
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/hisilicon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Platforms Device Tree Bindings
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+properties:
+ $nodename:
+ const: '/'
+
+ compatible:
+ oneOf:
+ - description: Hi3660 based boards.
+ items:
+ - const: hisilicon,hi3660-hikey960
+ - const: hisilicon,hi3660
+
+ - description: Hi3670 based boards.
+ items:
+ - const: hisilicon,hi3670-hikey970
+ - const: hisilicon,hi3670
+
+ - description: Hi3798cv200 based boards.
+ items:
+ - const: hisilicon,hi3798cv200-poplar
+ - const: hisilicon,hi3798cv200
+
+ - description: Hi4511 Board
+ items:
+ - const: hisilicon,hi3620-hi4511
+
+ - description: Hi6220 based boards.
+ items:
+ - const: hisilicon,hi6220-hikey
+ - const: hisilicon,hi6220
+
+ - description: HiP01 based boards.
+ items:
+ - const: hisilicon,hip01-ca9x2
+ - const: hisilicon,hip01
+
+ - description: HiP04 D01 Board
+ items:
+ - const: hisilicon,hip04-d01
+
+ - description: HiP05 D02 Board
+ items:
+ - const: hisilicon,hip05-d02
+
+ - description: HiP06 D03 Board
+ items:
+ - const: hisilicon,hip06-d03
+
+ - description: HiP07 D05 Board
+ items:
+ - const: hisilicon,hip07-d05
+...
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v5 05/17] dt-bindings: arm: hisilicon: add binding for SD5203 SoC
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (3 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 04/17] dt-bindings: arm: hisilicon: convert Hisilicon board/soc bindings to json-schema Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:29 ` Rob Herring
2020-09-29 14:14 ` [PATCH v5 06/17] ARM: hisi: add support " Zhen Lei
` (11 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Add devicetree binding for Hisilicon SD5203 SoC.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
index 6d17309c7c84308..43b8ce2227aaae9 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
@@ -59,4 +59,9 @@ properties:
- description: HiP07 D05 Board
items:
- const: hisilicon,hip07-d05
+
+ - description: SD5203 based boards
+ items:
+ - const: H836ASDJ
+ - const: hisilicon,sd5203
...
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 05/17] dt-bindings: arm: hisilicon: add binding for SD5203 SoC
2020-09-29 14:14 ` [PATCH v5 05/17] dt-bindings: arm: hisilicon: add binding for SD5203 SoC Zhen Lei
@ 2020-09-29 20:29 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:29 UTC (permalink / raw)
To: Zhen Lei
Cc: Rob Herring, linux-arm-kernel, Jonathan Cameron, Wei Xu, Libin,
devicetree, linux-kernel, Kefeng Wang
On Tue, 29 Sep 2020 22:14:42 +0800, Zhen Lei wrote:
> Add devicetree binding for Hisilicon SD5203 SoC.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 06/17] ARM: hisi: add support for SD5203 SoC
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (4 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 05/17] dt-bindings: arm: hisilicon: add binding for SD5203 SoC Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-30 3:05 ` Wei Xu
2020-09-29 14:14 ` [PATCH v5 07/17] ARM: debug: add UART early console support for SD5203 Zhen Lei
` (10 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
From: Kefeng Wang <wangkefeng.wang@huawei.com>
Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/mach-hisi/Kconfig | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
index 3b010fe7c0e9b48..2e980f834a6aa1b 100644
--- a/arch/arm/mach-hisi/Kconfig
+++ b/arch/arm/mach-hisi/Kconfig
@@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-only
config ARCH_HISI
bool "Hisilicon SoC Support"
- depends on ARCH_MULTI_V7
+ depends on ARCH_MULTI_V7 || ARCH_MULTI_V5
select ARM_AMBA
- select ARM_GIC
+ select ARM_GIC if ARCH_MULTI_V7
select ARM_TIMER_SP804
select POWER_RESET
select POWER_RESET_HISI
@@ -15,6 +15,7 @@ menu "Hisilicon platform type"
config ARCH_HI3xxx
bool "Hisilicon Hi36xx family"
+ depends on ARCH_MULTI_V7
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
@@ -25,6 +26,7 @@ config ARCH_HI3xxx
config ARCH_HIP01
bool "Hisilicon HIP01 family"
+ depends on ARCH_MULTI_V7
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select ARM_GLOBAL_TIMER
@@ -33,6 +35,7 @@ config ARCH_HIP01
config ARCH_HIP04
bool "Hisilicon HiP04 Cortex A15 family"
+ depends on ARCH_MULTI_V7
select ARM_ERRATA_798181 if SMP
select HAVE_ARM_ARCH_TIMER
select MCPM if SMP
@@ -43,6 +46,7 @@ config ARCH_HIP04
config ARCH_HIX5HD2
bool "Hisilicon X5HD2 family"
+ depends on ARCH_MULTI_V7
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
@@ -50,6 +54,14 @@ config ARCH_HIX5HD2
select PINCTRL_SINGLE
help
Support for Hisilicon HIX5HD2 SoC family
+
+config ARCH_SD5203
+ bool "Hisilicon SD5203 family"
+ depends on ARCH_MULTI_V5
+ select DW_APB_ICTL
+ help
+ Support for Hisilicon SD5203 SoC family
+
endmenu
endif
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 06/17] ARM: hisi: add support for SD5203 SoC
2020-09-29 14:14 ` [PATCH v5 06/17] ARM: hisi: add support " Zhen Lei
@ 2020-09-30 3:05 ` Wei Xu
0 siblings, 0 replies; 35+ messages in thread
From: Wei Xu @ 2020-09-30 3:05 UTC (permalink / raw)
To: Zhen Lei, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Libin, Kefeng Wang
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> From: Kefeng Wang <wangkefeng.wang@huawei.com>
>
> Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Thanks!
Applied to the hisilicon arm32 SoC tree.
Best Regards,
Wei
> ---
> arch/arm/mach-hisi/Kconfig | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
> index 3b010fe7c0e9b48..2e980f834a6aa1b 100644
> --- a/arch/arm/mach-hisi/Kconfig
> +++ b/arch/arm/mach-hisi/Kconfig
> @@ -1,9 +1,9 @@
> # SPDX-License-Identifier: GPL-2.0-only
> config ARCH_HISI
> bool "Hisilicon SoC Support"
> - depends on ARCH_MULTI_V7
> + depends on ARCH_MULTI_V7 || ARCH_MULTI_V5
> select ARM_AMBA
> - select ARM_GIC
> + select ARM_GIC if ARCH_MULTI_V7
> select ARM_TIMER_SP804
> select POWER_RESET
> select POWER_RESET_HISI
> @@ -15,6 +15,7 @@ menu "Hisilicon platform type"
>
> config ARCH_HI3xxx
> bool "Hisilicon Hi36xx family"
> + depends on ARCH_MULTI_V7
> select CACHE_L2X0
> select HAVE_ARM_SCU if SMP
> select HAVE_ARM_TWD if SMP
> @@ -25,6 +26,7 @@ config ARCH_HI3xxx
>
> config ARCH_HIP01
> bool "Hisilicon HIP01 family"
> + depends on ARCH_MULTI_V7
> select HAVE_ARM_SCU if SMP
> select HAVE_ARM_TWD if SMP
> select ARM_GLOBAL_TIMER
> @@ -33,6 +35,7 @@ config ARCH_HIP01
>
> config ARCH_HIP04
> bool "Hisilicon HiP04 Cortex A15 family"
> + depends on ARCH_MULTI_V7
> select ARM_ERRATA_798181 if SMP
> select HAVE_ARM_ARCH_TIMER
> select MCPM if SMP
> @@ -43,6 +46,7 @@ config ARCH_HIP04
>
> config ARCH_HIX5HD2
> bool "Hisilicon X5HD2 family"
> + depends on ARCH_MULTI_V7
> select CACHE_L2X0
> select HAVE_ARM_SCU if SMP
> select HAVE_ARM_TWD if SMP
> @@ -50,6 +54,14 @@ config ARCH_HIX5HD2
> select PINCTRL_SINGLE
> help
> Support for Hisilicon HIX5HD2 SoC family
> +
> +config ARCH_SD5203
> + bool "Hisilicon SD5203 family"
> + depends on ARCH_MULTI_V5
> + select DW_APB_ICTL
> + help
> + Support for Hisilicon SD5203 SoC family
> +
> endmenu
>
> endif
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 07/17] ARM: debug: add UART early console support for SD5203
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (5 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 06/17] ARM: hisi: add support " Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-30 3:06 ` Wei Xu
2020-09-29 14:14 ` [PATCH v5 08/17] ARM: dts: add SD5203 dts Zhen Lei
` (9 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
From: Kefeng Wang <wangkefeng.wang@huawei.com>
Add support of early console for SD5203.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/Kconfig.debug | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 80000a66a4e3549..d27a7764c3bfb46 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1086,6 +1086,14 @@ choice
on SA-11x0 UART ports. The kernel will check for the first
enabled UART in a sequence 3-1-2.
+ config DEBUG_SD5203_UART
+ bool "Hisilicon SD5203 Debug UART"
+ depends on ARCH_SD5203
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on SD5203 UART.
+
config DEBUG_SOCFPGA_UART0
depends on ARCH_SOCFPGA
bool "Use SOCFPGA UART0 for low-level debug"
@@ -1639,6 +1647,7 @@ config DEBUG_UART_PHYS
default 0x11006000 if DEBUG_MT6589_UART0
default 0x11009000 if DEBUG_MT8135_UART3
default 0x16000000 if DEBUG_INTEGRATOR
+ default 0x1600d000 if DEBUG_SD5203_UART
default 0x18000300 if DEBUG_BCM_5301X
default 0x18000400 if DEBUG_BCM_HR2
default 0x18010000 if DEBUG_SIRFATLAS7_UART0
@@ -1841,7 +1850,7 @@ config DEBUG_UART_VIRT
default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1
default 0xfec90000 if DEBUG_RK32_UART2
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
- default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
+ default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_SD5203_UART
default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 07/17] ARM: debug: add UART early console support for SD5203
2020-09-29 14:14 ` [PATCH v5 07/17] ARM: debug: add UART early console support for SD5203 Zhen Lei
@ 2020-09-30 3:06 ` Wei Xu
0 siblings, 0 replies; 35+ messages in thread
From: Wei Xu @ 2020-09-30 3:06 UTC (permalink / raw)
To: Zhen Lei, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Libin, Kefeng Wang
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> From: Kefeng Wang <wangkefeng.wang@huawei.com>
>
> Add support of early console for SD5203.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Thanks!
Applied to the hisilicon arm32 SoC tree.
Best Regards,
Wei
> ---
> arch/arm/Kconfig.debug | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index 80000a66a4e3549..d27a7764c3bfb46 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -1086,6 +1086,14 @@ choice
> on SA-11x0 UART ports. The kernel will check for the first
> enabled UART in a sequence 3-1-2.
>
> + config DEBUG_SD5203_UART
> + bool "Hisilicon SD5203 Debug UART"
> + depends on ARCH_SD5203
> + select DEBUG_UART_8250
> + help
> + Say Y here if you want kernel low-level debugging support
> + on SD5203 UART.
> +
> config DEBUG_SOCFPGA_UART0
> depends on ARCH_SOCFPGA
> bool "Use SOCFPGA UART0 for low-level debug"
> @@ -1639,6 +1647,7 @@ config DEBUG_UART_PHYS
> default 0x11006000 if DEBUG_MT6589_UART0
> default 0x11009000 if DEBUG_MT8135_UART3
> default 0x16000000 if DEBUG_INTEGRATOR
> + default 0x1600d000 if DEBUG_SD5203_UART
> default 0x18000300 if DEBUG_BCM_5301X
> default 0x18000400 if DEBUG_BCM_HR2
> default 0x18010000 if DEBUG_SIRFATLAS7_UART0
> @@ -1841,7 +1850,7 @@ config DEBUG_UART_VIRT
> default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1
> default 0xfec90000 if DEBUG_RK32_UART2
> default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
> - default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
> + default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_SD5203_UART
> default 0xfed60000 if DEBUG_RK29_UART0
> default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
> default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 08/17] ARM: dts: add SD5203 dts
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (6 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 07/17] ARM: debug: add UART early console support for SD5203 Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-30 3:07 ` Wei Xu
2020-09-29 14:14 ` [PATCH v5 09/17] ARM: dts: hisilicon: fix ststem controller compatible node Zhen Lei
` (8 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
From: Kefeng Wang <wangkefeng.wang@huawei.com>
Add sd5203.dts for Hisilicon SD5203 SoC platform.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/sd5203.dts | 96 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 98 insertions(+)
create mode 100644 arch/arm/boot/dts/sd5203.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4572db3fa5ae302..1d1262df5c55907 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -357,6 +357,8 @@ dtb-$(CONFIG_ARCH_MPS2) += \
mps2-an399.dtb
dtb-$(CONFIG_ARCH_MOXART) += \
moxart-uc7112lx.dtb
+dtb-$(CONFIG_ARCH_SD5203) += \
+ sd5203.dtb
dtb-$(CONFIG_SOC_IMX1) += \
imx1-ads.dtb \
imx1-apf9328.dtb
diff --git a/arch/arm/boot/dts/sd5203.dts b/arch/arm/boot/dts/sd5203.dts
new file mode 100644
index 000000000000000..3cc9a23910be62e
--- /dev/null
+++ b/arch/arm/boot/dts/sd5203.dts
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2020 Hisilicon Limited.
+ *
+ * DTS file for Hisilicon SD5203 Board
+ */
+
+/dts-v1/;
+
+/ {
+ model = "Hisilicon SD5203";
+ compatible = "H836ASDJ", "hisilicon,sd5203";
+ interrupt-parent = <&vic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs="console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000";
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0 {
+ device_type = "cpu";
+ compatible = "arm,arm926ej-s";
+ reg = <0x0>;
+ };
+ };
+
+ memory@30000000 {
+ device_type = "memory";
+ reg = <0x30000000 0x8000000>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+
+ vic: interrupt-controller@10130000 {
+ compatible = "snps,dw-apb-ictl";
+ reg = <0x10130000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ refclk125mhz: refclk125mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ };
+
+ timer0: timer@16002000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x16002000 0x1000>;
+ interrupts = <4>;
+ clocks = <&refclk125mhz>;
+ clock-names = "apb_pclk";
+ };
+
+ timer1: timer@16003000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x16003000 0x1000>;
+ interrupts = <5>;
+ clocks = <&refclk125mhz>;
+ clock-names = "apb_pclk";
+ };
+
+ uart0: serial@1600d000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x1600d000 0x1000>;
+ bus_id = "uart0";
+ clocks = <&refclk125mhz>;
+ clock-names = "baudclk", "apb_pclk";
+ reg-shift = <2>;
+ interrupts = <17>;
+ };
+
+ uart1: serial@1600c000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x1600c000 0x1000>;
+ clocks = <&refclk125mhz>;
+ clock-names = "baudclk", "apb_pclk";
+ reg-shift = <2>;
+ interrupts = <16>;
+ status = "disabled";
+ };
+ };
+};
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 08/17] ARM: dts: add SD5203 dts
2020-09-29 14:14 ` [PATCH v5 08/17] ARM: dts: add SD5203 dts Zhen Lei
@ 2020-09-30 3:07 ` Wei Xu
0 siblings, 0 replies; 35+ messages in thread
From: Wei Xu @ 2020-09-30 3:07 UTC (permalink / raw)
To: Zhen Lei, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Libin, Kefeng Wang
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> From: Kefeng Wang <wangkefeng.wang@huawei.com>
>
> Add sd5203.dts for Hisilicon SD5203 SoC platform.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Thanks!
Applied to the hisilicon arm32 dt tree.
Best Regards,
Wei
> ---
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/sd5203.dts | 96 ++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 98 insertions(+)
> create mode 100644 arch/arm/boot/dts/sd5203.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 4572db3fa5ae302..1d1262df5c55907 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -357,6 +357,8 @@ dtb-$(CONFIG_ARCH_MPS2) += \
> mps2-an399.dtb
> dtb-$(CONFIG_ARCH_MOXART) += \
> moxart-uc7112lx.dtb
> +dtb-$(CONFIG_ARCH_SD5203) += \
> + sd5203.dtb
> dtb-$(CONFIG_SOC_IMX1) += \
> imx1-ads.dtb \
> imx1-apf9328.dtb
> diff --git a/arch/arm/boot/dts/sd5203.dts b/arch/arm/boot/dts/sd5203.dts
> new file mode 100644
> index 000000000000000..3cc9a23910be62e
> --- /dev/null
> +++ b/arch/arm/boot/dts/sd5203.dts
> @@ -0,0 +1,96 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2020 Hisilicon Limited.
> + *
> + * DTS file for Hisilicon SD5203 Board
> + */
> +
> +/dts-v1/;
> +
> +/ {
> + model = "Hisilicon SD5203";
> + compatible = "H836ASDJ", "hisilicon,sd5203";
> + interrupt-parent = <&vic>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen {
> + bootargs="console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000";
> + };
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu0 {
> + device_type = "cpu";
> + compatible = "arm,arm926ej-s";
> + reg = <0x0>;
> + };
> + };
> +
> + memory@30000000 {
> + device_type = "memory";
> + reg = <0x30000000 0x8000000>;
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "simple-bus";
> + ranges;
> +
> + vic: interrupt-controller@10130000 {
> + compatible = "snps,dw-apb-ictl";
> + reg = <0x10130000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> +
> + refclk125mhz: refclk125mhz {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <125000000>;
> + };
> +
> + timer0: timer@16002000 {
> + compatible = "arm,sp804", "arm,primecell";
> + reg = <0x16002000 0x1000>;
> + interrupts = <4>;
> + clocks = <&refclk125mhz>;
> + clock-names = "apb_pclk";
> + };
> +
> + timer1: timer@16003000 {
> + compatible = "arm,sp804", "arm,primecell";
> + reg = <0x16003000 0x1000>;
> + interrupts = <5>;
> + clocks = <&refclk125mhz>;
> + clock-names = "apb_pclk";
> + };
> +
> + uart0: serial@1600d000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x1600d000 0x1000>;
> + bus_id = "uart0";
> + clocks = <&refclk125mhz>;
> + clock-names = "baudclk", "apb_pclk";
> + reg-shift = <2>;
> + interrupts = <17>;
> + };
> +
> + uart1: serial@1600c000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x1600c000 0x1000>;
> + clocks = <&refclk125mhz>;
> + clock-names = "baudclk", "apb_pclk";
> + reg-shift = <2>;
> + interrupts = <16>;
> + status = "disabled";
> + };
> + };
> +};
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 09/17] ARM: dts: hisilicon: fix ststem controller compatible node
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (7 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 08/17] ARM: dts: add SD5203 dts Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-30 3:08 ` Wei Xu
2020-09-29 14:14 ` [PATCH v5 10/17] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema Zhen Lei
` (7 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
The DT binding for Hisilicon system controllers requires to have a
"syscon" compatible string.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hi3620.dtsi | 2 +-
arch/arm/boot/dts/hip04.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index 355175b25fd6220..f683440ee5694b4 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -89,7 +89,7 @@
};
sysctrl: system-controller@802000 {
- compatible = "hisilicon,sysctrl";
+ compatible = "hisilicon,sysctrl", "syscon";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x802000 0x1000>;
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index f5871b1d1ec452c..555bc6b6720fc94 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -213,7 +213,7 @@
};
sysctrl: sysctrl {
- compatible = "hisilicon,sysctrl";
+ compatible = "hisilicon,sysctrl", "syscon";
reg = <0x3e00000 0x00100000>;
};
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 09/17] ARM: dts: hisilicon: fix ststem controller compatible node
2020-09-29 14:14 ` [PATCH v5 09/17] ARM: dts: hisilicon: fix ststem controller compatible node Zhen Lei
@ 2020-09-30 3:08 ` Wei Xu
0 siblings, 0 replies; 35+ messages in thread
From: Wei Xu @ 2020-09-30 3:08 UTC (permalink / raw)
To: Zhen Lei, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Libin, Kefeng Wang
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> The DT binding for Hisilicon system controllers requires to have a
> "syscon" compatible string.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Thanks!
Applied to the hisilicon arm32 dt tree.
Best Regards,
Wei
> ---
> arch/arm/boot/dts/hi3620.dtsi | 2 +-
> arch/arm/boot/dts/hip04.dtsi | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
> index 355175b25fd6220..f683440ee5694b4 100644
> --- a/arch/arm/boot/dts/hi3620.dtsi
> +++ b/arch/arm/boot/dts/hi3620.dtsi
> @@ -89,7 +89,7 @@
> };
>
> sysctrl: system-controller@802000 {
> - compatible = "hisilicon,sysctrl";
> + compatible = "hisilicon,sysctrl", "syscon";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0 0x802000 0x1000>;
> diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
> index f5871b1d1ec452c..555bc6b6720fc94 100644
> --- a/arch/arm/boot/dts/hip04.dtsi
> +++ b/arch/arm/boot/dts/hip04.dtsi
> @@ -213,7 +213,7 @@
> };
>
> sysctrl: sysctrl {
> - compatible = "hisilicon,sysctrl";
> + compatible = "hisilicon,sysctrl", "syscon";
> reg = <0x3e00000 0x00100000>;
> };
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 10/17] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (8 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 09/17] ARM: dts: hisilicon: fix ststem controller compatible node Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:29 ` Rob Herring
2020-09-29 14:14 ` [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl " Zhen Lei
` (6 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon system controller and its variants binding to DT
schema format using json-schema. All of them are grouped into one yaml
file, to help users understand differences and avoid repeated
descriptions.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../controller/hisilicon,hi6220-sysctrl.txt | 19 ----
.../controller/hisilicon,hip01-sysctrl.txt | 19 ----
.../arm/hisilicon/controller/hisilicon,sysctrl.txt | 25 -----
.../bindings/arm/hisilicon/controller/sysctrl.yaml | 110 +++++++++++++++++++++
.../bindings/arm/hisilicon/hi3519-sysctrl.txt | 14 ---
5 files changed, 110 insertions(+), 77 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
deleted file mode 100644
index 07e318eda254f52..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-Hisilicon Hi6220 system controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-sysctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
- under this controller and this property must be present.
-
-Hisilicon designs this controller as one of the system controllers,
-its main functions are the same as Hisilicon system controller, but
-the register offset of some core modules are different.
-
-Example:
- /*for Hi6220*/
- sys_ctrl: sys_ctrl@f7030000 {
- compatible = "hisilicon,hi6220-sysctrl", "syscon";
- reg = <0x0 0xf7030000 0x0 0x2000>;
- #clock-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
deleted file mode 100644
index db2dfdce799db91..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-Hisilicon HiP01 system controller
-
-Required properties:
-- compatible : "hisilicon,hip01-sysctrl"
-- reg : Register address and size
-
-The HiP01 system controller is mostly compatible with hisilicon
-system controller,but it has some specific control registers for
-HIP01 SoC family, such as slave core boot, and also some same
-registers located at different offset.
-
-Example:
-
- /* for hip01-ca9x2 */
- sysctrl: system-controller@10000000 {
- compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
- reg = <0x10000000 0x1000>;
- reboot-offset = <0x4>;
- };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
deleted file mode 100644
index 963f7f1ca7a2f0c..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Hisilicon system controller
-
-Required properties:
-- compatible : "hisilicon,sysctrl"
-- reg : Register address and size
-
-Optional properties:
-- smp-offset : offset in sysctrl for notifying slave cpu booting
- cpu 1, reg;
- cpu 2, reg + 0x4;
- cpu 3, reg + 0x8;
- If reg value is not zero, cpun exit wfi and go
-- resume-offset : offset in sysctrl for notifying cpu0 when resume
-- reboot-offset : offset in sysctrl for system reboot
-
-Example:
-
- /* for Hi3620 */
- sysctrl: system-controller@fc802000 {
- compatible = "hisilicon,sysctrl";
- reg = <0xfc802000 0x1000>;
- smp-offset = <0x31c>;
- resume-offset = <0x308>;
- reboot-offset = <0x4>;
- };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
new file mode 100644
index 000000000000000..449140f89ddbc3b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
@@ -0,0 +1,110 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/sysctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon system controller
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: |
+ The Hisilicon system controller is used on many Hisilicon boards, it can be
+ used to assist the slave core startup, reboot the system, etc.
+
+ There are some variants of the Hisilicon system controller, such as HiP01,
+ Hi3519, Hi6220 system controller, each of them is mostly compatible with the
+ Hisilicon system controller, but some same registers located at different
+ offset. In addition, the HiP01 system controller has some specific control
+ registers for HIP01 SoC family, such as slave core boot.
+
+ The compatible names of each system controller are as follows:
+ Hisilicon system controller --> hisilicon,sysctrl
+ HiP01 system controller --> hisilicon,hip01-sysctrl
+ Hi6220 system controller --> hisilicon,hi6220-sysctrl
+ Hi3519 system controller --> hisilicon,hi3519-sysctrl
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: hisilicon,hi6220-sysctrl
+ then:
+ required:
+ - '#clock-cells'
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - hisilicon,sysctrl
+ - hisilicon,hi6220-sysctrl
+ - hisilicon,hi3519-sysctrl
+ - const: syscon
+ - items:
+ - const: hisilicon,hip01-sysctrl
+ - const: hisilicon,sysctrl
+
+ reg:
+ maxItems: 1
+
+ smp-offset:
+ description: |
+ offset in sysctrl for notifying slave cpu booting
+ cpu 1, reg;
+ cpu 2, reg + 0x4;
+ cpu 3, reg + 0x8;
+ If reg value is not zero, cpun exit wfi and go
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ resume-offset:
+ description: offset in sysctrl for notifying cpu0 when resume
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ reboot-offset:
+ description: offset in sysctrl for system reboot
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ '#clock-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ /* Hisilicon system controller */
+ system-controller@fc802000 {
+ compatible = "hisilicon,sysctrl", "syscon";
+ reg = <0xfc802000 0x1000>;
+ smp-offset = <0x31c>;
+ resume-offset = <0x308>;
+ reboot-offset = <0x4>;
+ };
+
+ /* HiP01 system controller */
+ system-controller@10000000 {
+ compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
+ reg = <0x10000000 0x1000>;
+ reboot-offset = <0x4>;
+ };
+
+ /* Hi6220 system controller */
+ system-controller@f7030000 {
+ compatible = "hisilicon,hi6220-sysctrl", "syscon";
+ reg = <0xf7030000 0x2000>;
+ #clock-cells = <1>;
+ };
+
+ /* Hi3519 system controller */
+ system-controller@12010000 {
+ compatible = "hisilicon,hi3519-sysctrl", "syscon";
+ reg = <0x12010000 0x1000>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt
deleted file mode 100644
index 8defacc44dd5b9e..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-* Hisilicon Hi3519 System Controller Block
-
-This bindings use the following binding:
-Documentation/devicetree/bindings/mfd/syscon.yaml
-
-Required properties:
-- compatible: "hisilicon,hi3519-sysctrl".
-- reg: the register region of this block
-
-Examples:
-sysctrl: system-controller@12010000 {
- compatible = "hisilicon,hi3519-sysctrl", "syscon";
- reg = <0x12010000 0x1000>;
-};
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 10/17] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 10/17] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema Zhen Lei
@ 2020-09-29 20:29 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:29 UTC (permalink / raw)
To: Zhen Lei
Cc: Libin, Jonathan Cameron, linux-arm-kernel, Rob Herring,
devicetree, Wei Xu, Kefeng Wang, linux-kernel
On Tue, 29 Sep 2020 22:14:47 +0800, Zhen Lei wrote:
> Convert the Hisilicon system controller and its variants binding to DT
> schema format using json-schema. All of them are grouped into one yaml
> file, to help users understand differences and avoid repeated
> descriptions.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../controller/hisilicon,hi6220-sysctrl.txt | 19 ----
> .../controller/hisilicon,hip01-sysctrl.txt | 19 ----
> .../arm/hisilicon/controller/hisilicon,sysctrl.txt | 25 -----
> .../bindings/arm/hisilicon/controller/sysctrl.yaml | 110 +++++++++++++++++++++
> .../bindings/arm/hisilicon/hi3519-sysctrl.txt | 14 ---
> 5 files changed, 110 insertions(+), 77 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (9 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 10/17] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:29 ` [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon, cpuctrl " Rob Herring
2020-09-29 14:14 ` [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon,pctrl " Zhen Lei
` (5 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon CPU controller binding to DT schema format using
json-schema.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../bindings/arm/hisilicon/controller/cpuctrl.yaml | 29 ++++++++++++++++++++++
.../arm/hisilicon/controller/hisilicon,cpuctrl.txt | 8 ------
2 files changed, 29 insertions(+), 8 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
new file mode 100644
index 000000000000000..f6a314db3a59416
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon CPU controller
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: |
+ The clock registers and power registers of secondary cores are defined
+ in CPU controller, especially in HIX5HD2 SoC.
+
+properties:
+ compatible:
+ items:
+ - const: hisilicon,cpuctrl
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+...
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
deleted file mode 100644
index ceffac537671668..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-Hisilicon CPU controller
-
-Required properties:
-- compatible : "hisilicon,cpuctrl"
-- reg : Register address and size
-
-The clock registers and power registers of secondary cores are defined
-in CPU controller, especially in HIX5HD2 SoC.
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon, cpuctrl bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl " Zhen Lei
@ 2020-09-29 20:29 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:29 UTC (permalink / raw)
To: Zhen Lei
Cc: Libin, devicetree, linux-arm-kernel, Rob Herring, Kefeng Wang,
Wei Xu, Jonathan Cameron, linux-kernel
On Tue, 29 Sep 2020 22:14:48 +0800, Zhen Lei wrote:
> Convert the Hisilicon CPU controller binding to DT schema format using
> json-schema.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 29 ++++++++++++++++++++++
> .../arm/hisilicon/controller/hisilicon,cpuctrl.txt | 8 ------
> 2 files changed, 29 insertions(+), 8 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon,pctrl bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (10 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl " Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:29 ` [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon, pctrl " Rob Herring
2020-09-29 14:14 ` [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric " Zhen Lei
` (4 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon peripheral misc control register binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../arm/hisilicon/controller/hisilicon,pctrl.txt | 13 ---------
.../bindings/arm/hisilicon/controller/pctrl.yaml | 34 ++++++++++++++++++++++
2 files changed, 34 insertions(+), 13 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
deleted file mode 100644
index deec777bc3a850a..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-PCTRL: Peripheral misc control register
-
-Required Properties:
-- compatible: "hisilicon,pctrl"
-- reg: Address and size of pctrl.
-
-Example:
-
- /* for Hi3620 */
- pctrl: pctrl@fca09000 {
- compatible = "hisilicon,pctrl";
- reg = <0xfca09000 0x1000>;
- };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml
new file mode 100644
index 000000000000000..6d50658728092cf
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/pctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Peripheral misc control register
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: Peripheral misc control register
+
+properties:
+ compatible:
+ items:
+ - const: hisilicon,pctrl
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ pctrl@fca09000 {
+ compatible = "hisilicon,pctrl";
+ reg = <0xfca09000 0x1000>;
+ };
+...
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon, pctrl bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon,pctrl " Zhen Lei
@ 2020-09-29 20:29 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:29 UTC (permalink / raw)
To: Zhen Lei
Cc: Libin, devicetree, Rob Herring, Wei Xu, Kefeng Wang,
Jonathan Cameron, linux-kernel, linux-arm-kernel
On Tue, 29 Sep 2020 22:14:49 +0800, Zhen Lei wrote:
> Convert the Hisilicon peripheral misc control register binding to DT
> schema format using json-schema.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../arm/hisilicon/controller/hisilicon,pctrl.txt | 13 ---------
> .../bindings/arm/hisilicon/controller/pctrl.yaml | 34 ++++++++++++++++++++++
> 2 files changed, 34 insertions(+), 13 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (11 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon,pctrl " Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:30 ` [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon, hip04-fabric " Rob Herring
2020-09-29 14:14 ` [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper " Zhen Lei
` (3 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon Fabric controller binding to DT schema format using
json-schema.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../arm/hisilicon/controller/hip04-fabric.yaml | 27 ++++++++++++++++++++++
.../controller/hisilicon,hip04-fabric.txt | 5 ----
2 files changed, 27 insertions(+), 5 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml
new file mode 100644
index 000000000000000..60c516a04ad58b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-fabric.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Fabric controller
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: Hisilicon Fabric controller
+
+properties:
+ compatible:
+ items:
+ - const: hisilicon,hip04-fabric
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+...
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
deleted file mode 100644
index 40453d02f2024bd..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Fabric:
-
-Required Properties:
-- compatible: "hisilicon,hip04-fabric";
-- reg: Address and size of Fabric
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon, hip04-fabric bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric " Zhen Lei
@ 2020-09-29 20:30 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:30 UTC (permalink / raw)
To: Zhen Lei
Cc: linux-kernel, Libin, Rob Herring, Wei Xu, devicetree,
Kefeng Wang, linux-arm-kernel, Jonathan Cameron
On Tue, 29 Sep 2020 22:14:50 +0800, Zhen Lei wrote:
> Convert the Hisilicon Fabric controller binding to DT schema format using
> json-schema.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../arm/hisilicon/controller/hip04-fabric.yaml | 27 ++++++++++++++++++++++
> .../controller/hisilicon,hip04-fabric.txt | 5 ----
> 2 files changed, 27 insertions(+), 5 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (12 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric " Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:30 ` [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon, hip04-bootwrapper " Rob Herring
2020-09-29 14:14 ` [PATCH v5 15/17] dt-bindings: arm: hisilicon: convert Hi6220 domain controller " Zhen Lei
` (2 subsequent siblings)
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon Bootwrapper boot method binding to DT schema format
using json-schema.
The property boot-method contains two groups of physical address range
information: bootwrapper and relocation. The "uint32-array" type is not
suitable for it, because the field "address" and "size" may occupy one or
two cells respectively. Use "minItems: 1" and "maxItems: 2" to allow it
can be written in "<addr size addr size>" or "<addr size>, <addr size>"
format.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../hisilicon/controller/hip04-bootwrapper.yaml | 34 ++++++++++++++++++++++
.../controller/hisilicon,hip04-bootwrapper.txt | 9 ------
2 files changed, 34 insertions(+), 9 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml
new file mode 100644
index 000000000000000..7378159e61df998
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-bootwrapper.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bootwrapper boot method
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: Bootwrapper boot method (software protocol on SMP)
+
+properties:
+ compatible:
+ items:
+ - const: hisilicon,hip04-bootwrapper
+
+ boot-method:
+ description: |
+ Address and size of boot method.
+ [0]: bootwrapper physical address
+ [1]: bootwrapper size
+ [2]: relocation physical address
+ [3]: relocation size
+ minItems: 1
+ maxItems: 2
+
+required:
+ - compatible
+ - boot-method
+
+additionalProperties: false
+...
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
deleted file mode 100644
index b0d53333f4fdae1..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
+++ /dev/null
@@ -1,9 +0,0 @@
-Bootwrapper boot method (software protocol on SMP):
-
-Required Properties:
-- compatible: "hisilicon,hip04-bootwrapper";
-- boot-method: Address and size of boot method.
- [0]: bootwrapper physical address
- [1]: bootwrapper size
- [2]: relocation physical address
- [3]: relocation size
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon, hip04-bootwrapper bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper " Zhen Lei
@ 2020-09-29 20:30 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:30 UTC (permalink / raw)
To: Zhen Lei
Cc: Libin, Jonathan Cameron, Wei Xu, devicetree, Kefeng Wang,
Rob Herring, linux-kernel, linux-arm-kernel
On Tue, 29 Sep 2020 22:14:51 +0800, Zhen Lei wrote:
> Convert the Hisilicon Bootwrapper boot method binding to DT schema format
> using json-schema.
>
> The property boot-method contains two groups of physical address range
> information: bootwrapper and relocation. The "uint32-array" type is not
> suitable for it, because the field "address" and "size" may occupy one or
> two cells respectively. Use "minItems: 1" and "maxItems: 2" to allow it
> can be written in "<addr size addr size>" or "<addr size>, <addr size>"
> format.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../hisilicon/controller/hip04-bootwrapper.yaml | 34 ++++++++++++++++++++++
> .../controller/hisilicon,hip04-bootwrapper.txt | 9 ------
> 2 files changed, 34 insertions(+), 9 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 15/17] dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (13 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper " Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-30 1:38 ` Leizhen (ThunderTown)
2020-09-29 14:14 ` [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl " Zhen Lei
2020-09-29 14:14 ` [PATCH v5 17/17] dt-bindings: arm: hisilicon: convert LPC controller " Zhen Lei
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon Hi6220 domain controllers binding to DT schema
format using json-schema. All of them are grouped into one yaml file, to
help users understand differences and avoid repeated descriptions.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../hisilicon/controller/hi6220-domain-ctrl.yaml | 64 ++++++++++++++++++++++
.../controller/hisilicon,hi6220-aoctrl.txt | 18 ------
.../controller/hisilicon,hi6220-mediactrl.txt | 18 ------
.../controller/hisilicon,hi6220-pmctrl.txt | 18 ------
4 files changed, 64 insertions(+), 54 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
new file mode 100644
index 000000000000000..32c562720d877c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi6220-domain-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Hi6220 domain controller
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: |
+ Hisilicon designs some special domain controllers for mobile platform,
+ such as: the power Always On domain controller, the Media domain
+ controller(e.g. codec, G3D ...) and the Power Management domain
+ controller.
+
+ The compatible names of each domain controller are as follows:
+ Power Always ON domain controller --> hisilicon,hi6220-aoctrl
+ Media domain controller --> hisilicon,hi6220-mediactrl
+ Power Management domain controller --> hisilicon,hi6220-pmctrl
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - hisilicon,hi6220-aoctrl
+ - hisilicon,hi6220-mediactrl
+ - hisilicon,hi6220-pmctrl
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ ao_ctrl@f7800000 {
+ compatible = "hisilicon,hi6220-aoctrl", "syscon";
+ reg = <0xf7800000 0x2000>;
+ #clock-cells = <1>;
+ };
+
+ media_ctrl@f4410000 {
+ compatible = "hisilicon,hi6220-mediactrl", "syscon";
+ reg = <0xf4410000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ pm_ctrl@f7032000 {
+ compatible = "hisilicon,hi6220-pmctrl", "syscon";
+ reg = <0xf7032000 0x1000>;
+ #clock-cells = <1>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
deleted file mode 100644
index 5a723c1d45f4a17..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Hisilicon Hi6220 Power Always ON domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-aoctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
- under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the power always
-on domain for mobile platform.
-
-Example:
- /*for Hi6220*/
- ao_ctrl: ao_ctrl@f7800000 {
- compatible = "hisilicon,hi6220-aoctrl", "syscon";
- reg = <0x0 0xf7800000 0x0 0x2000>;
- #clock-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
deleted file mode 100644
index dcfdcbcb6455771..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Hisilicon Hi6220 Media domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-mediactrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
- under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the multimedia
-domain(e.g. codec, G3D ...) for mobile platform.
-
-Example:
- /*for Hi6220*/
- media_ctrl: media_ctrl@f4410000 {
- compatible = "hisilicon,hi6220-mediactrl", "syscon";
- reg = <0x0 0xf4410000 0x0 0x1000>;
- #clock-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
deleted file mode 100644
index 972842f07b5a2ce..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Hisilicon Hi6220 Power Management domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-pmctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, some clock registers are define
- under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the power management
-domain for mobile platform.
-
-Example:
- /*for Hi6220*/
- pm_ctrl: pm_ctrl@f7032000 {
- compatible = "hisilicon,hi6220-pmctrl", "syscon";
- reg = <0x0 0xf7032000 0x0 0x1000>;
- #clock-cells = <1>;
- };
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 15/17] dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 15/17] dt-bindings: arm: hisilicon: convert Hi6220 domain controller " Zhen Lei
@ 2020-09-30 1:38 ` Leizhen (ThunderTown)
2020-09-30 2:50 ` Leizhen (ThunderTown)
0 siblings, 1 reply; 35+ messages in thread
From: Leizhen (ThunderTown) @ 2020-09-30 1:38 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Libin, Kefeng Wang
Hi, Rob:
I'm so glad to see you applied my patches in this morning. However, this patch
is not applied and without any comment. Did you miss it?
On 2020/9/29 22:14, Zhen Lei wrote:
> Convert the Hisilicon Hi6220 domain controllers binding to DT schema
> format using json-schema. All of them are grouped into one yaml file, to
> help users understand differences and avoid repeated descriptions.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../hisilicon/controller/hi6220-domain-ctrl.yaml | 64 ++++++++++++++++++++++
> .../controller/hisilicon,hi6220-aoctrl.txt | 18 ------
> .../controller/hisilicon,hi6220-mediactrl.txt | 18 ------
> .../controller/hisilicon,hi6220-pmctrl.txt | 18 ------
> 4 files changed, 64 insertions(+), 54 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
> new file mode 100644
> index 000000000000000..32c562720d877c9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi6220-domain-ctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hisilicon Hi6220 domain controller
> +
> +maintainers:
> + - Wei Xu <xuwei5@hisilicon.com>
> +
> +description: |
> + Hisilicon designs some special domain controllers for mobile platform,
> + such as: the power Always On domain controller, the Media domain
> + controller(e.g. codec, G3D ...) and the Power Management domain
> + controller.
> +
> + The compatible names of each domain controller are as follows:
> + Power Always ON domain controller --> hisilicon,hi6220-aoctrl
> + Media domain controller --> hisilicon,hi6220-mediactrl
> + Power Management domain controller --> hisilicon,hi6220-pmctrl
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - hisilicon,hi6220-aoctrl
> + - hisilicon,hi6220-mediactrl
> + - hisilicon,hi6220-pmctrl
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + ao_ctrl@f7800000 {
> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
> + reg = <0xf7800000 0x2000>;
> + #clock-cells = <1>;
> + };
> +
> + media_ctrl@f4410000 {
> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
> + reg = <0xf4410000 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + pm_ctrl@f7032000 {
> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
> + reg = <0xf7032000 0x1000>;
> + #clock-cells = <1>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
> deleted file mode 100644
> index 5a723c1d45f4a17..000000000000000
> --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -Hisilicon Hi6220 Power Always ON domain controller
> -
> -Required properties:
> -- compatible : "hisilicon,hi6220-aoctrl"
> -- reg : Register address and size
> -- #clock-cells: should be set to 1, many clock registers are defined
> - under this controller and this property must be present.
> -
> -Hisilicon designs this system controller to control the power always
> -on domain for mobile platform.
> -
> -Example:
> - /*for Hi6220*/
> - ao_ctrl: ao_ctrl@f7800000 {
> - compatible = "hisilicon,hi6220-aoctrl", "syscon";
> - reg = <0x0 0xf7800000 0x0 0x2000>;
> - #clock-cells = <1>;
> - };
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
> deleted file mode 100644
> index dcfdcbcb6455771..000000000000000
> --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -Hisilicon Hi6220 Media domain controller
> -
> -Required properties:
> -- compatible : "hisilicon,hi6220-mediactrl"
> -- reg : Register address and size
> -- #clock-cells: should be set to 1, many clock registers are defined
> - under this controller and this property must be present.
> -
> -Hisilicon designs this system controller to control the multimedia
> -domain(e.g. codec, G3D ...) for mobile platform.
> -
> -Example:
> - /*for Hi6220*/
> - media_ctrl: media_ctrl@f4410000 {
> - compatible = "hisilicon,hi6220-mediactrl", "syscon";
> - reg = <0x0 0xf4410000 0x0 0x1000>;
> - #clock-cells = <1>;
> - };
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
> deleted file mode 100644
> index 972842f07b5a2ce..000000000000000
> --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -Hisilicon Hi6220 Power Management domain controller
> -
> -Required properties:
> -- compatible : "hisilicon,hi6220-pmctrl"
> -- reg : Register address and size
> -- #clock-cells: should be set to 1, some clock registers are define
> - under this controller and this property must be present.
> -
> -Hisilicon designs this system controller to control the power management
> -domain for mobile platform.
> -
> -Example:
> - /*for Hi6220*/
> - pm_ctrl: pm_ctrl@f7032000 {
> - compatible = "hisilicon,hi6220-pmctrl", "syscon";
> - reg = <0x0 0xf7032000 0x0 0x1000>;
> - #clock-cells = <1>;
> - };
>
^ permalink raw reply [flat|nested] 35+ messages in thread* Re: [PATCH v5 15/17] dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema
2020-09-30 1:38 ` Leizhen (ThunderTown)
@ 2020-09-30 2:50 ` Leizhen (ThunderTown)
0 siblings, 0 replies; 35+ messages in thread
From: Leizhen (ThunderTown) @ 2020-09-30 2:50 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Kefeng Wang, Libin
On 2020/9/30 9:38, Leizhen (ThunderTown) wrote:
> Hi, Rob:
> I'm so glad to see you applied my patches in this morning. However, this patch
> is not applied and without any comment. Did you miss it?
Oh, I got it, missed the property "#reset-cells". What a shame! I will post the new one.
>
>
> On 2020/9/29 22:14, Zhen Lei wrote:
>> Convert the Hisilicon Hi6220 domain controllers binding to DT schema
>> format using json-schema. All of them are grouped into one yaml file, to
>> help users understand differences and avoid repeated descriptions.
>>
>> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
>> ---
>> .../hisilicon/controller/hi6220-domain-ctrl.yaml | 64 ++++++++++++++++++++++
>> .../controller/hisilicon,hi6220-aoctrl.txt | 18 ------
>> .../controller/hisilicon,hi6220-mediactrl.txt | 18 ------
>> .../controller/hisilicon,hi6220-pmctrl.txt | 18 ------
>> 4 files changed, 64 insertions(+), 54 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
>> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
>> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
>> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
>> new file mode 100644
>> index 000000000000000..32c562720d877c9
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml
>> @@ -0,0 +1,64 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi6220-domain-ctrl.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Hisilicon Hi6220 domain controller
>> +
>> +maintainers:
>> + - Wei Xu <xuwei5@hisilicon.com>
>> +
>> +description: |
>> + Hisilicon designs some special domain controllers for mobile platform,
>> + such as: the power Always On domain controller, the Media domain
>> + controller(e.g. codec, G3D ...) and the Power Management domain
>> + controller.
>> +
>> + The compatible names of each domain controller are as follows:
>> + Power Always ON domain controller --> hisilicon,hi6220-aoctrl
>> + Media domain controller --> hisilicon,hi6220-mediactrl
>> + Power Management domain controller --> hisilicon,hi6220-pmctrl
>> +
>> +properties:
>> + compatible:
>> + items:
>> + - enum:
>> + - hisilicon,hi6220-aoctrl
>> + - hisilicon,hi6220-mediactrl
>> + - hisilicon,hi6220-pmctrl
>> + - const: syscon
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + '#clock-cells':
>> + const: 1
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - '#clock-cells'
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + ao_ctrl@f7800000 {
>> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
>> + reg = <0xf7800000 0x2000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> + media_ctrl@f4410000 {
>> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
>> + reg = <0xf4410000 0x1000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> + pm_ctrl@f7032000 {
>> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
>> + reg = <0xf7032000 0x1000>;
>> + #clock-cells = <1>;
>> + };
>> +...
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
>> deleted file mode 100644
>> index 5a723c1d45f4a17..000000000000000
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
>> +++ /dev/null
>> @@ -1,18 +0,0 @@
>> -Hisilicon Hi6220 Power Always ON domain controller
>> -
>> -Required properties:
>> -- compatible : "hisilicon,hi6220-aoctrl"
>> -- reg : Register address and size
>> -- #clock-cells: should be set to 1, many clock registers are defined
>> - under this controller and this property must be present.
>> -
>> -Hisilicon designs this system controller to control the power always
>> -on domain for mobile platform.
>> -
>> -Example:
>> - /*for Hi6220*/
>> - ao_ctrl: ao_ctrl@f7800000 {
>> - compatible = "hisilicon,hi6220-aoctrl", "syscon";
>> - reg = <0x0 0xf7800000 0x0 0x2000>;
>> - #clock-cells = <1>;
>> - };
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
>> deleted file mode 100644
>> index dcfdcbcb6455771..000000000000000
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
>> +++ /dev/null
>> @@ -1,18 +0,0 @@
>> -Hisilicon Hi6220 Media domain controller
>> -
>> -Required properties:
>> -- compatible : "hisilicon,hi6220-mediactrl"
>> -- reg : Register address and size
>> -- #clock-cells: should be set to 1, many clock registers are defined
>> - under this controller and this property must be present.
>> -
>> -Hisilicon designs this system controller to control the multimedia
>> -domain(e.g. codec, G3D ...) for mobile platform.
>> -
>> -Example:
>> - /*for Hi6220*/
>> - media_ctrl: media_ctrl@f4410000 {
>> - compatible = "hisilicon,hi6220-mediactrl", "syscon";
>> - reg = <0x0 0xf4410000 0x0 0x1000>;
>> - #clock-cells = <1>;
>> - };
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
>> deleted file mode 100644
>> index 972842f07b5a2ce..000000000000000
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
>> +++ /dev/null
>> @@ -1,18 +0,0 @@
>> -Hisilicon Hi6220 Power Management domain controller
>> -
>> -Required properties:
>> -- compatible : "hisilicon,hi6220-pmctrl"
>> -- reg : Register address and size
>> -- #clock-cells: should be set to 1, some clock registers are define
>> - under this controller and this property must be present.
>> -
>> -Hisilicon designs this system controller to control the power management
>> -domain for mobile platform.
>> -
>> -Example:
>> - /*for Hi6220*/
>> - pm_ctrl: pm_ctrl@f7032000 {
>> - compatible = "hisilicon,hi6220-pmctrl", "syscon";
>> - reg = <0x0 0xf7032000 0x0 0x1000>;
>> - #clock-cells = <1>;
>> - };
>>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> .
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (14 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 15/17] dt-bindings: arm: hisilicon: convert Hi6220 domain controller " Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:30 ` [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon, hi3798cv200-perictrl " Rob Herring
2020-09-29 14:14 ` [PATCH v5 17/17] dt-bindings: arm: hisilicon: convert LPC controller " Zhen Lei
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon Hi3798CV200 Peripheral Controller binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../hisilicon/controller/hi3798cv200-perictrl.yaml | 64 ++++++++++++++++++++++
.../controller/hisilicon,hi3798cv200-perictrl.txt | 21 -------
2 files changed, 64 insertions(+), 21 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml
new file mode 100644
index 000000000000000..cba1937aad9a8d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi3798cv200-perictrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Hi3798CV200 Peripheral Controller
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: |
+ The Hi3798CV200 Peripheral Controller controls peripherals, queries
+ their status, and configures some functions of peripherals.
+
+properties:
+ compatible:
+ items:
+ - const: hisilicon,hi3798cv200-perictrl
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties:
+ type: object
+
+examples:
+ - |
+ peripheral-controller@8a20000 {
+ compatible = "hisilicon,hi3798cv200-perictrl", "syscon", "simple-mfd";
+ reg = <0x8a20000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x8a20000 0x1000>;
+
+ phy@850 {
+ compatible = "hisilicon,hi3798cv200-combphy";
+ reg = <0x850 0x8>;
+ #phy-cells = <1>;
+ clocks = <&crg 42>;
+ resets = <&crg 0x188 4>;
+ assigned-clocks = <&crg 42>;
+ assigned-clock-rates = <100000000>;
+ hisilicon,fixed-mode = <4>;
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
deleted file mode 100644
index 0d5282f4670658d..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-Hisilicon Hi3798CV200 Peripheral Controller
-
-The Hi3798CV200 Peripheral Controller controls peripherals, queries
-their status, and configures some functions of peripherals.
-
-Required properties:
-- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon"
- and "simple-mfd".
-- reg: Register address and size of Peripheral Controller.
-- #address-cells: Should be 1.
-- #size-cells: Should be 1.
-
-Examples:
-
- perictrl: peripheral-controller@8a20000 {
- compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
- "simple-mfd";
- reg = <0x8a20000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon, hi3798cv200-perictrl bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl " Zhen Lei
@ 2020-09-29 20:30 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:30 UTC (permalink / raw)
To: Zhen Lei
Cc: linux-arm-kernel, Wei Xu, Libin, Jonathan Cameron, Kefeng Wang,
devicetree, linux-kernel, Rob Herring
On Tue, 29 Sep 2020 22:14:53 +0800, Zhen Lei wrote:
> Convert the Hisilicon Hi3798CV200 Peripheral Controller binding to DT
> schema format using json-schema.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../hisilicon/controller/hi3798cv200-perictrl.yaml | 64 ++++++++++++++++++++++
> .../controller/hisilicon,hi3798cv200-perictrl.txt | 21 -------
> 2 files changed, 64 insertions(+), 21 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 17/17] dt-bindings: arm: hisilicon: convert LPC controller bindings to json-schema
2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei
` (15 preceding siblings ...)
2020-09-29 14:14 ` [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl " Zhen Lei
@ 2020-09-29 14:14 ` Zhen Lei
2020-09-29 20:30 ` Rob Herring
16 siblings, 1 reply; 35+ messages in thread
From: Zhen Lei @ 2020-09-29 14:14 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Jonathan Cameron, devicetree,
linux-arm-kernel, linux-kernel
Cc: Zhen Lei, Libin, Kefeng Wang
Convert the Hisilicon Hip06 SoCs implement a Low Pin Count (LPC)
controller binding to DT schema format using json-schema.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../arm/hisilicon/hisilicon-low-pin-count.txt | 33 ------------
.../bindings/arm/hisilicon/low-pin-count.yaml | 61 ++++++++++++++++++++++
2 files changed, 61 insertions(+), 33 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
deleted file mode 100644
index 10bd35f9207f2ee..000000000000000
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-Hisilicon Hip06 Low Pin Count device
- Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which
- provides I/O access to some legacy ISA devices.
- Hip06 is based on arm64 architecture where there is no I/O space. So, the
- I/O ports here are not CPU addresses, and there is no 'ranges' property in
- LPC device node.
-
-Required properties:
-- compatible: value should be as follows:
- (a) "hisilicon,hip06-lpc"
- (b) "hisilicon,hip07-lpc"
-- #address-cells: must be 2 which stick to the ISA/EISA binding doc.
-- #size-cells: must be 1 which stick to the ISA/EISA binding doc.
-- reg: base memory range where the LPC register set is mapped.
-
-Note:
- The node name before '@' must be "isa" to represent the binding stick to the
- ISA/EISA binding specification.
-
-Example:
-
-isa@a01b0000 {
- compatible = "hisilicon,hip06-lpc";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0x0 0xa01b0000 0x0 0x1000>;
-
- ipmi0: bt@e4 {
- compatible = "ipmi-bt";
- device_type = "ipmi";
- reg = <0x01 0xe4 0x04>;
- };
-};
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml b/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml
new file mode 100644
index 000000000000000..3b36e683bb1511d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon HiP06 Low Pin Count device
+
+maintainers:
+ - Wei Xu <xuwei5@hisilicon.com>
+
+description: |
+ Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which
+ provides I/O access to some legacy ISA devices.
+ HiP06 is based on arm64 architecture where there is no I/O space. So, the
+ I/O ports here are not CPU addresses, and there is no 'ranges' property in
+ LPC device node.
+
+properties:
+ $nodename:
+ pattern: '^isa@[0-9a-f]+$'
+ description: |
+ The node name before '@' must be "isa" to represent the binding stick
+ to the ISA/EISA binding specification.
+
+ compatible:
+ enum:
+ - hisilicon,hip06-lpc
+ - hisilicon,hip07-lpc
+
+ reg:
+ maxItems: 1
+
+ '#address-cells':
+ const: 2
+
+ '#size-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties:
+ type: object
+
+examples:
+ - |
+ isa@a01b0000 {
+ compatible = "hisilicon,hip06-lpc";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0xa01b0000 0x1000>;
+
+ ipmi0: bt@e4 {
+ compatible = "ipmi-bt";
+ device_type = "ipmi";
+ reg = <0x01 0xe4 0x04>;
+ };
+ };
+...
--
1.8.3
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v5 17/17] dt-bindings: arm: hisilicon: convert LPC controller bindings to json-schema
2020-09-29 14:14 ` [PATCH v5 17/17] dt-bindings: arm: hisilicon: convert LPC controller " Zhen Lei
@ 2020-09-29 20:30 ` Rob Herring
0 siblings, 0 replies; 35+ messages in thread
From: Rob Herring @ 2020-09-29 20:30 UTC (permalink / raw)
To: Zhen Lei
Cc: Jonathan Cameron, linux-kernel, Kefeng Wang, Wei Xu, devicetree,
linux-arm-kernel, Libin, Rob Herring
On Tue, 29 Sep 2020 22:14:54 +0800, Zhen Lei wrote:
> Convert the Hisilicon Hip06 SoCs implement a Low Pin Count (LPC)
> controller binding to DT schema format using json-schema.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
> .../arm/hisilicon/hisilicon-low-pin-count.txt | 33 ------------
> .../bindings/arm/hisilicon/low-pin-count.yaml | 61 ++++++++++++++++++++++
> 2 files changed, 61 insertions(+), 33 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml
>
Applied, thanks!
^ permalink raw reply [flat|nested] 35+ messages in thread