From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <maz@kernel.org>,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Lars Povlsen <lars.povlsen@microchip.com>,
<Steen.Hegelund@microchip.com>,
Gregory CLEMENT <gregory.clement@bootlin.com>
Subject: [PATCH 3/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Jaguar2 interrupt controller
Date: Thu, 5 Nov 2020 18:15:32 +0100 [thread overview]
Message-ID: <20201105171535.923570-4-gregory.clement@bootlin.com> (raw)
In-Reply-To: <20201105171535.923570-1-gregory.clement@bootlin.com>
Add the Device Tree binding documentation for the Microsemi Jaguar2
interrupt controller that is part of the ICPU. It is connected directly to
the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
.../interrupt-controller/mscc,ocelot-icpu-intr.txt | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
index 42de86e023a6..916832064d64 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
@@ -1,11 +1,12 @@
Microsemi Ocelot SoC ICPU Interrupt Controller
-Luton and Servals belong the same family as Ocelot: the VCoreIII family
+Luton, Servals and Jaguar 2 belong the same family as Ocelot: the
+VCoreIII family
Required properties:
-- compatible : should be "mscc,ocelot-icpu-intr" or "mscc,luton-icpu-intr"
- or "mscc,serval-icpu-intr"
+- compatible : should be "mscc,ocelot-icpu-intr", "mscc,luton-icpu-intr",
+ "mscc,serval-icpu-intr" or "mscc,jaguar2-icpu-intr"
- reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
--
2.28.0
next prev parent reply other threads:[~2020-11-05 17:16 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 17:15 [PATCH 0/6] Extend irqchip ocelot driver to support other SoCs Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 1/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Luton interrupt controller Gregory CLEMENT
2020-11-09 20:05 ` Rob Herring
2020-11-05 17:15 ` [PATCH 2/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Serval " Gregory CLEMENT
2020-11-05 17:15 ` Gregory CLEMENT [this message]
2020-11-05 17:15 ` [PATCH 4/6] irqchip: ocelot: Add support for Luton platforms Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 5/6] irqchip: ocelot: Add support for Serval platforms Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 6/6] irqchip: ocelot: Add support for Jaguar2 platforms Gregory CLEMENT
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