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From: Rob Herring <robh@kernel.org>
To: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	Steen.Hegelund@microchip.com
Subject: Re: [PATCH 1/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Luton interrupt controller
Date: Mon, 9 Nov 2020 14:05:04 -0600	[thread overview]
Message-ID: <20201109200504.GA1673414@bogus> (raw)
In-Reply-To: <20201105171535.923570-2-gregory.clement@bootlin.com>

On Thu, Nov 05, 2020 at 06:15:30PM +0100, Gregory CLEMENT wrote:
> Add the Device Tree binding documentation for the Microsemi Luton
> interrupt controller that is part of the ICPU. It is connected directly to
> the MIPS core interrupt controller.
> 
> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
> ---
>  .../bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt   | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

The patches look fine, but can you convert this to schema first.

> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
> index f5baeccb689f..94dc95cb815c 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt
> @@ -1,8 +1,10 @@
>  Microsemi Ocelot SoC ICPU Interrupt Controller
>  
> +Luton belongs the same family of Ocelot: the VCoreIII family
> +
>  Required properties:
>  
> -- compatible : should be "mscc,ocelot-icpu-intr"
> +- compatible : should be "mscc,ocelot-icpu-intr" or "mscc,luton-icpu-intr"
>  - reg : Specifies base physical address and size of the registers.
>  - interrupt-controller : Identifies the node as an interrupt controller
>  - #interrupt-cells : Specifies the number of cells needed to encode an
> -- 
> 2.28.0
> 

  reply	other threads:[~2020-11-09 20:05 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-05 17:15 [PATCH 0/6] Extend irqchip ocelot driver to support other SoCs Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 1/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Luton interrupt controller Gregory CLEMENT
2020-11-09 20:05   ` Rob Herring [this message]
2020-11-05 17:15 ` [PATCH 2/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Serval " Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 3/6] dt-bindings: interrupt-controller: Add binding for the Microsemi Jaguar2 " Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 4/6] irqchip: ocelot: Add support for Luton platforms Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 5/6] irqchip: ocelot: Add support for Serval platforms Gregory CLEMENT
2020-11-05 17:15 ` [PATCH 6/6] irqchip: ocelot: Add support for Jaguar2 platforms Gregory CLEMENT

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