* [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
@ 2020-11-30 3:30 Biwen Li
2020-11-30 3:30 ` [v3 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines Biwen Li
` (10 more replies)
0 siblings, 11 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Hou Zhiqiang, Biwen Li
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add an new IRQ chip declaration for LS1043A and LS1088A
- compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A.
- compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- cleanup code
- remove robust copyright
Change in v2:
- add despcription of bit reverse
- update copyright
drivers/irqchip/irq-ls-extirq.c | 17 +++++++----------
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/irqchip/irq-ls-extirq.c b/drivers/irqchip/irq-ls-extirq.c
index 4d1179fed77c..47804ce78b21 100644
--- a/drivers/irqchip/irq-ls-extirq.c
+++ b/drivers/irqchip/irq-ls-extirq.c
@@ -18,7 +18,7 @@
struct ls_extirq_data {
struct regmap *syscon;
u32 intpcr;
- bool bit_reverse;
+ bool is_ls1021a_or_ls1043a;
u32 nirq;
struct irq_fwspec map[MAXIRQ];
};
@@ -30,7 +30,7 @@ ls_extirq_set_type(struct irq_data *data, unsigned int type)
irq_hw_number_t hwirq = data->hwirq;
u32 value, mask;
- if (priv->bit_reverse)
+ if (priv->is_ls1021a_or_ls1043a)
mask = 1U << (31 - hwirq);
else
mask = 1U << hwirq;
@@ -174,14 +174,9 @@ ls_extirq_of_init(struct device_node *node, struct device_node *parent)
if (ret)
goto out;
- if (of_device_is_compatible(node, "fsl,ls1021a-extirq")) {
- u32 revcr;
-
- ret = regmap_read(priv->syscon, LS1021A_SCFGREVCR, &revcr);
- if (ret)
- goto out;
- priv->bit_reverse = (revcr != 0);
- }
+ if (of_device_is_compatible(node, "fsl,ls1021a-extirq") || \
+ of_device_is_compatible(node, "fsl,ls1043a-extirq"))
+ priv->is_ls1021a_or_ls1043a = true;
domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq, node,
&extirq_domain_ops, priv);
@@ -195,3 +190,5 @@ ls_extirq_of_init(struct device_node *node, struct device_node *parent)
}
IRQCHIP_DECLARE(ls1021a_extirq, "fsl,ls1021a-extirq", ls_extirq_of_init);
+IRQCHIP_DECLARE(ls1043a_extirq, "fsl,ls1043a-extirq", ls_extirq_of_init);
+IRQCHIP_DECLARE(ls1088a_extirq, "fsl,ls1088a-extirq", ls_extirq_of_init);
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 03/11] arm64: dts: ls1046a: " Biwen Li
` (9 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 27 ++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 5c2e370f6316..38a6d951ecc5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
@@ -311,6 +311,31 @@
compatible = "fsl,ls1043a-scfg", "syscon";
reg = <0x0 0x1570000 0x0 0x10000>;
big-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1570000 0x10000>;
+
+ extirq: interrupt-controller@1ac {
+ compatible = "fsl,ls1043a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1ac 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
};
crypto: crypto@1700000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 03/11] arm64: dts: ls1046a: add DT node for external interrupt lines
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
2020-11-30 3:30 ` [v3 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node Biwen Li
` (8 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 27 ++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 0246d975a206..dff3ee84c294 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
*
* Mingkai Hu <mingkai.hu@nxp.com>
*/
@@ -314,6 +314,31 @@
compatible = "fsl,ls1046a-scfg", "syscon";
reg = <0x0 0x1570000 0x0 0x10000>;
big-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1570000 0x10000>;
+
+ extirq: interrupt-controller@1ac {
+ compatible = "fsl,ls1046a-extirq", "fsl,ls1043a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1ac 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
};
crypto: crypto@1700000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
2020-11-30 3:30 ` [v3 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines Biwen Li
2020-11-30 3:30 ` [v3 03/11] arm64: dts: ls1046a: " Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines Biwen Li
` (7 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Hou Zhiqiang
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add interrupt line for RTC node, which is low level active.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
index d53ccc56bb63..60acdf0b689e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -3,6 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2019-2020 NXP
*
* Mingkai Hu <mingkai.hu@nxp.com>
*/
@@ -74,6 +75,8 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
+ /* IRQ_RTC_B -> IRQ05, active low */
+ interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (2 preceding siblings ...)
2020-11-30 3:30 ` [v3 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node Biwen Li
` (6 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 33 ++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 169f4742ae3b..12fe8f079c28 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Include file for NXP Layerscape-1088A family SoC.
*
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Harninder Rai <harninder.rai@nxp.com>
*
@@ -206,6 +206,37 @@
little-endian;
};
+ isc: syscon@1f70000 {
+ compatible = "fsl,ls1088a-isc", "syscon";
+ reg = <0x0 0x1f70000 0x0 0x10000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f70000 0x10000>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
+ };
+
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (3 preceding siblings ...)
2020-11-30 3:30 ` [v3 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines Biwen Li
` (5 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Fix interrupt line for RTC node on ls1088ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
index 5633e59febc3..89c40d3f9a50 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -2,7 +2,7 @@
/*
* Device Tree file for NXP LS1088A RDB Board.
*
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Harninder Rai <harninder.rai@nxp.com>
*
@@ -51,8 +51,8 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
- /* IRQ10_B */
- interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
+ /* IRQ_RTC_B -> IRQ0_B(CPLD) -> IRQ00(CPU), active low */
+ interrupts-extended = <&extirq 0 IRQ_TYPE_LEVEL_LOW>;
};
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (4 preceding siblings ...)
2020-11-30 3:30 ` [v3 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node Biwen Li
` (4 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 33 ++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 41102dacc2e1..f75aa2ce4e2b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-2080A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*
@@ -154,6 +154,37 @@
little-endian;
};
+ isc: syscon@1f70000 {
+ compatible = "fsl,ls2080a-isc", "syscon";
+ reg = <0x0 0x1f70000 0x0 0x10000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f70000 0x10000>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,ls2080a-extirq", "fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
+ };
+
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (5 preceding siblings ...)
2020-11-30 3:30 ` [v3 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines Biwen Li
` (3 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Add interrupt line for RTC node on ls208xa-rdb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
index d0d670227ae2..4b71c4fcb35f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
@@ -3,7 +3,7 @@
* Device Tree file for Freescale LS2080A RDB Board.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*
@@ -56,6 +56,8 @@
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
+ /* IRQ_RTC_B -> IRQ06, active low */
+ interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (6 preceding siblings ...)
2020-11-30 3:30 ` [v3 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node Biwen Li
` (2 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index d247e4228d60..095298a84f4e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -664,6 +664,37 @@
little-endian;
};
+ isc: syscon@1f70000 {
+ compatible = "fsl,lx2160a-isc", "syscon";
+ reg = <0x0 0x1f70000 0x0 0x10000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f70000 0x10000>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,lx2160a-extirq", "fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
+ };
+
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (7 preceding siblings ...)
2020-11-30 3:30 ` [v3 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 3:30 ` [v3 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Biwen Li
2020-11-30 8:20 ` [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Marc Zyngier
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Fix interrupt line for RTC node on lx2160ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 54fe8cd3a711..f3bab76797fb 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -2,7 +2,7 @@
//
// Device Tree file for LX2160ARDB
//
-// Copyright 2018 NXP
+// Copyright 2018-2020 NXP
/dts-v1/;
@@ -151,8 +151,8 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
- // IRQ10_B
- interrupts = <0 150 0x4>;
+ /* IRQ_RTC_B -> IRQ08, active low */
+ interrupts-extended = <&extirq 8 IRQ_TYPE_LEVEL_LOW>;
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [v3 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (8 preceding siblings ...)
2020-11-30 3:30 ` [v3 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node Biwen Li
@ 2020-11-30 3:30 ` Biwen Li
2020-11-30 8:20 ` [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Marc Zyngier
10 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 3:30 UTC (permalink / raw)
To: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, jason, maz
Cc: devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
From: Biwen Li <biwen.li@nxp.com>
Update bindings for Layerscape external irqs,
support more SoCs(LS1043A, LS1046A, LS1088A,
LS208xA, LX216xA)
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
Change in v3:
- remove robust information
Change in v2:
- update reg property
- update compatible property
.../bindings/interrupt-controller/fsl,ls-extirq.txt | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
index f0ad7801e8cf..4d47df1a5c91 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
@@ -1,6 +1,7 @@
* Freescale Layerscape external IRQs
-Some Layerscape SOCs (LS1021A, LS1043A, LS1046A) support inverting
+Some Layerscape SOCs (LS1021A, LS1043A, LS1046A
+LS1088A, LS208xA, LX216xA) support inverting
the polarity of certain external interrupt lines.
The device node must be a child of the node representing the
@@ -8,12 +9,15 @@ Supplemental Configuration Unit (SCFG).
Required properties:
- compatible: should be "fsl,<soc-name>-extirq", e.g. "fsl,ls1021a-extirq".
+ "fsl,ls1043a-extirq": for LS1043A, LS1046A.
+ "fsl,ls1088a-extirq": for LS1088A, LS208xA, LX216xA.
- #interrupt-cells: Must be 2. The first element is the index of the
external interrupt line. The second element is the trigger type.
- #address-cells: Must be 0.
- interrupt-controller: Identifies the node as an interrupt controller
- reg: Specifies the Interrupt Polarity Control Register (INTPCR) in
- the SCFG.
+ the SCFG or the External Interrupt Control Register (IRQCR) in
+ the ISC.
- interrupt-map: Specifies the mapping from external interrupts to GIC
interrupts.
- interrupt-map-mask: Must be <0xffffffff 0>.
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
` (9 preceding siblings ...)
2020-11-30 3:30 ` [v3 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Biwen Li
@ 2020-11-30 8:20 ` Marc Zyngier
2020-11-30 8:24 ` [EXT] " Biwen Li
10 siblings, 1 reply; 13+ messages in thread
From: Marc Zyngier @ 2020-11-30 8:20 UTC (permalink / raw)
To: Biwen Li
Cc: linux, shawnguo, robh+dt, mark.rutland, leoyang.li, zhiqiang.hou,
tglx, devicetree, linux-kernel, jiafei.pan, xiaobo.xie,
linux-arm-kernel, Biwen Li
[- jason]
On 2020-11-30 03:30, Biwen Li wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Add an new IRQ chip declaration for LS1043A and LS1088A
> - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A.
> - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Signed-off-by: Biwen Li <biwen.li@nxp.com>
> ---
> Change in v3:
> - cleanup code
> - remove robust copyright
>
> Change in v2:
> - add despcription of bit reverse
> - update copyright
>
> drivers/irqchip/irq-ls-extirq.c | 17 +++++++----------
> 1 file changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/irqchip/irq-ls-extirq.c
> b/drivers/irqchip/irq-ls-extirq.c
> index 4d1179fed77c..47804ce78b21 100644
> --- a/drivers/irqchip/irq-ls-extirq.c
> +++ b/drivers/irqchip/irq-ls-extirq.c
> @@ -18,7 +18,7 @@
> struct ls_extirq_data {
> struct regmap *syscon;
> u32 intpcr;
> - bool bit_reverse;
> + bool is_ls1021a_or_ls1043a;
> u32 nirq;
> struct irq_fwspec map[MAXIRQ];
> };
> @@ -30,7 +30,7 @@ ls_extirq_set_type(struct irq_data *data, unsigned
> int type)
> irq_hw_number_t hwirq = data->hwirq;
> u32 value, mask;
>
> - if (priv->bit_reverse)
> + if (priv->is_ls1021a_or_ls1043a)
> mask = 1U << (31 - hwirq);
> else
> mask = 1U << hwirq;
> @@ -174,14 +174,9 @@ ls_extirq_of_init(struct device_node *node,
> struct device_node *parent)
> if (ret)
> goto out;
>
> - if (of_device_is_compatible(node, "fsl,ls1021a-extirq")) {
> - u32 revcr;
> -
> - ret = regmap_read(priv->syscon, LS1021A_SCFGREVCR, &revcr);
> - if (ret)
> - goto out;
> - priv->bit_reverse = (revcr != 0);
> - }
This isn't explained in the commit message. You are changing the way
you infer some properties, and that's not innocent. Please describe
all important changes in the commit message.
> + if (of_device_is_compatible(node, "fsl,ls1021a-extirq") || \
Spurious trailing \?
> + of_device_is_compatible(node, "fsl,ls1043a-extirq"))
> + priv->is_ls1021a_or_ls1043a = true;
Which is better written as:
priv->is_ls1021a_or_ls1043a = (of_device_is_compatible(node,
"fsl,ls1021a-extirq") ||
of_device_is_compatible(node,
"fsl,ls1043a-extirq"));
>
> domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq, node,
> &extirq_domain_ops, priv);
> @@ -195,3 +190,5 @@ ls_extirq_of_init(struct device_node *node, struct
> device_node *parent)
> }
>
> IRQCHIP_DECLARE(ls1021a_extirq, "fsl,ls1021a-extirq",
> ls_extirq_of_init);
> +IRQCHIP_DECLARE(ls1043a_extirq, "fsl,ls1043a-extirq",
> ls_extirq_of_init);
> +IRQCHIP_DECLARE(ls1088a_extirq, "fsl,ls1088a-extirq",
> ls_extirq_of_init);
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [EXT] Re: [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
2020-11-30 8:20 ` [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Marc Zyngier
@ 2020-11-30 8:24 ` Biwen Li
0 siblings, 0 replies; 13+ messages in thread
From: Biwen Li @ 2020-11-30 8:24 UTC (permalink / raw)
To: Marc Zyngier, Biwen Li (OSS)
Cc: linux, shawnguo, robh+dt, mark.rutland, Leo Li, Z.q. Hou, tglx,
devicetree, linux-kernel, Jiafei Pan, Xiaobo Xie,
linux-arm-kernel
>
> On 2020-11-30 03:30, Biwen Li wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Add an new IRQ chip declaration for LS1043A and LS1088A
> > - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A.
> > - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > Signed-off-by: Biwen Li <biwen.li@nxp.com>
> > ---
> > Change in v3:
> > - cleanup code
> > - remove robust copyright
> >
> > Change in v2:
> > - add despcription of bit reverse
> > - update copyright
> >
> > drivers/irqchip/irq-ls-extirq.c | 17 +++++++----------
> > 1 file changed, 7 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-ls-extirq.c
> > b/drivers/irqchip/irq-ls-extirq.c index 4d1179fed77c..47804ce78b21
> > 100644
> > --- a/drivers/irqchip/irq-ls-extirq.c
> > +++ b/drivers/irqchip/irq-ls-extirq.c
> > @@ -18,7 +18,7 @@
> > struct ls_extirq_data {
> > struct regmap *syscon;
> > u32 intpcr;
> > - bool bit_reverse;
> > + bool is_ls1021a_or_ls1043a;
> > u32 nirq;
> > struct irq_fwspec map[MAXIRQ];
> > };
> > @@ -30,7 +30,7 @@ ls_extirq_set_type(struct irq_data *data, unsigned
> > int type)
> > irq_hw_number_t hwirq = data->hwirq;
> > u32 value, mask;
> >
> > - if (priv->bit_reverse)
> > + if (priv->is_ls1021a_or_ls1043a)
> > mask = 1U << (31 - hwirq);
> > else
> > mask = 1U << hwirq;
> > @@ -174,14 +174,9 @@ ls_extirq_of_init(struct device_node *node,
> > struct device_node *parent)
> > if (ret)
> > goto out;
> >
> > - if (of_device_is_compatible(node, "fsl,ls1021a-extirq")) {
> > - u32 revcr;
> > -
> > - ret = regmap_read(priv->syscon, LS1021A_SCFGREVCR,
> &revcr);
> > - if (ret)
> > - goto out;
> > - priv->bit_reverse = (revcr != 0);
> > - }
>
> This isn't explained in the commit message. You are changing the way you infer
> some properties, and that's not innocent. Please describe all important changes
> in the commit message.
Sure, will update commit message for this.
>
> > + if (of_device_is_compatible(node, "fsl,ls1021a-extirq") || \
>
> Spurious trailing \?
Don't need it, will remove it in v4.
>
> > + of_device_is_compatible(node, "fsl,ls1043a-extirq"))
> > + priv->is_ls1021a_or_ls1043a = true;
>
> Which is better written as:
>
> priv->is_ls1021a_or_ls1043a = (of_device_is_compatible(node,
> "fsl,ls1021a-extirq") ||
>
> of_device_is_compatible(node, "fsl,ls1043a-extirq"));
Sure, np. Will update it in v4.
> >
> > domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq,
> node,
> > &extirq_domain_ops, priv);
> @@
> > -195,3 +190,5 @@ ls_extirq_of_init(struct device_node *node, struct
> > device_node *parent) }
> >
> > IRQCHIP_DECLARE(ls1021a_extirq, "fsl,ls1021a-extirq",
> > ls_extirq_of_init);
> > +IRQCHIP_DECLARE(ls1043a_extirq, "fsl,ls1043a-extirq",
> > ls_extirq_of_init);
> > +IRQCHIP_DECLARE(ls1088a_extirq, "fsl,ls1088a-extirq",
> > ls_extirq_of_init);
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2020-11-30 8:25 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-30 3:30 [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
2020-11-30 3:30 ` [v3 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines Biwen Li
2020-11-30 3:30 ` [v3 03/11] arm64: dts: ls1046a: " Biwen Li
2020-11-30 3:30 ` [v3 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node Biwen Li
2020-11-30 3:30 ` [v3 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines Biwen Li
2020-11-30 3:30 ` [v3 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node Biwen Li
2020-11-30 3:30 ` [v3 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines Biwen Li
2020-11-30 3:30 ` [v3 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node Biwen Li
2020-11-30 3:30 ` [v3 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines Biwen Li
2020-11-30 3:30 ` [v3 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node Biwen Li
2020-11-30 3:30 ` [v3 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Biwen Li
2020-11-30 8:20 ` [v3 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Marc Zyngier
2020-11-30 8:24 ` [EXT] " Biwen Li
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