From: Damien Le Moal <damien.lemoal@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sean Anderson <seanga2@gmail.com>
Subject: [PATCH v10 14/23] riscv: Add Canaan Kendryte K210 reset controller
Date: Sun, 13 Dec 2020 22:50:47 +0900 [thread overview]
Message-ID: <20201213135056.24446-15-damien.lemoal@wdc.com> (raw)
In-Reply-To: <20201213135056.24446-1-damien.lemoal@wdc.com>
Add a reset controller driver for the Canaan Kendryte K210 SoC. This
driver relies on its syscon compatible parent node (sysctl) for its
register mapping. Default this driver compilation to y when the
SOC_CANAAN option is selected.
The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210
SOC RESET CONTROLLER DRIVER" with myself listed as maintainer for this
driver.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
---
MAINTAINERS | 8 +++
arch/riscv/Kconfig.socs | 1 +
drivers/reset/Kconfig | 10 +++
drivers/reset/Makefile | 1 +
drivers/reset/reset-k210.c | 131 +++++++++++++++++++++++++++++++++++++
5 files changed, 151 insertions(+)
create mode 100644 drivers/reset/reset-k210.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 85a6a0beebd1..6059a1e4caa6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3831,6 +3831,14 @@ W: https://github.com/Cascoda/ca8210-linux.git
F: Documentation/devicetree/bindings/net/ieee802154/ca8210.txt
F: drivers/net/ieee802154/ca8210.c
+CANAAN/KENDRYTE K210 SOC RESET CONTROLLER DRIVER
+M: Damien Le Moal <damien.lemoal@wdc.com>
+L: linux-kernel@vger.kernel.org
+L: linux-riscv@lists.infradead.org
+S: Maintained
+F: Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml
+F: drivers/reset/reset-k210.c
+
CANAAN/KENDRYTE K210 SOC SYSTEM CONTROLLER DRIVER
M: Damien Le Moal <damien.lemoal@wdc.com>
L: linux-riscv@lists.infradead.org
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 88ac0d1a5da4..fdefd7eff1ae 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -29,6 +29,7 @@ config SOC_CANAAN
select SERIAL_SIFIVE if TTY
select SERIAL_SIFIVE_CONSOLE if TTY
select SIFIVE_PLIC
+ select ARCH_HAS_RESET_CONTROLLER
help
This enables support for Canaan Kendryte K210 SoC platform hardware.
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 07d162b179fc..8bd4f1c34631 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -82,6 +82,16 @@ config RESET_INTEL_GW
Say Y to control the reset signals provided by reset controller.
Otherwise, say N.
+config RESET_K210
+ bool "Reset controller driver for Canaan Kendryte K210 SoC"
+ depends on (SOC_CANAAN || COMPILE_TEST) && OF
+ select MFD_SYSCON
+ default SOC_CANAAN
+ help
+ Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
+ Say Y if you want to control reset signals provided by this
+ controller.
+
config RESET_LANTIQ
bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
default SOC_TYPE_XWAY
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 16947610cc3b..ef2e807721fa 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
+obj-$(CONFIG_RESET_K210) += reset-k210.o
obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
obj-$(CONFIG_RESET_MESON) += reset-meson.o
diff --git a/drivers/reset/reset-k210.c b/drivers/reset/reset-k210.c
new file mode 100644
index 000000000000..1b6e03522b40
--- /dev/null
+++ b/drivers/reset/reset-k210.c
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ */
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/delay.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <soc/canaan/k210-sysctl.h>
+
+#include <dt-bindings/reset/k210-rst.h>
+
+#define K210_RST_MASK 0x27FFFFFF
+
+struct k210_rst {
+ struct regmap *map;
+ struct reset_controller_dev rcdev;
+};
+
+static inline struct k210_rst *
+to_k210_rst(struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct k210_rst, rcdev);
+}
+
+static inline int k210_rst_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct k210_rst *ksr = to_k210_rst(rcdev);
+
+ return regmap_update_bits(ksr->map, K210_SYSCTL_PERI_RESET, BIT(id), 1);
+}
+
+static inline int k210_rst_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct k210_rst *ksr = to_k210_rst(rcdev);
+
+ return regmap_update_bits(ksr->map, K210_SYSCTL_PERI_RESET, BIT(id), 0);
+}
+
+static int k210_rst_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ int ret;
+
+ ret = k210_rst_assert(rcdev, id);
+ if (ret == 0) {
+ udelay(10);
+ ret = k210_rst_deassert(rcdev, id);
+ }
+
+ return ret;
+}
+
+static int k210_rst_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct k210_rst *ksr = to_k210_rst(rcdev);
+ u32 reg, bit = BIT(id);
+ int ret;
+
+ ret = regmap_read(ksr->map, K210_SYSCTL_PERI_RESET, ®);
+ if (ret)
+ return ret;
+
+ return reg & bit;
+}
+
+static int k210_rst_xlate(struct reset_controller_dev *rcdev,
+ const struct of_phandle_args *reset_spec)
+{
+ unsigned long id = reset_spec->args[0];
+
+ if (!(BIT(id) & K210_RST_MASK))
+ return -EINVAL;
+
+ return id;
+}
+
+static const struct reset_control_ops k210_rst_ops = {
+ .assert = k210_rst_assert,
+ .deassert = k210_rst_deassert,
+ .reset = k210_rst_reset,
+ .status = k210_rst_status,
+};
+
+static int k210_rst_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *parent_np = of_get_parent(dev->of_node);
+ struct k210_rst *ksr;
+
+ dev_info(dev, "K210 reset controller\n");
+
+ ksr = devm_kzalloc(dev, sizeof(*ksr), GFP_KERNEL);
+ if (!ksr)
+ return -ENOMEM;
+
+ ksr->map = syscon_node_to_regmap(parent_np);
+ of_node_put(parent_np);
+ if (IS_ERR(ksr->map))
+ return PTR_ERR(ksr->map);
+
+ ksr->rcdev.owner = THIS_MODULE;
+ ksr->rcdev.dev = dev;
+ ksr->rcdev.of_node = dev->of_node;
+ ksr->rcdev.ops = &k210_rst_ops;
+ ksr->rcdev.nr_resets = fls(K210_RST_MASK);
+ ksr->rcdev.of_reset_n_cells = 1;
+ ksr->rcdev.of_xlate = k210_rst_xlate;
+
+ return devm_reset_controller_register(dev, &ksr->rcdev);
+}
+
+static const struct of_device_id k210_rst_dt_ids[] = {
+ { .compatible = "canaan,k210-rst" },
+ { /* sentinel */ },
+};
+
+static struct platform_driver k210_rst_driver = {
+ .probe = k210_rst_probe,
+ .driver = {
+ .name = "k210-rst",
+ .of_match_table = k210_rst_dt_ids,
+ },
+};
+builtin_platform_driver(k210_rst_driver);
--
2.29.2
next prev parent reply other threads:[~2020-12-13 13:54 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-13 13:50 [PATCH v10 00/23] RISC-V Kendryte K210 support improvements Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 01/23] riscv: Fix kernel time_init() Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 02/23] riscv: Fix sifive serial driver Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 03/23] riscv: Enable interrupts during syscalls with M-Mode Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 04/23] riscv: Fix builtin DTB handling Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 05/23] riscv: Use vendor name for K210 SoC support Damien Le Moal
2020-12-28 12:03 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 06/23] riscv: Fix Canaan Kendryte K210 device tree Damien Le Moal
2020-12-28 12:03 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 07/23] riscv: cleanup Canaan Kendryte K210 sysctl driver Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 08/23] dt-bindings: Add Canaan vendor prefix Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 09/23] dt-binding: clock: Document canaan,k210-clk bindings Damien Le Moal
2020-12-17 8:09 ` Stephen Boyd
2020-12-17 8:13 ` Damien Le Moal
2020-12-17 10:16 ` Stephen Boyd
2020-12-17 10:43 ` Damien Le Moal
2020-12-17 10:49 ` Stephen Boyd
2020-12-17 10:51 ` Damien Le Moal
2020-12-20 5:35 ` Stephen Boyd
2020-12-20 8:58 ` Damien Le Moal
2020-12-17 10:54 ` Damien Le Moal
2020-12-19 19:44 ` Stephen Boyd
2020-12-13 13:50 ` [PATCH v10 10/23] dt-bindings: reset: Document canaan,k210-rst bindings Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 11/23] dt-bindings: pinctrl: Document canaan,k210-fpioa bindings Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 12/23] dt-binding: mfd: Document canaan,k210-sysctl bindings Damien Le Moal
2020-12-15 17:00 ` Rob Herring
2020-12-13 13:50 ` [PATCH v10 13/23] riscv: Add Canaan Kendryte K210 clock driver Damien Le Moal
2020-12-13 13:50 ` Damien Le Moal [this message]
2020-12-13 13:50 ` [PATCH v10 15/23] riscv: Add Canaan Kendryte K210 FPIOA driver Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 16/23] riscv: Update Canaan Kendryte K210 device tree Damien Le Moal
2020-12-28 12:07 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 17/23] riscv: Add SiPeed MAIX BiT board " Damien Le Moal
2020-12-28 12:08 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 18/23] riscv: Add SiPeed MAIX DOCK " Damien Le Moal
2020-12-28 12:08 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 19/23] riscv: Add SiPeed MAIX GO " Damien Le Moal
2020-12-28 12:09 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 20/23] riscv: Add SiPeed MAIXDUINO " Damien Le Moal
2020-12-28 12:10 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 21/23] riscv: Add Kendryte KD233 " Damien Le Moal
2020-12-28 12:10 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 22/23] riscv: Update Canaan Kendryte K210 defconfig Damien Le Moal
2020-12-28 12:11 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 23/23] riscv: Add Canaan Kendryte K210 SD card defconfig Damien Le Moal
2020-12-28 12:12 ` Anup Patel
2020-12-15 23:02 ` [PATCH v10 00/23] RISC-V Kendryte K210 support improvements Damien Le Moal
2021-01-09 17:32 ` Palmer Dabbelt
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