From: Anup Patel <anup@brainfault.org>
To: Damien Le Moal <damien.lemoal@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>,
Sean Anderson <seanga2@gmail.com>
Subject: Re: [PATCH v10 20/23] riscv: Add SiPeed MAIXDUINO board device tree
Date: Mon, 28 Dec 2020 17:40:11 +0530 [thread overview]
Message-ID: <CAAhSdy1F4vrCL72UrYiPyYi5ecD2JGcVu9fPvvYK4wUy_1_OqA@mail.gmail.com> (raw)
In-Reply-To: <20201213135056.24446-21-damien.lemoal@wdc.com>
On Sun, Dec 13, 2020 at 7:22 PM Damien Le Moal <damien.lemoal@wdc.com> wrote:
>
> Add a device tree for the SiPeed MAIXDUINO board. This device tree
> enables LEDs and spi/mmc SD card device. Additionally, gpios and i2c
> are also enabled and mapped to the board header pins as indicated on
> the board itself.
>
> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
> ---
> arch/riscv/boot/dts/canaan/k210_maixduino.dts | 201 ++++++++++++++++++
> 1 file changed, 201 insertions(+)
> create mode 100644 arch/riscv/boot/dts/canaan/k210_maixduino.dts
>
> diff --git a/arch/riscv/boot/dts/canaan/k210_maixduino.dts b/arch/riscv/boot/dts/canaan/k210_maixduino.dts
> new file mode 100644
> index 000000000000..681f12b46894
> --- /dev/null
> +++ b/arch/riscv/boot/dts/canaan/k210_maixduino.dts
> @@ -0,0 +1,201 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
> + * Copyright (C) 2020 Western Digital Corporation or its affiliates.
> + */
> +
> +/dts-v1/;
> +
> +#include "k210.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "SiPeed MAIXDUINO";
> + compatible = "sipeed,maixduino", "canaan,kendryte-k210";
> +
> + chosen {
> + bootargs = "earlycon console=ttySIF0";
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + boot {
> + label = "BOOT";
> + linux,code = <BTN_0>;
> + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,format = "i2s";
> + status = "disabled";
> +
> + simple-audio-card,cpu {
> + sound-dai = <&i2s0 0>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&mic>;
> + };
> + };
> +
> + mic: mic {
> + #sound-dai-cells = <0>;
> + compatible = "memsensing,msm261s4030h0";
> + status = "disabled";
> + };
> +};
> +
> +&fpioa {
> + status = "okay";
> +
> + uarths_pinctrl: uarths-pinmux {
> + pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>, /* Header "0" */
> + <K210_FPIOA(5, K210_PCF_UARTHS_TX)>; /* Header "1" */
> + };
> +
> + gpio_pinctrl: gpio-pinmux {
> + pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>,
> + <K210_FPIOA(9, K210_PCF_GPIO1)>;
> + };
> +
> + gpiohs_pinctrl: gpiohs-pinmux {
> + pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>, /* BOOT */
> + <K210_FPIOA(21, K210_PCF_GPIOHS2)>, /* Header "2" */
> + <K210_FPIOA(22, K210_PCF_GPIOHS3)>, /* Header "3" */
> + <K210_FPIOA(23, K210_PCF_GPIOHS4)>, /* Header "4" */
> + <K210_FPIOA(24, K210_PCF_GPIOHS5)>, /* Header "5" */
> + <K210_FPIOA(32, K210_PCF_GPIOHS6)>, /* Header "6" */
> + <K210_FPIOA(15, K210_PCF_GPIOHS7)>, /* Header "7" */
> + <K210_FPIOA(14, K210_PCF_GPIOHS8)>, /* Header "8" */
> + <K210_FPIOA(13, K210_PCF_GPIOHS9)>, /* Header "9" */
> + <K210_FPIOA(12, K210_PCF_GPIOHS10)>, /* Header "10" */
> + <K210_FPIOA(11, K210_PCF_GPIOHS11)>, /* Header "11" */
> + <K210_FPIOA(10, K210_PCF_GPIOHS12)>, /* Header "12" */
> + <K210_FPIOA(3, K210_PCF_GPIOHS13)>; /* Header "13" */
> + };
> +
> + i2s0_pinctrl: i2s0-pinmux {
> + pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>,
> + <K210_FPIOA(19, K210_PCF_I2S0_WS)>,
> + <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>;
> + };
> +
> + spi1_pinctrl: spi1-pinmux {
> + pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
> + <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
> + <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
> + <K210_FPIOA(29, K210_PCF_GPIO2)>; /* cs */
> + };
> +
> + i2c1_pinctrl: i2c1-pinmux {
> + pinmux = <K210_FPIOA(30, K210_PCF_I2C1_SCLK)>, /* Header "scl" */
> + <K210_FPIOA(31, K210_PCF_I2C1_SDA)>; /* Header "sda" */
> + };
> +
> + i2s1_pinctrl: i2s1-pinmux {
> + pinmux = <K210_FPIOA(33, K210_PCF_I2S1_WS)>,
> + <K210_FPIOA(34, K210_PCF_I2S1_IN_D0)>,
> + <K210_FPIOA(35, K210_PCF_I2S1_SCLK)>;
> + };
> +
> + spi0_pinctrl: spi0-pinmux {
> + pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>, /* cs */
> + <K210_FPIOA(37, K210_PCF_GPIOHS21)>, /* rst */
> + <K210_FPIOA(38, K210_PCF_GPIOHS22)>, /* dc */
> + <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */
> + };
> +
> + dvp_pinctrl: dvp-pinmux {
> + pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>,
> + <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>,
> + <K210_FPIOA(42, K210_PCF_DVP_RST)>,
> + <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>,
> + <K210_FPIOA(44, K210_PCF_DVP_PWDN)>,
> + <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>,
> + <K210_FPIOA(46, K210_PCF_DVP_XCLK)>,
> + <K210_FPIOA(47, K210_PCF_DVP_PCLK)>;
> + };
> +};
> +
> +&uarths0 {
> + pinctrl-0 = <&uarths_pinctrl>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&gpio0 {
> + pinctrl-0 = <&gpiohs_pinctrl>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&gpio1 {
> + pinctrl-0 = <&gpio_pinctrl>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&i2s0 {
> + #sound-dai-cells = <1>;
> + pinctrl-0 = <&i2s0_pinctrl>;
> + pinctrl-names = "default";
> +};
> +
> +&i2c1 {
> + pinctrl-0 = <&i2c1_pinctrl>;
> + pinctrl-names = "default";
> + clock-frequency = <400000>;
> + status = "okay";
> +};
> +
> +&dvp0 {
> + pinctrl-0 = <&dvp_pinctrl>;
> + pinctrl-names = "default";
> +};
> +
> +&spi0 {
> + pinctrl-0 = <&spi0_pinctrl>;
> + pinctrl-names = "default";
> + num-cs = <1>;
> + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
> +
> + panel@0 {
> + compatible = "sitronix,st7789v";
> + reg = <0>;
> + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
> + dc-gpios = <&gpio0 22 0>;
> + spi-max-frequency = <15000000>;
> + };
> +};
> +
> +&spi1 {
> + pinctrl-0 = <&spi1_pinctrl>;
> + pinctrl-names = "default";
> + num-cs = <1>;
> + cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + slot@0 {
> + compatible = "mmc-spi-slot";
> + reg = <0>;
> + voltage-ranges = <3300 3300>;
> + spi-max-frequency = <25000000>;
> + broken-cd;
> + };
> +};
> +
> +&spi3 {
> + spi-flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <50000000>;
> + m25p,fast-read;
> + broken-flash-reset;
> + };
> +};
> --
> 2.29.2
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Looks good to me.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
next prev parent reply other threads:[~2020-12-28 12:11 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-13 13:50 [PATCH v10 00/23] RISC-V Kendryte K210 support improvements Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 01/23] riscv: Fix kernel time_init() Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 02/23] riscv: Fix sifive serial driver Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 03/23] riscv: Enable interrupts during syscalls with M-Mode Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 04/23] riscv: Fix builtin DTB handling Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 05/23] riscv: Use vendor name for K210 SoC support Damien Le Moal
2020-12-28 12:03 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 06/23] riscv: Fix Canaan Kendryte K210 device tree Damien Le Moal
2020-12-28 12:03 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 07/23] riscv: cleanup Canaan Kendryte K210 sysctl driver Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 08/23] dt-bindings: Add Canaan vendor prefix Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 09/23] dt-binding: clock: Document canaan,k210-clk bindings Damien Le Moal
2020-12-17 8:09 ` Stephen Boyd
2020-12-17 8:13 ` Damien Le Moal
2020-12-17 10:16 ` Stephen Boyd
2020-12-17 10:43 ` Damien Le Moal
2020-12-17 10:49 ` Stephen Boyd
2020-12-17 10:51 ` Damien Le Moal
2020-12-20 5:35 ` Stephen Boyd
2020-12-20 8:58 ` Damien Le Moal
2020-12-17 10:54 ` Damien Le Moal
2020-12-19 19:44 ` Stephen Boyd
2020-12-13 13:50 ` [PATCH v10 10/23] dt-bindings: reset: Document canaan,k210-rst bindings Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 11/23] dt-bindings: pinctrl: Document canaan,k210-fpioa bindings Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 12/23] dt-binding: mfd: Document canaan,k210-sysctl bindings Damien Le Moal
2020-12-15 17:00 ` Rob Herring
2020-12-13 13:50 ` [PATCH v10 13/23] riscv: Add Canaan Kendryte K210 clock driver Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 14/23] riscv: Add Canaan Kendryte K210 reset controller Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 15/23] riscv: Add Canaan Kendryte K210 FPIOA driver Damien Le Moal
2020-12-13 13:50 ` [PATCH v10 16/23] riscv: Update Canaan Kendryte K210 device tree Damien Le Moal
2020-12-28 12:07 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 17/23] riscv: Add SiPeed MAIX BiT board " Damien Le Moal
2020-12-28 12:08 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 18/23] riscv: Add SiPeed MAIX DOCK " Damien Le Moal
2020-12-28 12:08 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 19/23] riscv: Add SiPeed MAIX GO " Damien Le Moal
2020-12-28 12:09 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 20/23] riscv: Add SiPeed MAIXDUINO " Damien Le Moal
2020-12-28 12:10 ` Anup Patel [this message]
2020-12-13 13:50 ` [PATCH v10 21/23] riscv: Add Kendryte KD233 " Damien Le Moal
2020-12-28 12:10 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 22/23] riscv: Update Canaan Kendryte K210 defconfig Damien Le Moal
2020-12-28 12:11 ` Anup Patel
2020-12-13 13:50 ` [PATCH v10 23/23] riscv: Add Canaan Kendryte K210 SD card defconfig Damien Le Moal
2020-12-28 12:12 ` Anup Patel
2020-12-15 23:02 ` [PATCH v10 00/23] RISC-V Kendryte K210 support improvements Damien Le Moal
2021-01-09 17:32 ` Palmer Dabbelt
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