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* [PATCH 1/1] pinctrl: pinctrl-microchip-sgpio: Fix wrong register offset for IRQ trigger
@ 2021-02-03 12:38 Lars Povlsen
  2021-03-01 14:59 ` Linus Walleij
  0 siblings, 1 reply; 2+ messages in thread
From: Lars Povlsen @ 2021-02-03 12:38 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Lars Povlsen, Microchip Linux Driver Support, devicetree,
	linux-gpio, linux-arm-kernel, linux-kernel,
	Gustavo A . R . Silva

This patch fixes using a wrong register offset when configuring an IRQ
trigger type.

Fixes: be2dc859abd4 ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)")
Reported-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
 drivers/pinctrl/pinctrl-microchip-sgpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
index 6a43edefa490..61ba245bd0f8 100644
--- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
+++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
@@ -574,7 +574,7 @@ static void microchip_sgpio_irq_settype(struct irq_data *data,
 	/* Type value spread over 2 registers sets: low, high bit */
 	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, addr.bit,
 			 BIT(addr.port), (!!(type & 0x1)) << addr.port);
-	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER + SGPIO_MAX_BITS, addr.bit,
+	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, SGPIO_MAX_BITS + addr.bit,
 			 BIT(addr.port), (!!(type & 0x2)) << addr.port);

 	if (type == SGPIO_INT_TRG_LEVEL)
--
2.25.1

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH 1/1] pinctrl: pinctrl-microchip-sgpio: Fix wrong register offset for IRQ trigger
  2021-02-03 12:38 [PATCH 1/1] pinctrl: pinctrl-microchip-sgpio: Fix wrong register offset for IRQ trigger Lars Povlsen
@ 2021-03-01 14:59 ` Linus Walleij
  0 siblings, 0 replies; 2+ messages in thread
From: Linus Walleij @ 2021-03-01 14:59 UTC (permalink / raw)
  To: Lars Povlsen
  Cc: Microchip Linux Driver Support,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list:GPIO SUBSYSTEM, Linux ARM, linux-kernel,
	Gustavo A . R . Silva

On Wed, Feb 3, 2021 at 1:38 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:

> This patch fixes using a wrong register offset when configuring an IRQ
> trigger type.
>
> Fixes: be2dc859abd4 ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)")
> Reported-by: Gustavo A. R. Silva <gustavoars@kernel.org>
> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>

Patch applied for fixes. Sorry for the delay.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2021-02-03 12:38 [PATCH 1/1] pinctrl: pinctrl-microchip-sgpio: Fix wrong register offset for IRQ trigger Lars Povlsen
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