* [PATCH v2 0/2] ARM: dts: stm32: Add timer interrupts
@ 2021-12-15 20:37 Uwe Kleine-König
2021-12-15 20:37 ` [PATCH v2 1/2] dt-bindings: mfd: stm32-timers: Document how to specify interrupts Uwe Kleine-König
2021-12-15 20:37 ` [PATCH v2 2/2] ARM: dts: stm32: Add timer interrupts Uwe Kleine-König
0 siblings, 2 replies; 3+ messages in thread
From: Uwe Kleine-König @ 2021-12-15 20:37 UTC (permalink / raw)
To: Fabrice Gasnier
Cc: Lee Jones, Rob Herring, Maxime Coquelin, Alexandre Torgue,
devicetree, linux-stm32, linux-arm-kernel, kernel
Hello,
compared to (implicit) v1, I split the changes into two patches now and
improved the commit log a bit.
It's not entirely clear to me, who will merge these patches (assuming
they are considered ok)?!
Best regards
Uwe
Uwe Kleine-König (2):
dt-bindings: mfd: stm32-timers: Document how to specify interrupts
ARM: dts: stm32: Add timer interrupts
.../bindings/mfd/st,stm32-timers.yaml | 13 +++++++
arch/arm/boot/dts/stm32mp151.dtsi | 34 +++++++++++++++++++
2 files changed, 47 insertions(+)
base-commit: 0bafb8f3ebc84525d0ae0fcea22d12151b99312f
--
2.33.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v2 1/2] dt-bindings: mfd: stm32-timers: Document how to specify interrupts
2021-12-15 20:37 [PATCH v2 0/2] ARM: dts: stm32: Add timer interrupts Uwe Kleine-König
@ 2021-12-15 20:37 ` Uwe Kleine-König
2021-12-15 20:37 ` [PATCH v2 2/2] ARM: dts: stm32: Add timer interrupts Uwe Kleine-König
1 sibling, 0 replies; 3+ messages in thread
From: Uwe Kleine-König @ 2021-12-15 20:37 UTC (permalink / raw)
To: Fabrice Gasnier
Cc: Lee Jones, Rob Herring, Maxime Coquelin, Alexandre Torgue,
devicetree, linux-stm32, linux-arm-kernel, kernel
The timer units in the stm32mp1 CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Document how
to formalize these in a device tree.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
.../devicetree/bindings/mfd/st,stm32-timers.yaml | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
index 10b330d42901..5e4214d1613b 100644
--- a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
+++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
@@ -46,6 +46,19 @@ properties:
minItems: 1
maxItems: 7
+ interrupts:
+ maxItems: 4
+
+ interrupt-names:
+ anyOf:
+ - items:
+ - const: global
+ - items:
+ - const: brk
+ - const: up
+ - const: trg-com
+ - const: cc
+
"#address-cells":
const: 1
--
2.33.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v2 2/2] ARM: dts: stm32: Add timer interrupts
2021-12-15 20:37 [PATCH v2 0/2] ARM: dts: stm32: Add timer interrupts Uwe Kleine-König
2021-12-15 20:37 ` [PATCH v2 1/2] dt-bindings: mfd: stm32-timers: Document how to specify interrupts Uwe Kleine-König
@ 2021-12-15 20:37 ` Uwe Kleine-König
1 sibling, 0 replies; 3+ messages in thread
From: Uwe Kleine-König @ 2021-12-15 20:37 UTC (permalink / raw)
To: Fabrice Gasnier
Cc: Lee Jones, Rob Herring, Maxime Coquelin, Alexandre Torgue,
devicetree, linux-stm32, linux-arm-kernel, kernel
The timer units in the stm32mp1 CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/boot/dts/stm32mp151.dtsi | 34 +++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 1cfc2f011e70..dab3972fcffd 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -127,6 +127,8 @@ timers2: timer@40000000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40000000 0x400>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM2_K>;
clock-names = "int";
dmas = <&dmamux1 18 0x400 0x1>,
@@ -160,6 +162,8 @@ timers3: timer@40001000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001000 0x400>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM3_K>;
clock-names = "int";
dmas = <&dmamux1 23 0x400 0x1>,
@@ -194,6 +198,8 @@ timers4: timer@40002000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM4_K>;
clock-names = "int";
dmas = <&dmamux1 29 0x400 0x1>,
@@ -226,6 +232,8 @@ timers5: timer@40003000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40003000 0x400>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM5_K>;
clock-names = "int";
dmas = <&dmamux1 55 0x400 0x1>,
@@ -260,6 +268,8 @@ timers6: timer@40004000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40004000 0x400>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM6_K>;
clock-names = "int";
dmas = <&dmamux1 69 0x400 0x1>;
@@ -278,6 +288,8 @@ timers7: timer@40005000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40005000 0x400>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM7_K>;
clock-names = "int";
dmas = <&dmamux1 70 0x400 0x1>;
@@ -296,6 +308,8 @@ timers12: timer@40006000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40006000 0x400>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM12_K>;
clock-names = "int";
status = "disabled";
@@ -318,6 +332,8 @@ timers13: timer@40007000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40007000 0x400>;
+ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM13_K>;
clock-names = "int";
status = "disabled";
@@ -340,6 +356,8 @@ timers14: timer@40008000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40008000 0x400>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM14_K>;
clock-names = "int";
status = "disabled";
@@ -605,6 +623,11 @@ timers1: timer@44000000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x44000000 0x400>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "brk", "up", "trg-com", "cc";
clocks = <&rcc TIM1_K>;
clock-names = "int";
dmas = <&dmamux1 11 0x400 0x1>,
@@ -641,6 +664,11 @@ timers8: timer@44001000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x44001000 0x400>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "brk", "up", "trg-com", "cc";
clocks = <&rcc TIM8_K>;
clock-names = "int";
dmas = <&dmamux1 47 0x400 0x1>,
@@ -725,6 +753,8 @@ timers15: timer@44006000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x44006000 0x400>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM15_K>;
clock-names = "int";
dmas = <&dmamux1 105 0x400 0x1>,
@@ -752,6 +782,8 @@ timers16: timer@44007000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x44007000 0x400>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM16_K>;
clock-names = "int";
dmas = <&dmamux1 109 0x400 0x1>,
@@ -776,6 +808,8 @@ timers17: timer@44008000 {
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x44008000 0x400>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global";
clocks = <&rcc TIM17_K>;
clock-names = "int";
dmas = <&dmamux1 111 0x400 0x1>,
--
2.33.0
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