* [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller
@ 2022-06-24 10:17 Phil Edworthy
2022-06-24 10:17 ` [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller Phil Edworthy
2022-06-24 11:18 ` [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller Geert Uytterhoeven
0 siblings, 2 replies; 6+ messages in thread
From: Phil Edworthy @ 2022-06-24 10:17 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski
Cc: Phil Edworthy, Wolfram Sang, Andy Shevchenko, Jarkko Nikula,
Sam Protsenko, Sven Peter, Jie Deng, Jan Dabros, Lukas Bulwahn,
Tyrone Ting, Arnd Bergmann, Olof Johansson, Biju Das,
Geert Uytterhoeven, devicetree, linux-i2c, linux-renesas-soc
Hi,
The Renesas RZ/V2M SoC (r9a09g011) has a new i2c controller. This series
add the driver. One annoying problem is that the SoC uses a single reset
line for two i2c controllers, and unfortunately one of the controllers
is managed by some firmware, not by Linux. Therefore, the driver just
deasserts the reset.
Phil Edworthy (2):
dt-bindings: i2c: Document RZ/V2M I2C controller
i2c: Add Renesas RZ/V2M controller
.../bindings/i2c/renesas,rzv2m.yaml | 76 +++
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-rzv2m.c | 530 ++++++++++++++++++
4 files changed, 617 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
create mode 100644 drivers/i2c/busses/i2c-rzv2m.c
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller
2022-06-24 10:17 [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller Phil Edworthy
@ 2022-06-24 10:17 ` Phil Edworthy
2022-06-25 20:43 ` Krzysztof Kozlowski
2022-06-24 11:18 ` [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller Geert Uytterhoeven
1 sibling, 1 reply; 6+ messages in thread
From: Phil Edworthy @ 2022-06-24 10:17 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Phil Edworthy, Biju Das, linux-i2c, devicetree,
Geert Uytterhoeven, linux-renesas-soc
Document Renesas RZ/V2M (r9a09g011) I2C controller bindings.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/i2c/renesas,rzv2m.yaml | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
new file mode 100644
index 000000000000..9049461ad2f4
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/V2M I2C Bus Interface
+
+maintainers:
+ - Phil Edworthy <phil.edworthy@renesas.com>
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,i2c-r9a09g011 # RZ/V2M
+ - const: renesas,rzv2m-i2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Data transmission/reception interrupt
+ - description: Status interrupt
+
+ interrupt-names:
+ items:
+ - const: tia
+ - const: tis
+
+ clock-frequency:
+ description:
+ Desired I2C bus clock frequency in Hz. The absence of this property
+ indicates the default frequency 100 kHz.
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - power-domains
+ - resets
+ - '#address-cells'
+ - '#size-cells'
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/r9a09g011-cpg.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ i2c0: i2c@a4030000 {
+ compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c";
+ reg = <0xa4030000 0x80>;
+ interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "tia", "tis";
+ clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>;
+ resets = <&cpg R9A09G011_IIC_GPA_PRESETN>;
+ power-domains = <&cpg>;
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller
2022-06-24 10:17 [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller Phil Edworthy
2022-06-24 10:17 ` [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller Phil Edworthy
@ 2022-06-24 11:18 ` Geert Uytterhoeven
1 sibling, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2022-06-24 11:18 UTC (permalink / raw)
To: Phil Edworthy
Cc: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Wolfram Sang,
Andy Shevchenko, Jarkko Nikula, Sam Protsenko, Sven Peter,
Jie Deng, Jan Dabros, Lukas Bulwahn, Tyrone Ting, Arnd Bergmann,
Olof Johansson, Biju Das, Geert Uytterhoeven,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux I2C, Linux-Renesas
Hi Phil,
Thanks for your series!
On Fri, Jun 24, 2022 at 12:17 PM Phil Edworthy
<phil.edworthy@renesas.com> wrote:
> The Renesas RZ/V2M SoC (r9a09g011) has a new i2c controller. This series
> add the driver. One annoying problem is that the SoC uses a single reset
> line for two i2c controllers, and unfortunately one of the controllers
> is managed by some firmware, not by Linux. Therefore, the driver just
> deasserts the reset.
That is actually an integration issue, not an i2c controller issue.
Perhaps we need a RESET_IS_CRITICAL flag, cfr. CLK_IS_CRITICAL,
to be set by the reset provider?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller
2022-06-24 10:17 ` [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller Phil Edworthy
@ 2022-06-25 20:43 ` Krzysztof Kozlowski
2022-06-27 7:17 ` Phil Edworthy
0 siblings, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-25 20:43 UTC (permalink / raw)
To: Phil Edworthy, Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, linux-i2c, devicetree, Geert Uytterhoeven, linux-renesas-soc
On 24/06/2022 12:17, Phil Edworthy wrote:
> Document Renesas RZ/V2M (r9a09g011) I2C controller bindings.
>
> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> .../bindings/i2c/renesas,rzv2m.yaml | 76 +++++++++++++++++++
> 1 file changed, 76 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
>
> diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
> new file mode 100644
> index 000000000000..9049461ad2f4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
> @@ -0,0 +1,76 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/V2M I2C Bus Interface
> +
> +maintainers:
> + - Phil Edworthy <phil.edworthy@renesas.com>
> +
> +allOf:
> + - $ref: /schemas/i2c/i2c-controller.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - renesas,i2c-r9a09g011 # RZ/V2M
> + - const: renesas,rzv2m-i2c
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: Data transmission/reception interrupt
> + - description: Status interrupt
> +
> + interrupt-names:
> + items:
> + - const: tia
> + - const: tis
> +
> + clock-frequency:
> + description:
> + Desired I2C bus clock frequency in Hz. The absence of this property
> + indicates the default frequency 100 kHz.
Instead of last sentence, just add "default: 100000".
> +
> + clocks:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupt-names
> + - clocks
> + - power-domains
> + - resets
This was not mentioned in properties. Why?
> + - '#address-cells'
> + - '#size-cells'
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/r9a09g011-cpg.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + i2c0: i2c@a4030000 {
> + compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c";
> + reg = <0xa4030000 0x80>;
> + interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "tia", "tis";
> + clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>;
> + resets = <&cpg R9A09G011_IIC_GPA_PRESETN>;
> + power-domains = <&cpg>;
> + clock-frequency = <100000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller
2022-06-25 20:43 ` Krzysztof Kozlowski
@ 2022-06-27 7:17 ` Phil Edworthy
2022-06-27 9:17 ` Krzysztof Kozlowski
0 siblings, 1 reply; 6+ messages in thread
From: Phil Edworthy @ 2022-06-27 7:17 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, linux-i2c, devicetree, Geert Uytterhoeven, linux-renesas-soc
Hi Krzysztof,
Thanks for you review.
On 25 June 2022 21:43 Krzysztof Kozlowski wrote:
> On 24/06/2022 12:17, Phil Edworthy wrote:
> > Document Renesas RZ/V2M (r9a09g011) I2C controller bindings.
> >
> > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > .../bindings/i2c/renesas,rzv2m.yaml | 76 +++++++++++++++++++
> > 1 file changed, 76 insertions(+)
> > create mode 100644
> Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
> b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
> > new file mode 100644
> > index 000000000000..9049461ad2f4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
> > @@ -0,0 +1,76 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Renesas RZ/V2M I2C Bus Interface
> > +
> > +maintainers:
> > + - Phil Edworthy <phil.edworthy@renesas.com>
> > +
> > +allOf:
> > + - $ref: /schemas/i2c/i2c-controller.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - enum:
> > + - renesas,i2c-r9a09g011 # RZ/V2M
> > + - const: renesas,rzv2m-i2c
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + items:
> > + - description: Data transmission/reception interrupt
> > + - description: Status interrupt
> > +
> > + interrupt-names:
> > + items:
> > + - const: tia
> > + - const: tis
> > +
> > + clock-frequency:
> > + description:
> > + Desired I2C bus clock frequency in Hz. The absence of this
> property
> > + indicates the default frequency 100 kHz.
>
> Instead of last sentence, just add "default: 100000".
Right, I'll also and an enum for this as the HW can only support 100
or 400kHz.
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - interrupt-names
> > + - clocks
> > + - power-domains
> > + - resets
>
> This was not mentioned in properties. Why?
Oops, I'll add it.
> > + - '#address-cells'
> > + - '#size-cells'
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/r9a09g011-cpg.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + i2c0: i2c@a4030000 {
> > + compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c";
> > + reg = <0xa4030000 0x80>;
> > + interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "tia", "tis";
> > + clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>;
> > + resets = <&cpg R9A09G011_IIC_GPA_PRESETN>;
> > + power-domains = <&cpg>;
> > + clock-frequency = <100000>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + };
Thanks
Phil
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller
2022-06-27 7:17 ` Phil Edworthy
@ 2022-06-27 9:17 ` Krzysztof Kozlowski
0 siblings, 0 replies; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-27 9:17 UTC (permalink / raw)
To: Phil Edworthy, Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, linux-i2c, devicetree, Geert Uytterhoeven, linux-renesas-soc
On 27/06/2022 09:17, Phil Edworthy wrote:
> Hi Krzysztof,
>
> Thanks for you review.
>
> On 25 June 2022 21:43 Krzysztof Kozlowski wrote:
>> On 24/06/2022 12:17, Phil Edworthy wrote:
>>> Document Renesas RZ/V2M (r9a09g011) I2C controller bindings.
>>>
>>> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
>>> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
>>> ---
>>> .../bindings/i2c/renesas,rzv2m.yaml | 76 +++++++++++++++++++
>>> 1 file changed, 76 insertions(+)
>>> create mode 100644
>> Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
>> b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
>>> new file mode 100644
>>> index 000000000000..9049461ad2f4
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
>>> @@ -0,0 +1,76 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Renesas RZ/V2M I2C Bus Interface
>>> +
>>> +maintainers:
>>> + - Phil Edworthy <phil.edworthy@renesas.com>
>>> +
>>> +allOf:
>>> + - $ref: /schemas/i2c/i2c-controller.yaml#
>>> +
>>> +properties:
>>> + compatible:
>>> + items:
>>> + - enum:
>>> + - renesas,i2c-r9a09g011 # RZ/V2M
>>> + - const: renesas,rzv2m-i2c
>>> +
>>> + reg:
>>> + maxItems: 1
>>> +
>>> + interrupts:
>>> + items:
>>> + - description: Data transmission/reception interrupt
>>> + - description: Status interrupt
>>> +
>>> + interrupt-names:
>>> + items:
>>> + - const: tia
>>> + - const: tis
>>> +
>>> + clock-frequency:
>>> + description:
>>> + Desired I2C bus clock frequency in Hz. The absence of this
>> property
>>> + indicates the default frequency 100 kHz.
>>
>> Instead of last sentence, just add "default: 100000".
> Right, I'll also and an enum for this as the HW can only support 100
> or 400kHz.
Sure, sounds good. Thank you.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-06-27 9:17 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-24 10:17 [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller Phil Edworthy
2022-06-24 10:17 ` [PATCH 1/2] dt-bindings: i2c: Document RZ/V2M I2C controller Phil Edworthy
2022-06-25 20:43 ` Krzysztof Kozlowski
2022-06-27 7:17 ` Phil Edworthy
2022-06-27 9:17 ` Krzysztof Kozlowski
2022-06-24 11:18 ` [PATCH 0/2] i2c: Add new driver for Renesas RZ/V2M controller Geert Uytterhoeven
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).