* [PATCH v2 0/2] arm64: dts: mt8173: Fix nor flash node
@ 2022-06-30 9:01 Xiangsheng Hou
2022-06-30 9:01 ` [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node Xiangsheng Hou
2022-06-30 9:01 ` [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example Xiangsheng Hou
0 siblings, 2 replies; 6+ messages in thread
From: Xiangsheng Hou @ 2022-06-30 9:01 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek, Xiangsheng Hou
Add axi clock since the driver change to DMA mode which need to enable
axi clock. And change spi clock to 26MHz as default.
Add assigned clock property and axi clock binding file.
Changes from v1:
- Modify nor binding file
Xiangsheng Hou (2):
arm64: dts: mt8173: Fix nor_flash node
dt-bindings: mediatek: Add assigned clock property and axi clock in
example
.../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 10 ++++++++--
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++++--
2 files changed, 13 insertions(+), 4 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node 2022-06-30 9:01 [PATCH v2 0/2] arm64: dts: mt8173: Fix nor flash node Xiangsheng Hou @ 2022-06-30 9:01 ` Xiangsheng Hou 2022-07-07 14:43 ` Matthias Brugger 2022-06-30 9:01 ` [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example Xiangsheng Hou 1 sibling, 1 reply; 6+ messages in thread From: Xiangsheng Hou @ 2022-06-30 9:01 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang, benliang.zhao, linux-mediatek, Xiangsheng Hou Add axi clock since the driver change to DMA mode which need to enable axi clock. And change spi clock to 26MHz as default. Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 40d7b47fc52e..e603170100af 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -790,9 +790,12 @@ thermal: thermal@1100b000 { nor_flash: spi@1100d000 { compatible = "mediatek,mt8173-nor"; reg = <0 0x1100d000 0 0xe0>; + assigned-clocks = <&topckgen CLK_TOP_SPI_SEL>; + assigned-clock-parents = <&clk26m>; clocks = <&pericfg CLK_PERI_SPI>, - <&topckgen CLK_TOP_SPINFI_IFR_SEL>; - clock-names = "spi", "sf"; + <&topckgen CLK_TOP_SPINFI_IFR_SEL>, + <&pericfg CLK_PERI_NFI>; + clock-names = "spi", "sf", "axi"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node 2022-06-30 9:01 ` [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node Xiangsheng Hou @ 2022-07-07 14:43 ` Matthias Brugger [not found] ` <e4a50d4e165887ac4741c0b8d68470dc2f060655.camel@mediatek.com> 0 siblings, 1 reply; 6+ messages in thread From: Matthias Brugger @ 2022-07-07 14:43 UTC (permalink / raw) To: Xiangsheng Hou, robh+dt, krzysztof.kozlowski+dt Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang, benliang.zhao, linux-mediatek On 30/06/2022 11:01, Xiangsheng Hou wrote: > Add axi clock since the driver change to DMA mode which need > to enable axi clock. And change spi clock to 26MHz as default. > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> Applied, thanks! > --- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > index 40d7b47fc52e..e603170100af 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > @@ -790,9 +790,12 @@ thermal: thermal@1100b000 { > nor_flash: spi@1100d000 { > compatible = "mediatek,mt8173-nor"; > reg = <0 0x1100d000 0 0xe0>; > + assigned-clocks = <&topckgen CLK_TOP_SPI_SEL>; > + assigned-clock-parents = <&clk26m>; > clocks = <&pericfg CLK_PERI_SPI>, > - <&topckgen CLK_TOP_SPINFI_IFR_SEL>; > - clock-names = "spi", "sf"; > + <&topckgen CLK_TOP_SPINFI_IFR_SEL>, > + <&pericfg CLK_PERI_NFI>; > + clock-names = "spi", "sf", "axi"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <e4a50d4e165887ac4741c0b8d68470dc2f060655.camel@mediatek.com>]
* Re: [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node [not found] ` <e4a50d4e165887ac4741c0b8d68470dc2f060655.camel@mediatek.com> @ 2022-07-08 8:22 ` Matthias Brugger 0 siblings, 0 replies; 6+ messages in thread From: Matthias Brugger @ 2022-07-08 8:22 UTC (permalink / raw) To: xiangsheng.hou, robh+dt, krzysztof.kozlowski+dt Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang, benliang.zhao, linux-mediatek On 08/07/2022 03:40, xiangsheng.hou wrote: > Hi Matthias, > > On Thu, 2022-07-07 at 16:43 +0200, Matthias Brugger wrote: >> >> On 30/06/2022 11:01, Xiangsheng Hou wrote: >>> Add axi clock since the driver change to DMA mode which need >>> to enable axi clock. And change spi clock to 26MHz as default. >>> >>> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> >> >> Applied, thanks! >> > I will send a new patch v3 since there need a change in [PATCH v2 2/2] > by review. > Thanks from letting me know. From what I can see, 1/2 in v3 did not change, so as I already applied it, you could have dropped it from the series. Please correct me if I'm wrong. Best regards, Matthias ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example 2022-06-30 9:01 [PATCH v2 0/2] arm64: dts: mt8173: Fix nor flash node Xiangsheng Hou 2022-06-30 9:01 ` [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node Xiangsheng Hou @ 2022-06-30 9:01 ` Xiangsheng Hou 2022-06-30 18:41 ` Krzysztof Kozlowski 1 sibling, 1 reply; 6+ messages in thread From: Xiangsheng Hou @ 2022-06-30 9:01 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang, benliang.zhao, linux-mediatek, Xiangsheng Hou For mt8173, it is needed to add the axi clock for dma mode. And it is may needed to adjust default spi frequency. Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> --- .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml index 41e60fe4b09f..7523d992a614 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml @@ -61,6 +61,12 @@ properties: - const: axi - const: axi_s + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + required: - compatible - reg @@ -82,8 +88,8 @@ examples: compatible = "mediatek,mt8173-nor"; reg = <0 0x1100d000 0 0xe0>; interrupts = <1>; - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>; - clock-names = "spi", "sf"; + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>; + clock-names = "spi", "sf", "axi"; #address-cells = <1>; #size-cells = <0>; -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example 2022-06-30 9:01 ` [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example Xiangsheng Hou @ 2022-06-30 18:41 ` Krzysztof Kozlowski 0 siblings, 0 replies; 6+ messages in thread From: Krzysztof Kozlowski @ 2022-06-30 18:41 UTC (permalink / raw) To: Xiangsheng Hou, robh+dt, krzysztof.kozlowski+dt, matthias.bgg Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang, benliang.zhao, linux-mediatek On 30/06/2022 11:01, Xiangsheng Hou wrote: > For mt8173, it is needed to add the axi clock for dma mode. > And it is may needed to adjust default spi frequency. > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> > --- > .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml > index 41e60fe4b09f..7523d992a614 100644 > --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml > +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml > @@ -61,6 +61,12 @@ properties: > - const: axi > - const: axi_s > > + assigned-clocks: > + maxItems: 1 > + > + assigned-clock-parents: > + maxItems: 1 > + There is usually no reason to put this in the bindings. > required: > - compatible > - reg > @@ -82,8 +88,8 @@ examples: > compatible = "mediatek,mt8173-nor"; > reg = <0 0x1100d000 0 0xe0>; > interrupts = <1>; > - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>; > - clock-names = "spi", "sf"; > + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>; > + clock-names = "spi", "sf", "axi"; > #address-cells = <1>; > #size-cells = <0>; > Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-07-08 8:22 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2022-06-30 9:01 [PATCH v2 0/2] arm64: dts: mt8173: Fix nor flash node Xiangsheng Hou
2022-06-30 9:01 ` [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node Xiangsheng Hou
2022-07-07 14:43 ` Matthias Brugger
[not found] ` <e4a50d4e165887ac4741c0b8d68470dc2f060655.camel@mediatek.com>
2022-07-08 8:22 ` Matthias Brugger
2022-06-30 9:01 ` [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example Xiangsheng Hou
2022-06-30 18:41 ` Krzysztof Kozlowski
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