* [PATCH v8 1/5] dt-bindings: arm: stm32: add compatible for syscon gcan node
2023-03-26 16:03 [PATCH v8 0/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi
@ 2023-03-26 16:03 ` Dario Binacchi
2023-03-26 16:03 ` [PATCH v8 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Dario Binacchi @ 2023-03-26 16:03 UTC (permalink / raw)
To: linux-kernel
Cc: Amarula patchwork, Rob Herring, Krzysztof Kozlowski,
Marc Kleine-Budde, michael, Vincent Mailhol, Alexandre Torgue,
Dario Binacchi, Alexandre Belloni, Christophe Roullier,
Hans Verkuil, Krzysztof Kozlowski, Matti Vaittinen,
Maxime Coquelin, Rob Herring, Stephen Boyd, devicetree,
linux-arm-kernel, linux-stm32
Since commit ad440432d1f9 ("dt-bindings: mfd: Ensure 'syscon' has a
more specific compatible")
It is required to provide at least 2 compatibles string for syscon node.
This patch documents the new compatible for stm32f4 SoC to support
global/shared CAN registers access for bxCAN controllers.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Rob Herring <robh@kernel.org>
---
(no changes since v5)
Changes in v5:
- Add Rob Herring's Acked-by tag.
.../devicetree/bindings/arm/stm32/st,stm32-syscon.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
index b2b156cc160a..ad8e51aa01b0 100644
--- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
@@ -20,6 +20,7 @@ properties:
- st,stm32-syscfg
- st,stm32-power-config
- st,stm32-tamp
+ - st,stm32f4-gcan
- const: syscon
- items:
- const: st,stm32-tamp
@@ -42,6 +43,7 @@ if:
contains:
enum:
- st,stm32mp157-syscfg
+ - st,stm32f4-gcan
then:
required:
- clocks
--
2.32.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v8 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings
2023-03-26 16:03 [PATCH v8 0/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi
2023-03-26 16:03 ` [PATCH v8 1/5] dt-bindings: arm: stm32: add compatible for syscon gcan node Dario Binacchi
@ 2023-03-26 16:03 ` Dario Binacchi
2023-03-26 16:03 ` [PATCH v8 3/5] ARM: dts: stm32: add CAN support on stm32f429 Dario Binacchi
2023-03-26 16:03 ` [PATCH v8 4/5] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Dario Binacchi
3 siblings, 0 replies; 5+ messages in thread
From: Dario Binacchi @ 2023-03-26 16:03 UTC (permalink / raw)
To: linux-kernel
Cc: Amarula patchwork, Rob Herring, Krzysztof Kozlowski,
Marc Kleine-Budde, michael, Vincent Mailhol, Alexandre Torgue,
Dario Binacchi, David S. Miller, Eric Dumazet, Jakub Kicinski,
Krzysztof Kozlowski, Maxime Coquelin, Paolo Abeni, Rob Herring,
Wolfgang Grandegger, devicetree, linux-arm-kernel, linux-can,
linux-stm32, netdev
Add documentation of device tree bindings for the STM32 basic extended
CAN (bxcan) controller.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
(no changes since v5)
Changes in v5:
- Add Rob Herring's Reviewed-by tag.
Changes in v4:
- Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes
(compatible "st,stm32f4-bxcan") are no longer children of a parent
node with compatible "st,stm32f4-bxcan-core".
- Add the "st,gcan" property (global can memory) to can nodes which
references a "syscon" node containing the shared clock and memory
addresses.
Changes in v3:
- Remove 'Dario Binacchi <dariobin@libero.it>' SOB.
- Add description to the parent of the two child nodes.
- Move "patterProperties:" after "properties: in top level before "required".
- Add "clocks" to the "required:" list of the child nodes.
Changes in v2:
- Change the file name into 'st,stm32-bxcan-core.yaml'.
- Rename compatibles:
- st,stm32-bxcan-core -> st,stm32f4-bxcan-core
- st,stm32-bxcan -> st,stm32f4-bxcan
- Rename master property to st,can-master.
- Remove the status property from the example.
- Put the node child properties as required.
.../bindings/net/can/st,stm32-bxcan.yaml | 83 +++++++++++++++++++
1 file changed, 83 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
new file mode 100644
index 000000000000..c9194345d202
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics bxCAN controller
+
+description: STMicroelectronics BxCAN controller for CAN bus
+
+maintainers:
+ - Dario Binacchi <dario.binacchi@amarulasolutions.com>
+
+allOf:
+ - $ref: can-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - st,stm32f4-bxcan
+
+ st,can-master:
+ description:
+ Master and slave mode of the bxCAN peripheral is only relevant
+ if the chip has two CAN peripherals. In that case they share
+ some of the required logic.
+ type: boolean
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: transmit interrupt
+ - description: FIFO 0 receive interrupt
+ - description: FIFO 1 receive interrupt
+ - description: status change error interrupt
+
+ interrupt-names:
+ items:
+ - const: tx
+ - const: rx0
+ - const: rx1
+ - const: sce
+
+ resets:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ st,gcan:
+ $ref: "/schemas/types.yaml#/definitions/phandle-array"
+ description:
+ The phandle to the gcan node which allows to access the 512-bytes
+ SRAM memory shared by the two bxCAN cells (CAN1 master and CAN2
+ slave) in dual CAN peripheral configuration.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - resets
+ - clocks
+ - st,gcan
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/stm32fx-clock.h>
+ #include <dt-bindings/mfd/stm32f4-rcc.h>
+
+ can1: can@40006400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x40006400 0x200>;
+ interrupts = <19>, <20>, <21>, <22>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ st,can-master;
+ st,gcan = <&gcan>;
+ };
--
2.32.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v8 3/5] ARM: dts: stm32: add CAN support on stm32f429
2023-03-26 16:03 [PATCH v8 0/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi
2023-03-26 16:03 ` [PATCH v8 1/5] dt-bindings: arm: stm32: add compatible for syscon gcan node Dario Binacchi
2023-03-26 16:03 ` [PATCH v8 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi
@ 2023-03-26 16:03 ` Dario Binacchi
2023-03-26 16:03 ` [PATCH v8 4/5] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Dario Binacchi
3 siblings, 0 replies; 5+ messages in thread
From: Dario Binacchi @ 2023-03-26 16:03 UTC (permalink / raw)
To: linux-kernel
Cc: Amarula patchwork, Rob Herring, Krzysztof Kozlowski,
Marc Kleine-Budde, michael, Vincent Mailhol, Alexandre Torgue,
Dario Binacchi, Krzysztof Kozlowski, Maxime Coquelin,
Rob Herring, devicetree, linux-arm-kernel, linux-stm32
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the master and CAN2 the slave,
that share some of the required logic like clock and filters. This means
that the slave CAN can't be used without the master CAN.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v6)
Changes in v6:
- move can1 node before gcan to keep ordering by address.
Changes in v4:
- Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core")
with the gcan@40006600 node ("sysnode" compatible). The gcan node
contains clocks and memory addresses shared by the two can nodes
of which it's no longer the parent.
- Add to can nodes the "st,gcan" property (global can memory) which
references the gcan@40006600 node ("sysnode compatibble).
Changes in v3:
- Remove 'Dario Binacchi <dariobin@libero.it>' SOB.
- Add "clocks" to can@0 node.
arch/arm/boot/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index c31ceb821231..809b2842ded9 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -362,6 +362,35 @@ i2c3: i2c@40005c00 {
status = "disabled";
};
+ can1: can@40006400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x40006400 0x200>;
+ interrupts = <19>, <20>, <21>, <22>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ st,can-master;
+ st,gcan = <&gcan>;
+ status = "disabled";
+ };
+
+ gcan: gcan@40006600 {
+ compatible = "st,stm32f4-gcan", "syscon";
+ reg = <0x40006600 0x200>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ };
+
+ can2: can@40006800 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x40006800 0x200>;
+ interrupts = <63>, <64>, <65>, <66>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
+ st,gcan = <&gcan>;
+ status = "disabled";
+ };
+
dac: dac@40007400 {
compatible = "st,stm32f4-dac-core";
reg = <0x40007400 0x400>;
--
2.32.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v8 4/5] ARM: dts: stm32: add pin map for CAN controller on stm32f4
2023-03-26 16:03 [PATCH v8 0/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi
` (2 preceding siblings ...)
2023-03-26 16:03 ` [PATCH v8 3/5] ARM: dts: stm32: add CAN support on stm32f429 Dario Binacchi
@ 2023-03-26 16:03 ` Dario Binacchi
3 siblings, 0 replies; 5+ messages in thread
From: Dario Binacchi @ 2023-03-26 16:03 UTC (permalink / raw)
To: linux-kernel
Cc: Amarula patchwork, Rob Herring, Krzysztof Kozlowski,
Marc Kleine-Budde, michael, Vincent Mailhol, Alexandre Torgue,
Dario Binacchi, Krzysztof Kozlowski, Maxime Coquelin,
Rob Herring, devicetree, linux-arm-kernel, linux-stm32
Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v3)
Changes in v3:
- Remove 'Dario Binacchi <dariobin@libero.it>' SOB.
- Remove a blank line.
Changes in v2:
- Remove a blank line.
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 4523c63475e4..3bb812d6399e 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -447,6 +447,36 @@ pins2 {
slew-rate = <2>;
};
};
+
+ can1_pins_a: can1-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */
+ bias-pull-up;
+ };
+ };
+
+ can2_pins_a: can2-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
+ bias-pull-up;
+ };
+ };
+
+ can2_pins_b: can2-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */
+ bias-pull-up;
+ };
+ };
};
};
};
--
2.32.0
^ permalink raw reply related [flat|nested] 5+ messages in thread