From: Vidya Sagar <vidyas@nvidia.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Rob Herring <robh@kernel.org>
Cc: bhelgaas@google.com, lorenzo.pieralisi@arm.com,
thierry.reding@gmail.com, jonathanh@nvidia.com, kishon@ti.com,
vkoul@kernel.org, kw@linux.com, p.zabel@pengutronix.de,
mperttunen@nvidia.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com,
Thierry Reding <treding@nvidia.com>
Subject: Re: [PATCH V3 02/11] dt-bindings: pci: tegra: Convert to json-schema
Date: Wed, 6 Jul 2022 16:16:25 +0530 [thread overview]
Message-ID: <398a9370-6c2d-319c-2e23-038588fbf004@nvidia.com> (raw)
In-Reply-To: <2829e71b-1769-ce24-f810-d63e619aa5f0@linaro.org>
On 7/6/2022 3:36 PM, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
>
>
> On 06/07/2022 11:53, Vidya Sagar wrote:
>>>> + nvidia,bpmp:
>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>>>> + description: |
>>>> + Must contain a pair of phandle to BPMP controller node followed by controller ID. Following
>>>> + are the controller IDs for each controller:
>>>> +
>>>> + 0: C0
>>>> + 1: C1
>>>> + 2: C2
>>>> + 3: C3
>>>> + 4: C4
>>>> + 5: C5
>>>> + items:
>>>> + - items:
>>>> + - minimum: 0
>>>> + maximum: 0xffffffff
>>>
>>> That's already the limit. Just a description is fine.
>>>
>>>> + - enum: [ 0, 1, 2, 3, 4, 5 ]
>>>
>>> maximum: 5
>>
>> Setting the maximum to '5' is resulting in the following error.
>>
>> pcie-ep@141a0000: nvidia,bpmp:0:0: 4294967295 is greater than the
>> maximum of 5
>>
>> Could you please help me understand why I'm seeing this error?
>
> Trim your replies.
>
> Why adding minimum:5 to the phandle? Rob said add a description. Nothing
> about minimum.
I'm sorry I didn't understand the review comment clearly.
There is one description added above already. Are you (and Rob) saying
that one more description is needed?
Thanks,
Vidya Sagar
>
> Best regards,
> Krzysztof
>
next prev parent reply other threads:[~2022-07-06 10:46 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-29 6:04 [PATCH V3 00/11] PCI: tegra: Add Tegra234 PCIe support Vidya Sagar
2022-06-29 6:04 ` [PATCH V3 01/11] dt-bindings: PHY: P2U: Add support for Tegra234 P2U block Vidya Sagar
2022-07-05 6:14 ` Vinod Koul
2022-06-29 6:04 ` [PATCH V3 02/11] dt-bindings: pci: tegra: Convert to json-schema Vidya Sagar
2022-06-29 6:29 ` Krzysztof Kozlowski
2022-07-06 9:51 ` Vidya Sagar
2022-07-06 9:58 ` Krzysztof Kozlowski
2022-06-30 21:04 ` Rob Herring
2022-07-06 9:53 ` Vidya Sagar
2022-07-06 10:06 ` Krzysztof Kozlowski
2022-07-06 10:46 ` Vidya Sagar [this message]
2022-07-06 15:06 ` Krzysztof Kozlowski
2022-07-06 18:11 ` Rob Herring
2022-06-29 6:04 ` [PATCH V3 03/11] dt-bindings: PCI: tegra234: Add schema for tegra234 rootport mode Vidya Sagar
2022-06-29 6:32 ` Krzysztof Kozlowski
2022-06-29 6:04 ` [PATCH V3 04/11] dt-bindings: PCI: tegra234: Add schema for tegra234 endpoint mode Vidya Sagar
2022-06-29 6:33 ` Krzysztof Kozlowski
2022-06-29 6:04 ` [PATCH V3 05/11] arm64: tegra: Add regulators required for PCIe Vidya Sagar
2022-06-29 6:34 ` Krzysztof Kozlowski
2022-06-29 6:04 ` [PATCH V3 06/11] arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT Vidya Sagar
2022-06-29 6:35 ` Krzysztof Kozlowski
2022-06-29 6:04 ` [PATCH V3 07/11] arm64: tegra: Enable PCIe slots in P3737-0000 board Vidya Sagar
2022-06-29 6:04 ` [PATCH V3 08/11] phy: tegra: Add PCIe PIPE2UPHY support for Tegra234 Vidya Sagar
2022-07-05 6:15 ` Vinod Koul
2022-06-29 6:04 ` [PATCH V3 09/11] PCI: Disable MSI for Tegra234 root ports Vidya Sagar
2022-06-29 6:04 ` [PATCH V3 10/11] Revert "PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie" Vidya Sagar
2022-06-29 6:04 ` [PATCH V3 11/11] PCI: tegra: Add Tegra234 PCIe support Vidya Sagar
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