* [PATCH] ARM: dts: ls1021a: add nodes for on-chip ram
@ 2017-12-21 15:38 Rasmus Villemoes
[not found] ` <1513870698-31264-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Rasmus Villemoes @ 2017-12-21 15:38 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland, Russell King
Cc: Rasmus Villemoes, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Signed-off-by: Rasmus Villemoes <rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
---
arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index bd6622f10046..6f53e6aefb63 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -748,5 +748,21 @@
<0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ ocram1: sram@10000000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x10000000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x10000000 0x10000>;
+ };
+
+ ocram2: sram@10010000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x10010000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x10010000 0x10000>;
+ };
};
};
--
2.7.4
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* Re: [PATCH] ARM: dts: ls1021a: add nodes for on-chip ram
[not found] ` <1513870698-31264-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
@ 2017-12-26 8:56 ` Shawn Guo
2018-01-03 15:45 ` [PATCH v2] " Rasmus Villemoes
1 sibling, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2017-12-26 8:56 UTC (permalink / raw)
To: Rasmus Villemoes
Cc: Rob Herring, Mark Rutland, Russell King,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Thu, Dec 21, 2017 at 04:38:18PM +0100, Rasmus Villemoes wrote:
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
Empty commit log is not welcomed.
> ---
> arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index bd6622f10046..6f53e6aefb63 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -748,5 +748,21 @@
> <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
> <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + ocram1: sram@10000000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x10000000 0x0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x10000000 0x10000>;
> + };
> +
> + ocram2: sram@10010000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x10010000 0x0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x10010000 0x10000>;
> + };
Why split one continuous sram into two nodes?
Shawn
> };
> };
> --
> 2.7.4
>
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* [PATCH v2] ARM: dts: ls1021a: add nodes for on-chip ram
[not found] ` <1513870698-31264-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-26 8:56 ` Shawn Guo
@ 2018-01-03 15:45 ` Rasmus Villemoes
[not found] ` <1514994345-2471-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
1 sibling, 1 reply; 5+ messages in thread
From: Rasmus Villemoes @ 2018-01-03 15:45 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland, Russell King
Cc: Rasmus Villemoes, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Although the two nodes constitute one contiguous 128K region, still
describe them separately:
- That's how they are described in the reference manual: "Each OCRAM
occupies a 64 KB of address region...", and the names ocram1 and
ocram2 are also as used in the manual.
- The two areas are treated differently by the boot ROM code: OCRAM2 is
zero-initialized, while, again quoting the RM, "software must perform
the zero initialization of OCRAM1."
Signed-off-by: Rasmus Villemoes <rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
---
v2: add changelog explaining the split in two nodes.
arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 96aa7752dd0d..7bb5896b3726 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -748,5 +748,21 @@
<0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ ocram1: sram@10000000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x10000000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x10000000 0x10000>;
+ };
+
+ ocram2: sram@10010000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x10010000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x10010000 0x10000>;
+ };
};
};
--
2.7.4
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* Re: [PATCH v2] ARM: dts: ls1021a: add nodes for on-chip ram
[not found] ` <1514994345-2471-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
@ 2018-01-19 10:53 ` Rasmus Villemoes
2018-01-23 7:11 ` Shawn Guo
1 sibling, 0 replies; 5+ messages in thread
From: Rasmus Villemoes @ 2018-01-19 10:53 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland, Russell King
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On 2018-01-03 16:45, Rasmus Villemoes wrote:
> Although the two nodes constitute one contiguous 128K region, still
> describe them separately:
>
> - That's how they are described in the reference manual: "Each OCRAM
> occupies a 64 KB of address region...", and the names ocram1 and
> ocram2 are also as used in the manual.
>
> - The two areas are treated differently by the boot ROM code: OCRAM2 is
> zero-initialized, while, again quoting the RM, "software must perform
> the zero initialization of OCRAM1."
ping
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* Re: [PATCH v2] ARM: dts: ls1021a: add nodes for on-chip ram
[not found] ` <1514994345-2471-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2018-01-19 10:53 ` Rasmus Villemoes
@ 2018-01-23 7:11 ` Shawn Guo
1 sibling, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2018-01-23 7:11 UTC (permalink / raw)
To: Rasmus Villemoes
Cc: Rob Herring, Mark Rutland, Russell King,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Wed, Jan 03, 2018 at 04:45:45PM +0100, Rasmus Villemoes wrote:
> Although the two nodes constitute one contiguous 128K region, still
> describe them separately:
>
> - That's how they are described in the reference manual: "Each OCRAM
> occupies a 64 KB of address region...", and the names ocram1 and
> ocram2 are also as used in the manual.
>
> - The two areas are treated differently by the boot ROM code: OCRAM2 is
> zero-initialized, while, again quoting the RM, "software must perform
> the zero initialization of OCRAM1."
>
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
Applied, thanks.
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2017-12-21 15:38 [PATCH] ARM: dts: ls1021a: add nodes for on-chip ram Rasmus Villemoes
[not found] ` <1513870698-31264-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-26 8:56 ` Shawn Guo
2018-01-03 15:45 ` [PATCH v2] " Rasmus Villemoes
[not found] ` <1514994345-2471-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2018-01-19 10:53 ` Rasmus Villemoes
2018-01-23 7:11 ` Shawn Guo
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