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* [PATCH v2 0/4] drivers: pwm: sun4i: Improve support for A64 SoCs
@ 2018-03-18 23:28 Andre Przywara
       [not found] ` <20180318232847.14278-1-andre.przywara-5wv7dgnIgG8@public.gmane.org>
  0 siblings, 1 reply; 10+ messages in thread
From: Andre Przywara @ 2018-03-18 23:28 UTC (permalink / raw)
  To: Thierry Reding, Maxime Ripard, Chen-Yu Tsai
  Cc: Mark Rutland, Rob Herring, linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

A rework addressing the comments. I dropped the H6 and the reset support
for now, to simplify merging this series.

This series adds PWM support for new Allwinner SoCs. Actually the A64 PWM 
is fully compatible with the A13 and H3 PWM IP, so the driver does not
need any additional code. But I use this opportunity to provide some
cleanup.
Patch 1 removes a no longer used parameter from our per-SoC data structure,
to simplify patch 2, which groups SoCs with a compatible PWM controller.
Patch 3 adds the new compatible strings to the binding documentation
(and just there, we expect to use "allwinner,sun5i-a13-pwm" as a fallback
compatible string).
The final patch 4 adds the respective PWM nodes to the A64 .dtsi.
This eventually does not enable the PWM on any new board at the moment, as
the PWM pins are either not usable (muxed with Ethernet) or exposed on
a header pin not dedicated to PWM. But the Pinebook (and Teres I) should be
able to use the PWM for the LCD backlights, plus users can enable the
R_PWM on their Pine64 boards, if they like.

Tested by manually enabling r_pwm on a Pine64-LTS.

Cheers,
Andre.

Andre Przywara (4):
  pwm: sun4i: drop unused .has_rdy member
  pwm: sun4i: simplify controller mapping
  dt-bindings: pwm: sunxi: add new compatible strings
  dts: sunxi: A64: Add PWM controllers

 .../devicetree/bindings/pwm/pwm-sun4i.txt          |  2 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 28 +++++++++++++++++++
 drivers/pwm/pwm-sun4i.c                            | 32 ++++++----------------
 3 files changed, 38 insertions(+), 24 deletions(-)

-- 
2.14.1

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v2 1/4] pwm: sun4i: drop unused .has_rdy member
       [not found] ` <20180318232847.14278-1-andre.przywara-5wv7dgnIgG8@public.gmane.org>
@ 2018-03-18 23:28   ` Andre Przywara
  2018-03-18 23:28   ` [PATCH v2 2/4] pwm: sun4i: simplify controller mapping Andre Przywara
                     ` (3 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Andre Przywara @ 2018-03-18 23:28 UTC (permalink / raw)
  To: Thierry Reding, Maxime Ripard, Chen-Yu Tsai
  Cc: Mark Rutland, Rob Herring, linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

Commit a054c4d68408 ("pwm: sun4i: Drop legacy callbacks") dropped the
only user of the .has_rdy member in our sun4i_pwm_data struct.
Consequently we don't need to store this anymore for the various SoCs,
which paves the way for further simplifications.

Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
---
 drivers/pwm/pwm-sun4i.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index 334199c58f1d..b3e4a4b3774d 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -73,7 +73,6 @@ static const u32 prescaler_table[] = {
 
 struct sun4i_pwm_data {
 	bool has_prescaler_bypass;
-	bool has_rdy;
 	unsigned int npwm;
 };
 
@@ -313,31 +312,26 @@ static const struct pwm_ops sun4i_pwm_ops = {
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a10 = {
 	.has_prescaler_bypass = false,
-	.has_rdy = false,
 	.npwm = 2,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a10s = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 2,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a13 = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 1,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a20 = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 2,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_h3 = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 1,
 };
 
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 2/4] pwm: sun4i: simplify controller mapping
       [not found] ` <20180318232847.14278-1-andre.przywara-5wv7dgnIgG8@public.gmane.org>
  2018-03-18 23:28   ` [PATCH v2 1/4] pwm: sun4i: drop unused .has_rdy member Andre Przywara
@ 2018-03-18 23:28   ` Andre Przywara
  2018-03-18 23:28   ` [PATCH v2 3/4] dt-bindings: pwm: sunxi: add new compatible strings Andre Przywara
                     ` (2 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Andre Przywara @ 2018-03-18 23:28 UTC (permalink / raw)
  To: Thierry Reding, Maxime Ripard, Chen-Yu Tsai
  Cc: Mark Rutland, Rob Herring, linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

At the moment we assign our supported compatible strings to a respective
instance of our sun4i_pwm_data structure, even though some of them
are the same.
To avoid further clutter, split out the three different combinations of
features we have at the moment and name them accordingly.
This should make it more obvious which compatible string to use for new
SoCs.

Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
---
 drivers/pwm/pwm-sun4i.c | 26 ++++++++------------------
 1 file changed, 8 insertions(+), 18 deletions(-)

diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index b3e4a4b3774d..078172dee462 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -310,27 +310,17 @@ static const struct pwm_ops sun4i_pwm_ops = {
 	.owner = THIS_MODULE,
 };
 
-static const struct sun4i_pwm_data sun4i_pwm_data_a10 = {
+static const struct sun4i_pwm_data sun4i_pwm_dual_nobypass = {
 	.has_prescaler_bypass = false,
 	.npwm = 2,
 };
 
-static const struct sun4i_pwm_data sun4i_pwm_data_a10s = {
+static const struct sun4i_pwm_data sun4i_pwm_dual_bypass = {
 	.has_prescaler_bypass = true,
 	.npwm = 2,
 };
 
-static const struct sun4i_pwm_data sun4i_pwm_data_a13 = {
-	.has_prescaler_bypass = true,
-	.npwm = 1,
-};
-
-static const struct sun4i_pwm_data sun4i_pwm_data_a20 = {
-	.has_prescaler_bypass = true,
-	.npwm = 2,
-};
-
-static const struct sun4i_pwm_data sun4i_pwm_data_h3 = {
+static const struct sun4i_pwm_data sun4i_pwm_single_bypass = {
 	.has_prescaler_bypass = true,
 	.npwm = 1,
 };
@@ -338,19 +328,19 @@ static const struct sun4i_pwm_data sun4i_pwm_data_h3 = {
 static const struct of_device_id sun4i_pwm_dt_ids[] = {
 	{
 		.compatible = "allwinner,sun4i-a10-pwm",
-		.data = &sun4i_pwm_data_a10,
+		.data = &sun4i_pwm_dual_nobypass,
 	}, {
 		.compatible = "allwinner,sun5i-a10s-pwm",
-		.data = &sun4i_pwm_data_a10s,
+		.data = &sun4i_pwm_dual_bypass,
 	}, {
 		.compatible = "allwinner,sun5i-a13-pwm",
-		.data = &sun4i_pwm_data_a13,
+		.data = &sun4i_pwm_single_bypass,
 	}, {
 		.compatible = "allwinner,sun7i-a20-pwm",
-		.data = &sun4i_pwm_data_a20,
+		.data = &sun4i_pwm_dual_bypass,
 	}, {
 		.compatible = "allwinner,sun8i-h3-pwm",
-		.data = &sun4i_pwm_data_h3,
+		.data = &sun4i_pwm_single_bypass,
 	}, {
 		/* sentinel */
 	},
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 3/4] dt-bindings: pwm: sunxi: add new compatible strings
       [not found] ` <20180318232847.14278-1-andre.przywara-5wv7dgnIgG8@public.gmane.org>
  2018-03-18 23:28   ` [PATCH v2 1/4] pwm: sun4i: drop unused .has_rdy member Andre Przywara
  2018-03-18 23:28   ` [PATCH v2 2/4] pwm: sun4i: simplify controller mapping Andre Przywara
@ 2018-03-18 23:28   ` Andre Przywara
  2018-03-19 13:43     ` Maxime Ripard
       [not found]     ` <20180318232847.14278-4-andre.przywara-5wv7dgnIgG8@public.gmane.org>
  2018-03-18 23:28   ` [PATCH v2 4/4] dts: sunxi: A64: Add PWM controllers Andre Przywara
  2018-03-27 23:14   ` [PATCH v2 0/4] drivers: pwm: sun4i: Improve support for A64 SoCs Thierry Reding
  4 siblings, 2 replies; 10+ messages in thread
From: Andre Przywara @ 2018-03-18 23:28 UTC (permalink / raw)
  To: Thierry Reding, Maxime Ripard, Chen-Yu Tsai
  Cc: Mark Rutland, Rob Herring, linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

The PWM controllers found in the Allwinner A64 and H5 SoCs are fully
compatible to the PWM controllers found in the A13 and H3.
Add new compatible strings for those SoCs to the binding document, so
that they can be safely used, together with a fallback string
(preferably "allwinner,sun5i-a13-pwm").

Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
---
 Documentation/devicetree/bindings/pwm/pwm-sun4i.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt
index 51ff54c8b8ef..2a1affbff45e 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt
@@ -7,6 +7,8 @@ Required properties:
     - "allwinner,sun5i-a13-pwm"
     - "allwinner,sun7i-a20-pwm"
     - "allwinner,sun8i-h3-pwm"
+    - "allwinner,sun50i-a64-pwm", "allwinner,sun5i-a13-pwm"
+    - "allwinner,sun50i-h5-pwm", "allwinner,sun5i-a13-pwm"
   - reg: physical base address and length of the controller's registers
   - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
     the cells format.
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 4/4] dts: sunxi: A64: Add PWM controllers
       [not found] ` <20180318232847.14278-1-andre.przywara-5wv7dgnIgG8@public.gmane.org>
                     ` (2 preceding siblings ...)
  2018-03-18 23:28   ` [PATCH v2 3/4] dt-bindings: pwm: sunxi: add new compatible strings Andre Przywara
@ 2018-03-18 23:28   ` Andre Przywara
       [not found]     ` <20180318232847.14278-5-andre.przywara-5wv7dgnIgG8@public.gmane.org>
  2018-03-19 18:15     ` [v2,4/4] " Harald Geyer
  2018-03-27 23:14   ` [PATCH v2 0/4] drivers: pwm: sun4i: Improve support for A64 SoCs Thierry Reding
  4 siblings, 2 replies; 10+ messages in thread
From: Andre Przywara @ 2018-03-18 23:28 UTC (permalink / raw)
  To: Thierry Reding, Maxime Ripard, Chen-Yu Tsai
  Cc: Mark Rutland, Rob Herring, linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

The Allwinner A64 SoC features two PWM controllers, which are fully
compatible to the one used in the A13 and H3 chips.
Add the respective device nodes (one for the "normal" PWM, the other for
the one in the CPUS domain) and the pin their output is connected to.
On the A64 the "normal" PWM is muxed together with one of the MDIO pins
used to communicate with the Ethernet PHY, so it won't be usable on many
boards. But the Pinebook laptop uses this pin for controlling the LCD
backlight.
The CPUS PWM pin however is routed to the "RPi2" header, at the same
location as the PWM pin on the RaspberryPi.

Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index d783d164b9c3..fda1783b1c86 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -321,6 +321,11 @@
 				bias-pull-up;
 			};
 
+			pwm_pin: pwm_pin {
+				pins = "PD22";
+				function = "pwm";
+			};
+
 			rmii_pins: rmii_pins {
 				pins = "PD10", "PD11", "PD13", "PD14", "PD17",
 				       "PD18", "PD19", "PD20", "PD22", "PD23";
@@ -537,6 +542,15 @@
 			#interrupt-cells = <3>;
 		};
 
+		pwm: pwm@1c21400 {
+			compatible = "allwinner,sun50i-a64-pwm",
+				     "allwinner,sun5i-a13-pwm";
+			reg = <0x01c21400 0x400>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		rtc: rtc@1f00000 {
 			compatible = "allwinner,sun6i-a31-rtc";
 			reg = <0x01f00000 0x54>;
@@ -563,6 +577,15 @@
 			#reset-cells = <1>;
 		};
 
+		r_pwm: pwm@1f03800 {
+			compatible = "allwinner,sun50i-a64-pwm",
+				     "allwinner,sun5i-a13-pwm";
+			reg = <0x01f03800 0x400>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		r_pio: pinctrl@1f02c00 {
 			compatible = "allwinner,sun50i-a64-r-pinctrl";
 			reg = <0x01f02c00 0x400>;
@@ -578,6 +601,11 @@
 				pins = "PL0", "PL1";
 				function = "s_rsb";
 			};
+
+			r_pwm_pin: pwm {
+				pins = "PL10";
+				function = "s_pwm";
+			};
 		};
 
 		r_rsb: rsb@1f03400 {
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 4/4] dts: sunxi: A64: Add PWM controllers
       [not found]     ` <20180318232847.14278-5-andre.przywara-5wv7dgnIgG8@public.gmane.org>
@ 2018-03-19  0:04       ` Stefan Brüns
  0 siblings, 0 replies; 10+ messages in thread
From: Stefan Brüns @ 2018-03-19  0:04 UTC (permalink / raw)
  To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, andre.przywara-5wv7dgnIgG8
  Cc: Thierry Reding, Maxime Ripard, Chen-Yu Tsai, Mark Rutland,
	Rob Herring, linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

[-- Attachment #1: Type: text/plain, Size: 1813 bytes --]

On Montag, 19. März 2018 00:28:47 CET Andre Przywara wrote:
> The Allwinner A64 SoC features two PWM controllers, which are fully
> compatible to the one used in the A13 and H3 chips.
> Add the respective device nodes (one for the "normal" PWM, the other for
> the one in the CPUS domain) and the pin their output is connected to.

"Add the nodes for the devices (...) and the pins their outputs are connected 
to."

> On the A64 the "normal" PWM is muxed together with one of the MDIO pins
> used to communicate with the Ethernet PHY, so it won't be usable on many
> boards. But the Pinebook laptop uses this pin for controlling the LCD
> backlight.
> The CPUS PWM pin however is routed to the "RPi2" header, at the same
> location as the PWM pin on the RaspberryPi.

The last sentence is misssing a reference to the Pine64.
 
> Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28
> +++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index
> d783d164b9c3..fda1783b1c86 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -321,6 +321,11 @@
<...>

Kind regards,

Stefan

-- 
Stefan Brüns  /  Bergstraße 21  /  52062 Aachen
home: +49 241 53809034     mobile: +49 151 50412019

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 3/4] dt-bindings: pwm: sunxi: add new compatible strings
  2018-03-18 23:28   ` [PATCH v2 3/4] dt-bindings: pwm: sunxi: add new compatible strings Andre Przywara
@ 2018-03-19 13:43     ` Maxime Ripard
       [not found]     ` <20180318232847.14278-4-andre.przywara-5wv7dgnIgG8@public.gmane.org>
  1 sibling, 0 replies; 10+ messages in thread
From: Maxime Ripard @ 2018-03-19 13:43 UTC (permalink / raw)
  To: Andre Przywara
  Cc: Mark Rutland, Rob Herring, linux-pwm, devicetree, linux-sunxi,
	Chen-Yu Tsai, Thierry Reding, linux-arm-kernel

On Sun, Mar 18, 2018 at 11:28:46PM +0000, Andre Przywara wrote:
> The PWM controllers found in the Allwinner A64 and H5 SoCs are fully
> compatible to the PWM controllers found in the A13 and H3.
> Add new compatible strings for those SoCs to the binding document, so
> that they can be safely used, together with a fallback string
> (preferably "allwinner,sun5i-a13-pwm").
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [v2,4/4] dts: sunxi: A64: Add PWM controllers
  2018-03-18 23:28   ` [PATCH v2 4/4] dts: sunxi: A64: Add PWM controllers Andre Przywara
       [not found]     ` <20180318232847.14278-5-andre.przywara-5wv7dgnIgG8@public.gmane.org>
@ 2018-03-19 18:15     ` Harald Geyer
  1 sibling, 0 replies; 10+ messages in thread
From: Harald Geyer @ 2018-03-19 18:15 UTC (permalink / raw)
  To: Andre Przywara
  Cc: Mark Rutland, devicetree, Rob Herring, Maxime Ripard,
	linux-sunxi, linux-pwm, Chen-Yu Tsai, Thierry Reding,
	linux-arm-kernel

Andre Przywara writes:
> The Allwinner A64 SoC features two PWM controllers, which are fully
> compatible to the one used in the A13 and H3 chips.
> Add the respective device nodes (one for the "normal" PWM, the other for
> the one in the CPUS domain) and the pin their output is connected to.
> On the A64 the "normal" PWM is muxed together with one of the MDIO pins
> used to communicate with the Ethernet PHY, so it won't be usable on many
> boards. But the Pinebook laptop uses this pin for controlling the LCD
> backlight.

for the entire series:
Tested-by: Harald Geyer <harald@ccbib.org> on Teres-I (only the "normal" PWM)

Thanks for your work,
Harald

> The CPUS PWM pin however is routed to the "RPi2" header, at the same
> location as the PWM pin on the RaspberryPi.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index d783d164b9c3..fda1783b1c86 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -321,6 +321,11 @@
>  				bias-pull-up;
>  			};
>  
> +			pwm_pin: pwm_pin {
> +				pins = "PD22";
> +				function = "pwm";
> +			};
> +
>  			rmii_pins: rmii_pins {
>  				pins = "PD10", "PD11", "PD13", "PD14", "PD17",
>  				       "PD18", "PD19", "PD20", "PD22", "PD23";
> @@ -537,6 +542,15 @@
>  			#interrupt-cells = <3>;
>  		};
>  
> +		pwm: pwm@1c21400 {
> +			compatible = "allwinner,sun50i-a64-pwm",
> +				     "allwinner,sun5i-a13-pwm";
> +			reg = <0x01c21400 0x400>;
> +			clocks = <&osc24M>;
> +			#pwm-cells = <3>;
> +			status = "disabled";
> +		};
> +
>  		rtc: rtc@1f00000 {
>  			compatible = "allwinner,sun6i-a31-rtc";
>  			reg = <0x01f00000 0x54>;
> @@ -563,6 +577,15 @@
>  			#reset-cells = <1>;
>  		};
>  
> +		r_pwm: pwm@1f03800 {
> +			compatible = "allwinner,sun50i-a64-pwm",
> +				     "allwinner,sun5i-a13-pwm";
> +			reg = <0x01f03800 0x400>;
> +			clocks = <&osc24M>;
> +			#pwm-cells = <3>;
> +			status = "disabled";
> +		};
> +
>  		r_pio: pinctrl@1f02c00 {
>  			compatible = "allwinner,sun50i-a64-r-pinctrl";
>  			reg = <0x01f02c00 0x400>;
> @@ -578,6 +601,11 @@
>  				pins = "PL0", "PL1";
>  				function = "s_rsb";
>  			};
> +
> +			r_pwm_pin: pwm {
> +				pins = "PL10";
> +				function = "s_pwm";
> +			};
>  		};
>  
>  		r_rsb: rsb@1f03400 {

-- 
If you want to support my work:
see http://friends.ccbib.org/harald/supporting/
or donate via CLAM to xASPBtezLNqj4cUe8MT5nZjthRSEjrRQXN
or via peercoin to P98LRdhit3gZbHDBe7ta5jtXrMJUms4p7w

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 3/4] dt-bindings: pwm: sunxi: add new compatible strings
       [not found]     ` <20180318232847.14278-4-andre.przywara-5wv7dgnIgG8@public.gmane.org>
@ 2018-03-26 22:23       ` Rob Herring
  0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2018-03-26 22:23 UTC (permalink / raw)
  To: Andre Przywara
  Cc: Thierry Reding, Maxime Ripard, Chen-Yu Tsai, Mark Rutland,
	Rob Herring, linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

On Sun, Mar 18, 2018 at 11:28:46PM +0000, Andre Przywara wrote:
> The PWM controllers found in the Allwinner A64 and H5 SoCs are fully
> compatible to the PWM controllers found in the A13 and H3.
> Add new compatible strings for those SoCs to the binding document, so
> that they can be safely used, together with a fallback string
> (preferably "allwinner,sun5i-a13-pwm").
> 
> Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/pwm/pwm-sun4i.txt | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 0/4] drivers: pwm: sun4i: Improve support for A64 SoCs
       [not found] ` <20180318232847.14278-1-andre.przywara-5wv7dgnIgG8@public.gmane.org>
                     ` (3 preceding siblings ...)
  2018-03-18 23:28   ` [PATCH v2 4/4] dts: sunxi: A64: Add PWM controllers Andre Przywara
@ 2018-03-27 23:14   ` Thierry Reding
  4 siblings, 0 replies; 10+ messages in thread
From: Thierry Reding @ 2018-03-27 23:14 UTC (permalink / raw)
  To: Andre Przywara
  Cc: Maxime Ripard, Chen-Yu Tsai, Mark Rutland, Rob Herring,
	linux-pwm-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA

[-- Attachment #1: Type: text/plain, Size: 1760 bytes --]

On Sun, Mar 18, 2018 at 11:28:43PM +0000, Andre Przywara wrote:
> A rework addressing the comments. I dropped the H6 and the reset support
> for now, to simplify merging this series.
> 
> This series adds PWM support for new Allwinner SoCs. Actually the A64 PWM 
> is fully compatible with the A13 and H3 PWM IP, so the driver does not
> need any additional code. But I use this opportunity to provide some
> cleanup.
> Patch 1 removes a no longer used parameter from our per-SoC data structure,
> to simplify patch 2, which groups SoCs with a compatible PWM controller.
> Patch 3 adds the new compatible strings to the binding documentation
> (and just there, we expect to use "allwinner,sun5i-a13-pwm" as a fallback
> compatible string).
> The final patch 4 adds the respective PWM nodes to the A64 .dtsi.
> This eventually does not enable the PWM on any new board at the moment, as
> the PWM pins are either not usable (muxed with Ethernet) or exposed on
> a header pin not dedicated to PWM. But the Pinebook (and Teres I) should be
> able to use the PWM for the LCD backlights, plus users can enable the
> R_PWM on their Pine64 boards, if they like.
> 
> Tested by manually enabling r_pwm on a Pine64-LTS.
> 
> Cheers,
> Andre.
> 
> Andre Przywara (4):
>   pwm: sun4i: drop unused .has_rdy member
>   pwm: sun4i: simplify controller mapping
>   dt-bindings: pwm: sunxi: add new compatible strings
>   dts: sunxi: A64: Add PWM controllers
> 
>  .../devicetree/bindings/pwm/pwm-sun4i.txt          |  2 ++
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 28 +++++++++++++++++++
>  drivers/pwm/pwm-sun4i.c                            | 32 ++++++----------------
>  3 files changed, 38 insertions(+), 24 deletions(-)

Applied patches 1-3, thanks.

Thierry

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2018-03-27 23:14 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-03-18 23:28 [PATCH v2 0/4] drivers: pwm: sun4i: Improve support for A64 SoCs Andre Przywara
     [not found] ` <20180318232847.14278-1-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2018-03-18 23:28   ` [PATCH v2 1/4] pwm: sun4i: drop unused .has_rdy member Andre Przywara
2018-03-18 23:28   ` [PATCH v2 2/4] pwm: sun4i: simplify controller mapping Andre Przywara
2018-03-18 23:28   ` [PATCH v2 3/4] dt-bindings: pwm: sunxi: add new compatible strings Andre Przywara
2018-03-19 13:43     ` Maxime Ripard
     [not found]     ` <20180318232847.14278-4-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2018-03-26 22:23       ` Rob Herring
2018-03-18 23:28   ` [PATCH v2 4/4] dts: sunxi: A64: Add PWM controllers Andre Przywara
     [not found]     ` <20180318232847.14278-5-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2018-03-19  0:04       ` Stefan Brüns
2018-03-19 18:15     ` [v2,4/4] " Harald Geyer
2018-03-27 23:14   ` [PATCH v2 0/4] drivers: pwm: sun4i: Improve support for A64 SoCs Thierry Reding

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