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From: Lars Povlsen <lars.povlsen@microchip.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
	devicetree <devicetree@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"linux-arm Mailing List" <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>
Subject: Re: [PATCH v8 2/3] pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
Date: Tue, 10 Nov 2020 16:51:13 +0100	[thread overview]
Message-ID: <87361hfbwu.fsf@microchip.com> (raw)
In-Reply-To: <CAHp75Vdfm7A5=Mi-LZ1sHJS5fSngypZQ50-rGQ7A6kD2kmVFTA@mail.gmail.com>


Andy Shevchenko writes:

> On Mon, Nov 9, 2020 at 3:27 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:
>>
>> This adds a pinctrl driver for the Microsemi/Microchip Serial GPIO
>> (SGPIO) device used in various SoC's.
>
> Please, elaborate what you said previously, because now it has no
> justification to be a pin control driver.
>

As previously stated, the individual pins have possible other functions
than GPIO. When these functions are added, the driver will need pinctrl
functinality. This was accepted by Linux Walleij.

> ...
>
>> +#define __shf(x)               (__builtin_ffs(x) - 1)
>> +#define __BF_PREP(bf, x)       (bf & ((x) << __shf(bf)))
>> +#define __BF_GET(bf, x)                (((x & bf) >> __shf(bf)))
>
> I answered the old thread that it probably makes sense to make
> something like field_get() / field_prep() available for everybody.

I assume its not in there for a reason.

Anyway, I have changed the code to use <linux/bitfield.h> directly, so
this is now gone.

> ...
>
>> +       unsigned int bit = 3 * addr->bit;
>
>> +       unsigned int bit = 3 * addr->bit;
>
> Magic number. Perhaps a defined constant?
>

I can add a constant.

> ...
>
>> +               return -EOPNOTSUPP;
>
> Are you sure? IIRC internally we are using ENOTSUPP.
>
> Couple of drivers seem to be wrongly using the other one.
>

Checkpatch complains about ENOTSUPP:

# ENOTSUPP is not a standard error code and should be avoided in new patches.
# Folks usually mean EOPNOTSUPP (also called ENOTSUP), when they type ENOTSUPP.

> ...
>
>> +                       err = -EOPNOTSUPP;
>
> Ditto.
>

Ditto.

> ...
>
>> +       if (input != bank->is_input) {
>
>> +               dev_err(pctldev->dev, "Pin %d direction as %s is not possible\n",
>> +                       pin, input ? "input" : "output");
>
> Do we need this noise? Isn't user space getting a proper error code as
> per doc and can handle this?
>

This need not go to user space, as one use-case is using the pin as a
i2c mux. In this case no signs of the error condition is recorded, it
just doesn't work. So I concur it is not noise, it is sign of an
erroneous situation which should be fixed, IMHO.

The message makes it easy to locate the issue, if any. The message will
not occur on a properly configured system.

Lets have the maintainer make the call.

>> +               return -EINVAL;
>> +       }
>
> ...
>
>> +       if ((priv->ports & BIT(addr.port)) == 0) {
>
> '!' is equivalent to ' == 0', but it's up to you.
>

Thank you, I prefer the current form.

>> +               dev_warn(priv->dev, "Request port %d for pin %d is not activated\n",
>> +                        addr.port, offset);
>> +       }
>
> ...
>
>> +       return bank->is_input ?
>> +               sgpio_input_get(priv, &addr) : sgpio_output_get(priv, &addr);
>
> I would leave it on one line.
>

I can make that one line.

> ...
>
>> +       pin = gpiospec->args[1] + (gpiospec->args[0] * priv->bitcount);
>
> Redundant parentheses.
>

Yes, they are.

> ...
>
>> +static int microchip_sgpio_get_ports(struct sgpio_priv *priv)
>> +{
>> +       struct device *dev = priv->dev;
>> +       struct device_node *np = dev->of_node;
>> +       u32 range_params[64];
>> +       int i, ret;
>> +
>> +       /* Calculate port mask */
>> +       ret = of_property_read_variable_u32_array(np,
>> +                                                 "microchip,sgpio-port-ranges",
>> +                                                 range_params,
>> +                                                 2,
>> +                                                 ARRAY_SIZE(range_params));
>> +       if (ret < 0 || ret % 2) {
>> +               dev_err(dev, "%s port range\n",
>> +                       ret == -EINVAL ? "Missing" : "Invalid");
>> +               return ret;
>> +       }
>> +       for (i = 0; i < ret; i += 2) {
>> +               int start, end;
>> +
>> +               start = range_params[i];
>> +               end = range_params[i + 1];
>> +               if (start > end || end >= SGPIO_BITS_PER_WORD) {
>> +                       dev_err(dev, "Ill-formed port-range [%d:%d]\n",
>> +                               start, end);
>> +               }
>> +               priv->ports |= GENMASK(end, start);
>> +       }
>> +
>> +       return 0;
>> +}
>
> As per previous version comment, i.e. perhaps find an existing API for
> this kind of parser or introduce a generic one.
>

I fixed the use of OF api's - that was surely an oversight.

I have searched for a suitable API without finding one. The closest
thing was the parsing of "gpio-reserved-ranges" in gpiolib-of.c, but
that was coded directly. So I think this might not be of general use.

If it is, lets do that after the driver is merged.

> ...
>
>> +       bool is_input = (bankno == 0);
>
> Now I'm not sure why you need this variable here and in the structure.
> Can't you use the above check directly?
> If you want to have flexible settings (i.e. not all generations of hw
> have it like this) I would rather recommend to do it via DT.
>

I have eliminated the local variable - its only in the bank structure.

The pins are (by earlier reviews) separated in distinct input and output
banks. (All variants have both).

> ...
>
>> +       for (i = 0; i < ngpios; i++) {
>> +               char name[sizeof("SGPIO_D_pXXbY\0")];
>> +               struct sgpio_port_addr addr;
>> +
>> +               sgpio_pin_to_addr(priv, i, &addr);
>> +               snprintf(name, sizeof(name), "SGPIO_%c_p%db%d",
>> +                        is_input ? 'I' : 'O',
>> +                        addr.port, addr.bit);
>> +
>> +               pins[i].number = i;
>> +               pins[i].name = devm_kstrdup(dev, name, GFP_KERNEL);
>
> Above with this is a NIH of devm_kasprintf().

Good catch, I'll apply that.

>
>> +               if (!pins[i].name)
>> +                       return -ENOMEM;
>> +       }
>
> ...
>
>> +       /* Get clock */
>
> Useless comment.

Sorry, forgot to remove that. Gone!

>
> ...
>
>> +       div_clock = clk_get_rate(clk);
>> +       if (of_property_read_u32(dev->of_node, "bus-frequency", &priv->clock))
>
> Again, choose one API, no need to spread among several.
>
> As I have told you already: if any comment is given against one
> location in the code, check the entire contribution for similar places
> and address accordingly.
>
>> +               priv->clock = 12500000;
>> +       if (priv->clock <= 0 || priv->clock > (div_clock / 2)) {
>
> How can an unsigned value be possible less than 0?

I'll change that to "==", thanks.

>
>> +               dev_err(dev, "Invalid frequency %d\n", priv->clock);
>> +               return -EINVAL;
>
>> +       }
>
> ...
>
>> +       /* Get register map */
>
> Useless.
>

OK, removed

> ...
>
>> +       /* Get rest of device properties */
>
> This one though may be left.

Thank you for your continued interest in improving the driver. I hope
you'll find the next version palatable.

Cheers,

---Lars

--
Lars Povlsen,
Microchip

  parent reply	other threads:[~2020-11-10 15:51 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-09 13:26 [PATCH v8 0/3] Adding support for Microchip/Microsemi serial GPIO controller Lars Povlsen
2020-11-09 13:26 ` [PATCH v8 1/3] dt-bindings: pinctrl: Add bindings for pinctrl-microchip-sgpio driver Lars Povlsen
2020-11-09 13:26 ` [PATCH v8 2/3] pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO Lars Povlsen
2020-11-09 14:17   ` Andy Shevchenko
2020-11-09 14:32     ` Alexandre Belloni
2020-11-09 15:16       ` Andy Shevchenko
2020-11-09 15:27         ` Alexandre Belloni
2020-11-09 16:15           ` Andy Shevchenko
2020-11-09 16:22             ` Alexandre Belloni
2020-11-10 15:59             ` Lars Povlsen
2020-11-10 15:51     ` Lars Povlsen [this message]
2020-11-10 16:26       ` Andy Shevchenko
2020-11-11  8:51         ` Lars Povlsen
2020-11-11 11:26           ` Andy Shevchenko
2020-11-11 11:53             ` Lars Povlsen
2020-11-09 13:26 ` [PATCH v8 3/3] arm64: dts: sparx5: Add SGPIO devices Lars Povlsen

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