* [PATCH v2 0/2] Add PMIC wrapper support for Mediatek MT8186 SoC IC @ 2022-01-07 10:46 Johnson Wang 2022-01-07 10:46 ` [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC Johnson Wang 2022-01-07 10:46 ` [PATCH v2 2/2] dt-bindings: mediatek: add compatible for MT8186 pwrap Johnson Wang 0 siblings, 2 replies; 10+ messages in thread From: Johnson Wang @ 2022-01-07 10:46 UTC (permalink / raw) To: robh+dt, matthias.bgg Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group, Johnson Wang This series add PMIC wrapper support for Mediatek MT8186 SoC IC Changes since v1: - Fix the conditional logic in pwrap_probe() function. Johnson Wang (2): soc: mediatek: pwrap: add pwrap driver for MT8186 SoC dt-bindings: mediatek: add compatible for MT8186 pwrap .../bindings/soc/mediatek/pwrap.txt | 1 + drivers/soc/mediatek/mtk-pmic-wrap.c | 72 +++++++++++++++++++ 2 files changed, 73 insertions(+) -- 2.18.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC 2022-01-07 10:46 [PATCH v2 0/2] Add PMIC wrapper support for Mediatek MT8186 SoC IC Johnson Wang @ 2022-01-07 10:46 ` Johnson Wang 2022-01-07 11:11 ` AngeloGioacchino Del Regno ` (2 more replies) 2022-01-07 10:46 ` [PATCH v2 2/2] dt-bindings: mediatek: add compatible for MT8186 pwrap Johnson Wang 1 sibling, 3 replies; 10+ messages in thread From: Johnson Wang @ 2022-01-07 10:46 UTC (permalink / raw) To: robh+dt, matthias.bgg Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group, Johnson Wang MT8186 are highly integrated SoC and use PMIC_MT6366 for power management. This patch adds pwrap master driver to access PMIC_MT6366. Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> --- drivers/soc/mediatek/mtk-pmic-wrap.c | 72 ++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 952bc554f443..78866ebf7f04 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -30,6 +30,7 @@ #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001) #define PWRAP_STATE_SYNC_IDLE0 BIT(20) #define PWRAP_STATE_INIT_DONE0 BIT(21) +#define PWRAP_STATE_INIT_DONE0_V2 BIT(22) #define PWRAP_STATE_INIT_DONE1 BIT(15) /* macro for WACS FSM */ @@ -77,6 +78,8 @@ #define PWRAP_CAP_INT1_EN BIT(3) #define PWRAP_CAP_WDT_SRC1 BIT(4) #define PWRAP_CAP_ARB BIT(5) +#define PWRAP_CAP_MONITOR_V2 BIT(6) +#define PWRAP_CAP_ARB_V2 BIT(8) /* defines for slave device wrapper registers */ enum dew_regs { @@ -1063,6 +1066,55 @@ static int mt8516_regs[] = { [PWRAP_MSB_FIRST] = 0x170, }; +static int mt8186_regs[] = { + [PWRAP_MUX_SEL] = 0x0, + [PWRAP_WRAP_EN] = 0x4, + [PWRAP_DIO_EN] = 0x8, + [PWRAP_RDDMY] = 0x20, + [PWRAP_CSHEXT_WRITE] = 0x24, + [PWRAP_CSHEXT_READ] = 0x28, + [PWRAP_CSLEXT_WRITE] = 0x2C, + [PWRAP_CSLEXT_READ] = 0x30, + [PWRAP_EXT_CK_WRITE] = 0x34, + [PWRAP_STAUPD_CTRL] = 0x3C, + [PWRAP_STAUPD_GRPEN] = 0x40, + [PWRAP_EINT_STA0_ADR] = 0x44, + [PWRAP_EINT_STA1_ADR] = 0x48, + [PWRAP_INT_CLR] = 0xC8, + [PWRAP_INT_FLG] = 0xC4, + [PWRAP_MAN_EN] = 0x7C, + [PWRAP_MAN_CMD] = 0x80, + [PWRAP_WACS0_EN] = 0x8C, + [PWRAP_WACS1_EN] = 0x94, + [PWRAP_WACS2_EN] = 0x9C, + [PWRAP_INIT_DONE0] = 0x90, + [PWRAP_INIT_DONE1] = 0x98, + [PWRAP_INIT_DONE2] = 0xA0, + [PWRAP_INT_EN] = 0xBC, + [PWRAP_INT1_EN] = 0xCC, + [PWRAP_INT1_FLG] = 0xD4, + [PWRAP_INT1_CLR] = 0xD8, + [PWRAP_TIMER_EN] = 0xF0, + [PWRAP_WDT_UNIT] = 0xF8, + [PWRAP_WDT_SRC_EN] = 0xFC, + [PWRAP_WDT_SRC_EN_1] = 0x100, + [PWRAP_WDT_FLG] = 0x104, + [PWRAP_SPMINF_STA] = 0x1B4, + [PWRAP_DCM_EN] = 0x1EC, + [PWRAP_DCM_DBC_PRD] = 0x1F0, + [PWRAP_GPSINF_0_STA] = 0x204, + [PWRAP_GPSINF_1_STA] = 0x208, + [PWRAP_WACS0_CMD] = 0xC00, + [PWRAP_WACS0_RDATA] = 0xC04, + [PWRAP_WACS0_VLDCLR] = 0xC08, + [PWRAP_WACS1_CMD] = 0xC10, + [PWRAP_WACS1_RDATA] = 0xC14, + [PWRAP_WACS1_VLDCLR] = 0xC18, + [PWRAP_WACS2_CMD] = 0xC20, + [PWRAP_WACS2_RDATA] = 0xC24, + [PWRAP_WACS2_VLDCLR] = 0xC28, +}; + enum pmic_type { PMIC_MT6323, PMIC_MT6351, @@ -1083,6 +1135,7 @@ enum pwrap_type { PWRAP_MT8135, PWRAP_MT8173, PWRAP_MT8183, + PWRAP_MT8186, PWRAP_MT8195, PWRAP_MT8516, }; @@ -1535,6 +1588,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp) case PWRAP_MT6779: case PWRAP_MT6797: case PWRAP_MT8173: + case PWRAP_MT8186: case PWRAP_MT8516: pwrap_writel(wrp, 1, PWRAP_CIPHER_EN); break; @@ -2069,6 +2123,19 @@ static struct pmic_wrapper_type pwrap_mt8516 = { .init_soc_specific = NULL, }; +static struct pmic_wrapper_type pwrap_mt8186 = { + .regs = mt8186_regs, + .type = PWRAP_MT8186, + .arb_en_all = 0xfb27f, + .int_en_all = 0xfffffffe, /* disable WatchDog Timeout for bit 1 */ + .int1_en_all = 0x000017ff, /* disable Matching interrupt for bit 13 */ + .spi_w = PWRAP_MAN_CMD_SPI_WRITE, + .wdt_src = PWRAP_WDT_SRC_MASK_ALL, + .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_MONITOR_V2 | PWRAP_CAP_ARB_V2, + .init_reg_clock = pwrap_common_init_reg_clock, + .init_soc_specific = NULL, +}; + static const struct of_device_id of_pwrap_match_tbl[] = { { .compatible = "mediatek,mt2701-pwrap", @@ -2097,6 +2164,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = { }, { .compatible = "mediatek,mt8183-pwrap", .data = &pwrap_mt8183, + }, { + .compatible = "mediatek,mt8186-pwrap", + .data = &pwrap_mt8186, }, { .compatible = "mediatek,mt8195-pwrap", .data = &pwrap_mt8195, @@ -2209,6 +2279,8 @@ static int pwrap_probe(struct platform_device *pdev) if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) mask_done = PWRAP_STATE_INIT_DONE1; + else if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB_V2)) + mask_done = PWRAP_STATE_INIT_DONE0_V2; else mask_done = PWRAP_STATE_INIT_DONE0; -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC 2022-01-07 10:46 ` [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC Johnson Wang @ 2022-01-07 11:11 ` AngeloGioacchino Del Regno 2022-01-14 15:46 ` Matthias Brugger 2022-01-14 16:08 ` Matthias Brugger 2 siblings, 0 replies; 10+ messages in thread From: AngeloGioacchino Del Regno @ 2022-01-07 11:11 UTC (permalink / raw) To: Johnson Wang, robh+dt, matthias.bgg Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, Project_Global_Chrome_Upstream_Group Il 07/01/22 11:46, Johnson Wang ha scritto: > MT8186 are highly integrated SoC and use PMIC_MT6366 for > power management. This patch adds pwrap master driver to > access PMIC_MT6366. > > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC 2022-01-07 10:46 ` [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC Johnson Wang 2022-01-07 11:11 ` AngeloGioacchino Del Regno @ 2022-01-14 15:46 ` Matthias Brugger 2022-01-18 9:25 ` Johnson Wang 2022-01-14 16:08 ` Matthias Brugger 2 siblings, 1 reply; 10+ messages in thread From: Matthias Brugger @ 2022-01-14 15:46 UTC (permalink / raw) To: Johnson Wang, robh+dt Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group On 07/01/2022 11:46, Johnson Wang wrote: > MT8186 are highly integrated SoC and use PMIC_MT6366 for > power management. This patch adds pwrap master driver to > access PMIC_MT6366. > It seems this new arbiter is significantly different from the version 1. Please explain that in the commit message. > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > --- > drivers/soc/mediatek/mtk-pmic-wrap.c | 72 ++++++++++++++++++++++++++++ > 1 file changed, 72 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c > index 952bc554f443..78866ebf7f04 100644 > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c > @@ -30,6 +30,7 @@ > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001) > #define PWRAP_STATE_SYNC_IDLE0 BIT(20) > #define PWRAP_STATE_INIT_DONE0 BIT(21) > +#define PWRAP_STATE_INIT_DONE0_V2 BIT(22) That's a strange name, does it come from the datasheet description? > #define PWRAP_STATE_INIT_DONE1 BIT(15) > > /* macro for WACS FSM */ > @@ -77,6 +78,8 @@ > #define PWRAP_CAP_INT1_EN BIT(3) > #define PWRAP_CAP_WDT_SRC1 BIT(4) > #define PWRAP_CAP_ARB BIT(5) > +#define PWRAP_CAP_MONITOR_V2 BIT(6) Not used capability, please delete. Regards, Matthias ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC 2022-01-14 15:46 ` Matthias Brugger @ 2022-01-18 9:25 ` Johnson Wang 2022-01-18 13:17 ` Matthias Brugger 0 siblings, 1 reply; 10+ messages in thread From: Johnson Wang @ 2022-01-18 9:25 UTC (permalink / raw) To: Matthias Brugger, robh+dt Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group Hi Matthias, On Fri, 2022-01-14 at 16:46 +0100, Matthias Brugger wrote: > > On 07/01/2022 11:46, Johnson Wang wrote: > > MT8186 are highly integrated SoC and use PMIC_MT6366 for > > power management. This patch adds pwrap master driver to > > access PMIC_MT6366. > > > > It seems this new arbiter is significantly different from the version > 1. Please > explain that in the commit message. > > > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > > --- > > drivers/soc/mediatek/mtk-pmic-wrap.c | 72 > > ++++++++++++++++++++++++++++ > > 1 file changed, 72 insertions(+) > > > > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c > > b/drivers/soc/mediatek/mtk-pmic-wrap.c > > index 952bc554f443..78866ebf7f04 100644 > > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c > > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c > > @@ -30,6 +30,7 @@ > > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & > > 0x00000001) > > #define PWRAP_STATE_SYNC_IDLE0 BIT(20) > > #define PWRAP_STATE_INIT_DONE0 BIT(21) > > +#define PWRAP_STATE_INIT_DONE0_V2 BIT(22) > > That's a strange name, does it come from the datasheet description? Thanks for your review. No, there is only PWRAP_STATE_INIT_DONE0 in MT8186 datasheet. However, it's the 22nd bit in MT8186 and the 21st bit in other SoCs. So we changed its name to avoid redefinition of PWRAP_STATE_INIT_DONE0. Could you give us some suggestion on proper definition naming? Do you think PWRAP_STATE_INIT_DONE0_MT8186 will be a better choice? > > > #define PWRAP_STATE_INIT_DONE1 BIT(15) > > > > /* macro for WACS FSM */ > > @@ -77,6 +78,8 @@ > > #define PWRAP_CAP_INT1_EN BIT(3) > > #define PWRAP_CAP_WDT_SRC1 BIT(4) > > #define PWRAP_CAP_ARB BIT(5) > > +#define PWRAP_CAP_MONITOR_V2 BIT(6) > > Not used capability, please delete. > > > Regards, > Matthias PWRAP_CAP_MONITOR_V2 is not used right now. We can remove it in next version. But this capability will be added when we need it. Thanks. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC 2022-01-18 9:25 ` Johnson Wang @ 2022-01-18 13:17 ` Matthias Brugger 2022-01-25 12:51 ` Johnson Wang 0 siblings, 1 reply; 10+ messages in thread From: Matthias Brugger @ 2022-01-18 13:17 UTC (permalink / raw) To: Johnson Wang, robh+dt Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group On 18/01/2022 10:25, Johnson Wang wrote: > Hi Matthias, > > On Fri, 2022-01-14 at 16:46 +0100, Matthias Brugger wrote: >> >> On 07/01/2022 11:46, Johnson Wang wrote: >>> MT8186 are highly integrated SoC and use PMIC_MT6366 for >>> power management. This patch adds pwrap master driver to >>> access PMIC_MT6366. >>> >> >> It seems this new arbiter is significantly different from the version >> 1. Please >> explain that in the commit message. >> >>> Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> >>> --- >>> drivers/soc/mediatek/mtk-pmic-wrap.c | 72 >>> ++++++++++++++++++++++++++++ >>> 1 file changed, 72 insertions(+) >>> >>> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c >>> b/drivers/soc/mediatek/mtk-pmic-wrap.c >>> index 952bc554f443..78866ebf7f04 100644 >>> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c >>> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c >>> @@ -30,6 +30,7 @@ >>> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & >>> 0x00000001) >>> #define PWRAP_STATE_SYNC_IDLE0 BIT(20) >>> #define PWRAP_STATE_INIT_DONE0 BIT(21) >>> +#define PWRAP_STATE_INIT_DONE0_V2 BIT(22) >> >> That's a strange name, does it come from the datasheet description? > > Thanks for your review. > > No, there is only PWRAP_STATE_INIT_DONE0 in MT8186 datasheet. > However, it's the 22nd bit in MT8186 and the 21st bit in other SoCs. > So we changed its name to avoid redefinition of PWRAP_STATE_INIT_DONE0. > > Could you give us some suggestion on proper definition naming? > Do you think PWRAP_STATE_INIT_DONE0_MT8186 will be a better choice? > Is this a difference that only will show up on the PMIC-wrapper of MT8186 or will other SoCs include the same IP? If not, then PWRAP_STATE_INIT_DONE0_MT8186 should be fine. Otherwise we would need a better name. >> >>> #define PWRAP_STATE_INIT_DONE1 BIT(15) >>> >>> /* macro for WACS FSM */ >>> @@ -77,6 +78,8 @@ >>> #define PWRAP_CAP_INT1_EN BIT(3) >>> #define PWRAP_CAP_WDT_SRC1 BIT(4) >>> #define PWRAP_CAP_ARB BIT(5) >>> +#define PWRAP_CAP_MONITOR_V2 BIT(6) >> >> Not used capability, please delete. >> >> >> Regards, >> Matthias > > PWRAP_CAP_MONITOR_V2 is not used right now. > We can remove it in next version. > But this capability will be added when we need it. > That's OK, we should add capability definitions once they are added to the driver, not before that. Thanks, Matthias ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC 2022-01-18 13:17 ` Matthias Brugger @ 2022-01-25 12:51 ` Johnson Wang 0 siblings, 0 replies; 10+ messages in thread From: Johnson Wang @ 2022-01-25 12:51 UTC (permalink / raw) To: Matthias Brugger, robh+dt Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group Hi Matthias, On Tue, 2022-01-18 at 14:17 +0100, Matthias Brugger wrote: > > On 18/01/2022 10:25, Johnson Wang wrote: > > Hi Matthias, > > > > On Fri, 2022-01-14 at 16:46 +0100, Matthias Brugger wrote: > > > > > > On 07/01/2022 11:46, Johnson Wang wrote: > > > > MT8186 are highly integrated SoC and use PMIC_MT6366 for > > > > power management. This patch adds pwrap master driver to > > > > access PMIC_MT6366. > > > > > > > > > > It seems this new arbiter is significantly different from the > > > version > > > 1. Please > > > explain that in the commit message. > > > > > > > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > > > > --- > > > > drivers/soc/mediatek/mtk-pmic-wrap.c | 72 > > > > ++++++++++++++++++++++++++++ > > > > 1 file changed, 72 insertions(+) > > > > > > > > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c > > > > b/drivers/soc/mediatek/mtk-pmic-wrap.c > > > > index 952bc554f443..78866ebf7f04 100644 > > > > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c > > > > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c > > > > @@ -30,6 +30,7 @@ > > > > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & > > > > 0x00000001) > > > > #define PWRAP_STATE_SYNC_IDLE0 BIT(20) > > > > #define PWRAP_STATE_INIT_DONE0 BIT(21) > > > > +#define PWRAP_STATE_INIT_DONE0_V2 BIT(22) > > > > > > That's a strange name, does it come from the datasheet > > > description? > > > > Thanks for your review. > > > > No, there is only PWRAP_STATE_INIT_DONE0 in MT8186 datasheet. > > However, it's the 22nd bit in MT8186 and the 21st bit in other > > SoCs. > > So we changed its name to avoid redefinition of > > PWRAP_STATE_INIT_DONE0. > > > > Could you give us some suggestion on proper definition naming? > > Do you think PWRAP_STATE_INIT_DONE0_MT8186 will be a better choice? > > > > Is this a difference that only will show up on the PMIC-wrapper of > MT8186 or > will other SoCs include the same IP? If not, then > PWRAP_STATE_INIT_DONE0_MT8186 > should be fine. Otherwise we would need a better name. > In fact, we don't know whether following SoCs will include the same IP in the future. Can we just replace _V2 with _MT8186 this time or please give us some suggestion on it. Thanks for your response. > > > > > > > #define PWRAP_STATE_INIT_DONE1 BIT(15) > > > > > > > > /* macro for WACS FSM */ > > > > @@ -77,6 +78,8 @@ > > > > #define PWRAP_CAP_INT1_EN BIT(3) > > > > #define PWRAP_CAP_WDT_SRC1 BIT(4) > > > > #define PWRAP_CAP_ARB BIT(5) > > > > +#define PWRAP_CAP_MONITOR_V2 BIT(6) > > > > > > Not used capability, please delete. > > > > > > > > > Regards, > > > Matthias > > > > PWRAP_CAP_MONITOR_V2 is not used right now. > > We can remove it in next version. > > But this capability will be added when we need it. > > > > That's OK, we should add capability definitions once they are added > to the > driver, not before that. > > Thanks, > Matthias ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC 2022-01-07 10:46 ` [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC Johnson Wang 2022-01-07 11:11 ` AngeloGioacchino Del Regno 2022-01-14 15:46 ` Matthias Brugger @ 2022-01-14 16:08 ` Matthias Brugger 2 siblings, 0 replies; 10+ messages in thread From: Matthias Brugger @ 2022-01-14 16:08 UTC (permalink / raw) To: Johnson Wang, robh+dt Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group Hi Johnson, It looks like my review from a few minutes got lost, so here again: On 07/01/2022 11:46, Johnson Wang wrote: > MT8186 are highly integrated SoC and use PMIC_MT6366 for > power management. This patch adds pwrap master driver to > access PMIC_MT6366. > > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > --- > drivers/soc/mediatek/mtk-pmic-wrap.c | 72 ++++++++++++++++++++++++++++ > 1 file changed, 72 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c > index 952bc554f443..78866ebf7f04 100644 > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c > @@ -30,6 +30,7 @@ > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001) > #define PWRAP_STATE_SYNC_IDLE0 BIT(20) > #define PWRAP_STATE_INIT_DONE0 BIT(21) > +#define PWRAP_STATE_INIT_DONE0_V2 BIT(22) This name is rather strange. Is the reason that the datasheet names it like this? > #define PWRAP_STATE_INIT_DONE1 BIT(15) > > /* macro for WACS FSM */ > @@ -77,6 +78,8 @@ > #define PWRAP_CAP_INT1_EN BIT(3) > #define PWRAP_CAP_WDT_SRC1 BIT(4) > #define PWRAP_CAP_ARB BIT(5) > +#define PWRAP_CAP_MONITOR_V2 BIT(6) Not used capability, please drop. Regards, Matthias > +#define PWRAP_CAP_ARB_V2 BIT(8) > > /* defines for slave device wrapper registers */ > enum dew_regs { > @@ -1063,6 +1066,55 @@ static int mt8516_regs[] = { > [PWRAP_MSB_FIRST] = 0x170, > }; > > +static int mt8186_regs[] = { > + [PWRAP_MUX_SEL] = 0x0, > + [PWRAP_WRAP_EN] = 0x4, > + [PWRAP_DIO_EN] = 0x8, > + [PWRAP_RDDMY] = 0x20, > + [PWRAP_CSHEXT_WRITE] = 0x24, > + [PWRAP_CSHEXT_READ] = 0x28, > + [PWRAP_CSLEXT_WRITE] = 0x2C, > + [PWRAP_CSLEXT_READ] = 0x30, > + [PWRAP_EXT_CK_WRITE] = 0x34, > + [PWRAP_STAUPD_CTRL] = 0x3C, > + [PWRAP_STAUPD_GRPEN] = 0x40, > + [PWRAP_EINT_STA0_ADR] = 0x44, > + [PWRAP_EINT_STA1_ADR] = 0x48, > + [PWRAP_INT_CLR] = 0xC8, > + [PWRAP_INT_FLG] = 0xC4, > + [PWRAP_MAN_EN] = 0x7C, > + [PWRAP_MAN_CMD] = 0x80, > + [PWRAP_WACS0_EN] = 0x8C, > + [PWRAP_WACS1_EN] = 0x94, > + [PWRAP_WACS2_EN] = 0x9C, > + [PWRAP_INIT_DONE0] = 0x90, > + [PWRAP_INIT_DONE1] = 0x98, > + [PWRAP_INIT_DONE2] = 0xA0, > + [PWRAP_INT_EN] = 0xBC, > + [PWRAP_INT1_EN] = 0xCC, > + [PWRAP_INT1_FLG] = 0xD4, > + [PWRAP_INT1_CLR] = 0xD8, > + [PWRAP_TIMER_EN] = 0xF0, > + [PWRAP_WDT_UNIT] = 0xF8, > + [PWRAP_WDT_SRC_EN] = 0xFC, > + [PWRAP_WDT_SRC_EN_1] = 0x100, > + [PWRAP_WDT_FLG] = 0x104, > + [PWRAP_SPMINF_STA] = 0x1B4, > + [PWRAP_DCM_EN] = 0x1EC, > + [PWRAP_DCM_DBC_PRD] = 0x1F0, > + [PWRAP_GPSINF_0_STA] = 0x204, > + [PWRAP_GPSINF_1_STA] = 0x208, > + [PWRAP_WACS0_CMD] = 0xC00, > + [PWRAP_WACS0_RDATA] = 0xC04, > + [PWRAP_WACS0_VLDCLR] = 0xC08, > + [PWRAP_WACS1_CMD] = 0xC10, > + [PWRAP_WACS1_RDATA] = 0xC14, > + [PWRAP_WACS1_VLDCLR] = 0xC18, > + [PWRAP_WACS2_CMD] = 0xC20, > + [PWRAP_WACS2_RDATA] = 0xC24, > + [PWRAP_WACS2_VLDCLR] = 0xC28, > +}; > + > enum pmic_type { > PMIC_MT6323, > PMIC_MT6351, > @@ -1083,6 +1135,7 @@ enum pwrap_type { > PWRAP_MT8135, > PWRAP_MT8173, > PWRAP_MT8183, > + PWRAP_MT8186, > PWRAP_MT8195, > PWRAP_MT8516, > }; > @@ -1535,6 +1588,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp) > case PWRAP_MT6779: > case PWRAP_MT6797: > case PWRAP_MT8173: > + case PWRAP_MT8186: > case PWRAP_MT8516: > pwrap_writel(wrp, 1, PWRAP_CIPHER_EN); > break; > @@ -2069,6 +2123,19 @@ static struct pmic_wrapper_type pwrap_mt8516 = { > .init_soc_specific = NULL, > }; > > +static struct pmic_wrapper_type pwrap_mt8186 = { > + .regs = mt8186_regs, > + .type = PWRAP_MT8186, > + .arb_en_all = 0xfb27f, > + .int_en_all = 0xfffffffe, /* disable WatchDog Timeout for bit 1 */ > + .int1_en_all = 0x000017ff, /* disable Matching interrupt for bit 13 */ > + .spi_w = PWRAP_MAN_CMD_SPI_WRITE, > + .wdt_src = PWRAP_WDT_SRC_MASK_ALL, > + .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_MONITOR_V2 | PWRAP_CAP_ARB_V2, > + .init_reg_clock = pwrap_common_init_reg_clock, > + .init_soc_specific = NULL, > +}; > + > static const struct of_device_id of_pwrap_match_tbl[] = { > { > .compatible = "mediatek,mt2701-pwrap", > @@ -2097,6 +2164,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = { > }, { > .compatible = "mediatek,mt8183-pwrap", > .data = &pwrap_mt8183, > + }, { > + .compatible = "mediatek,mt8186-pwrap", > + .data = &pwrap_mt8186, > }, { > .compatible = "mediatek,mt8195-pwrap", > .data = &pwrap_mt8195, > @@ -2209,6 +2279,8 @@ static int pwrap_probe(struct platform_device *pdev) > > if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) > mask_done = PWRAP_STATE_INIT_DONE1; > + else if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB_V2)) > + mask_done = PWRAP_STATE_INIT_DONE0_V2; > else > mask_done = PWRAP_STATE_INIT_DONE0; > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] dt-bindings: mediatek: add compatible for MT8186 pwrap 2022-01-07 10:46 [PATCH v2 0/2] Add PMIC wrapper support for Mediatek MT8186 SoC IC Johnson Wang 2022-01-07 10:46 ` [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC Johnson Wang @ 2022-01-07 10:46 ` Johnson Wang 2022-01-12 1:49 ` Rob Herring 1 sibling, 1 reply; 10+ messages in thread From: Johnson Wang @ 2022-01-07 10:46 UTC (permalink / raw) To: robh+dt, matthias.bgg Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek, angelogioacchino.delregno, Project_Global_Chrome_Upstream_Group, Johnson Wang This adds dt-binding documentation of pwrap for Mediatek MT8186 SoCs Platform. Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index d74a7a5ae9f2..214a34633824 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -27,6 +27,7 @@ Required properties in pwrap device node. "mediatek,mt8135-pwrap" for MT8135 SoCs "mediatek,mt8173-pwrap" for MT8173 SoCs "mediatek,mt8183-pwrap" for MT8183 SoCs + "mediatek,mt8186-pwrap" for MT8186 SoCs "mediatek,mt8195-pwrap" for MT8195 SoCs "mediatek,mt8516-pwrap" for MT8516 SoCs - interrupts: IRQ for pwrap in SOC -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] dt-bindings: mediatek: add compatible for MT8186 pwrap 2022-01-07 10:46 ` [PATCH v2 2/2] dt-bindings: mediatek: add compatible for MT8186 pwrap Johnson Wang @ 2022-01-12 1:49 ` Rob Herring 0 siblings, 0 replies; 10+ messages in thread From: Rob Herring @ 2022-01-12 1:49 UTC (permalink / raw) To: Johnson Wang Cc: linux-kernel, robh+dt, devicetree, Project_Global_Chrome_Upstream_Group, matthias.bgg, linux-arm-kernel, angelogioacchino.delregno, linux-mediatek On Fri, 07 Jan 2022 18:46:33 +0800, Johnson Wang wrote: > This adds dt-binding documentation of pwrap for Mediatek MT8186 > SoCs Platform. > > Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > --- > Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-01-25 12:53 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-01-07 10:46 [PATCH v2 0/2] Add PMIC wrapper support for Mediatek MT8186 SoC IC Johnson Wang 2022-01-07 10:46 ` [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for MT8186 SoC Johnson Wang 2022-01-07 11:11 ` AngeloGioacchino Del Regno 2022-01-14 15:46 ` Matthias Brugger 2022-01-18 9:25 ` Johnson Wang 2022-01-18 13:17 ` Matthias Brugger 2022-01-25 12:51 ` Johnson Wang 2022-01-14 16:08 ` Matthias Brugger 2022-01-07 10:46 ` [PATCH v2 2/2] dt-bindings: mediatek: add compatible for MT8186 pwrap Johnson Wang 2022-01-12 1:49 ` Rob Herring
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