* [PATCH v3 1/9] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 2/9] media: hantro: imx: reuse MB_DIM define Emil Velikov
` (7 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov
From: Emil Velikov <emil.velikov@collabora.com>
Use the register directly over the existing SWREG().
Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
#include <media/v4l2-mem2mem.h>
#include "hantro.h"
#include "hantro_hw.h"
+#include "hantro_g1_regs.h"
#define G1_SWREG(nr) ((nr) * 4)
@@ -20,7 +21,6 @@
#define G1_REG_REFER2_BASE G1_SWREG(16)
#define G1_REG_REFER3_BASE G1_SWREG(17)
#define G1_REG_QTABLE_BASE G1_SWREG(40)
-#define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0)
#define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24))
#define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
hantro_end_prepare_run(ctx);
- reg = G1_REG_DEC_E(1);
- vdpu_write(vpu, reg, G1_SWREG(1));
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
}
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 2/9] media: hantro: imx: reuse MB_DIM define
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
2021-03-31 17:35 ` [PATCH v3 1/9] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2 Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 3/9] media: hantro: imx: remove duplicate dec_base init Emil Velikov
` (6 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov
From: Emil Velikov <emil.velikov@collabora.com>
Swap the hardcoded 16 with MB_DIM define.
Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index c222de075ef4..1f48c1956cd2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -109,10 +109,10 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
.frmsize = {
.min_width = 48,
.max_width = 3840,
- .step_width = 16,
+ .step_width = MB_DIM,
.min_height = 48,
.max_height = 2160,
- .step_height = 16,
+ .step_height = MB_DIM,
},
},
{
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 3/9] media: hantro: imx: remove duplicate dec_base init
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
2021-03-31 17:35 ` [PATCH v3 1/9] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2 Emil Velikov
2021-03-31 17:35 ` [PATCH v3 2/9] media: hantro: imx: reuse MB_DIM define Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 4/9] media: hantro: imx: remove unused include Emil Velikov
` (5 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov
From: Emil Velikov <emil.velikov@collabora.com>
The vpu->dec_base is already set by the hantro driver itself.
Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index 1f48c1956cd2..cb1ac02c03d2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -150,7 +150,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
- vpu->dec_base = vpu->reg_bases[0];
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
return 0;
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 4/9] media: hantro: imx: remove unused include
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
` (2 preceding siblings ...)
2021-03-31 17:35 ` [PATCH v3 3/9] media: hantro: imx: remove duplicate dec_base init Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 5/9] media: hantro: introduce hantro_g1.c for common API Emil Velikov
` (4 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov
From: Emil Velikov <emil.velikov@collabora.com>
The current imx8 code does not use the jpeg encoder. Remove the
unnecessary include.
Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index cb1ac02c03d2..f36c1bd681ba 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_jpeg.h"
#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 5/9] media: hantro: introduce hantro_g1.c for common API
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
` (3 preceding siblings ...)
2021-03-31 17:35 ` [PATCH v3 4/9] media: hantro: imx: remove unused include Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 17:35 ` [PATCH v3 6/9] media: hantro: add fallback handling for single irq/clk Emil Velikov
` (3 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov
From: Emil Velikov <emil.velikov@collabora.com>
The Hantro G1 IRQ and reset handling it pretty standard. I was this
close to duplicating it, yet again, before reconsidering and refactoring
it to a separate file.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/Makefile | 1 +
drivers/staging/media/hantro/hantro_g1.c | 39 ++++++++++++++++++++
drivers/staging/media/hantro/hantro_hw.h | 3 ++
drivers/staging/media/hantro/imx8m_vpu_hw.c | 21 +----------
drivers/staging/media/hantro/rk3288_vpu_hw.c | 36 ++----------------
5 files changed, 48 insertions(+), 52 deletions(-)
create mode 100644 drivers/staging/media/hantro/hantro_g1.c
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 743ce08eb184..3747a32799b2 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -7,6 +7,7 @@ hantro-vpu-y += \
hantro_v4l2.o \
hantro_postproc.o \
hantro_h1_jpeg_enc.o \
+ hantro_g1.o \
hantro_g1_h264_dec.o \
hantro_g1_mpeg2_dec.o \
hantro_g1_vp8_dec.o \
diff --git a/drivers/staging/media/hantro/hantro_g1.c b/drivers/staging/media/hantro/hantro_g1.c
new file mode 100644
index 000000000000..0ab1cee62218
--- /dev/null
+++ b/drivers/staging/media/hantro/hantro_g1.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VPU codec driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ * Jeffy Chen <jeffy.chen@rock-chips.com>
+ * Copyright (C) 2019 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+#include "hantro_g1_regs.h"
+
+irqreturn_t hantro_g1_irq(int irq, void *dev_id)
+{
+ struct hantro_dev *vpu = dev_id;
+ enum vb2_buffer_state state;
+ u32 status;
+
+ status = vdpu_read(vpu, G1_REG_INTERRUPT);
+ state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
+
+ vdpu_write(vpu, 0, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+
+ hantro_irq_done(vpu, state);
+
+ return IRQ_HANDLED;
+}
+
+void hantro_g1_reset(struct hantro_ctx *ctx)
+{
+ struct hantro_dev *vpu = ctx->dev;
+
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+ vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
+}
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 34c9e4649a25..73c71bb2320c 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -164,6 +164,9 @@ void hantro_irq_done(struct hantro_dev *vpu,
void hantro_start_prepare_run(struct hantro_ctx *ctx);
void hantro_end_prepare_run(struct hantro_ctx *ctx);
+irqreturn_t hantro_g1_irq(int irq, void *dev_id);
+void hantro_g1_reset(struct hantro_ctx *ctx);
+
void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx);
int hantro_jpeg_enc_init(struct hantro_ctx *ctx);
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index f36c1bd681ba..9eb556460e52 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
#define RESET_G1 BIT(1)
@@ -129,24 +128,6 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
},
};
-static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
@@ -191,7 +172,7 @@ static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = {
*/
static const struct hantro_irq imx8mq_irqs[] = {
- { "g1", imx8m_vpu_g1_irq },
+ { "g1", hantro_g1_irq },
{ "g2", NULL /* TODO: imx8m_vpu_g2_irq */ },
};
diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c
index 7b299ee3e93d..fefd45269e52 100644
--- a/drivers/staging/media/hantro/rk3288_vpu_hw.c
+++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c
@@ -10,7 +10,6 @@
#include "hantro.h"
#include "hantro_jpeg.h"
-#include "hantro_g1_regs.h"
#include "hantro_h1_regs.h"
#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
@@ -127,24 +126,6 @@ static irqreturn_t rk3288_vepu_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static irqreturn_t rk3288_vdpu_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
{
/* Bump ACLK to max. possible freq. to improve performance. */
@@ -161,15 +142,6 @@ static void rk3288_vpu_enc_reset(struct hantro_ctx *ctx)
vepu_write(vpu, 0, H1_REG_AXI_CTRL);
}
-static void rk3288_vpu_dec_reset(struct hantro_ctx *ctx)
-{
- struct hantro_dev *vpu = ctx->dev;
-
- vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
- vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
-}
-
/*
* Supported codec ops.
*/
@@ -184,19 +156,19 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
},
[HANTRO_MODE_H264_DEC] = {
.run = hantro_g1_h264_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_h264_dec_init,
.exit = hantro_h264_dec_exit,
},
[HANTRO_MODE_MPEG2_DEC] = {
.run = hantro_g1_mpeg2_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_mpeg2_dec_init,
.exit = hantro_mpeg2_dec_exit,
},
[HANTRO_MODE_VP8_DEC] = {
.run = hantro_g1_vp8_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_vp8_dec_init,
.exit = hantro_vp8_dec_exit,
},
@@ -208,7 +180,7 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
static const struct hantro_irq rk3288_irqs[] = {
{ "vepu", rk3288_vepu_irq },
- { "vdpu", rk3288_vdpu_irq },
+ { "vdpu", hantro_g1_irq },
};
static const char * const rk3288_clk_names[] = {
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 6/9] media: hantro: add fallback handling for single irq/clk
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
` (4 preceding siblings ...)
2021-03-31 17:35 ` [PATCH v3 5/9] media: hantro: introduce hantro_g1.c for common API Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 19:57 ` Ezequiel Garcia
2021-03-31 17:35 ` [PATCH v3 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings Emil Velikov
` (2 subsequent siblings)
8 siblings, 1 reply; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov
From: Emil Velikov <emil.velikov@collabora.com>
Currently the driver expects that each irq/clk will have a name
specified.
A valid point was raised by the DT maintainers - when there is a single
interrupt line or clock - the names are not needed.
This is handled:
- clk - implicitly - ultimately we'll call of_clk_get_hw(..., 0, NULL
which will get the first clock from the pmc
- irq - explicitly - platform_get_irq(..., 0)
To gracefully handle potential bugs, add respective WARN_ON() if we're
having more than one irq/clk, yet lacking the respective names.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Suggested-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
v3
- New patch
---
drivers/staging/media/hantro/hantro_drv.c | 24 +++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index e5f200e64993..d1294eb9cd07 100644
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -752,8 +752,16 @@ static int hantro_probe(struct platform_device *pdev)
if (!vpu->clocks)
return -ENOMEM;
- for (i = 0; i < vpu->variant->num_clocks; i++)
+ for (i = 0; i < vpu->variant->num_clocks; i++) {
vpu->clocks[i].id = vpu->variant->clk_names[i];
+
+ /*
+ * Warn and refuse to load if the driver has multiple clocks,
+ * yet they are lacking the respective names.
+ */
+ if (WARN_ON(!vpu->variant->clk_names[i] && i))
+ return -ENXIO;
+ }
ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks,
vpu->clocks);
if (ret)
@@ -791,7 +799,19 @@ static int hantro_probe(struct platform_device *pdev)
if (!vpu->variant->irqs[i].handler)
continue;
- irq = platform_get_irq_byname(vpu->pdev, irq_name);
+ /*
+ * If the driver has a single IRQ, chances are there will be no
+ * actual name in the DT bindings.
+ */
+ if (!irq_name) {
+ if (WARN_ON(i))
+ return -ENXIO;
+
+ irq_name = "default";
+ irq = platform_get_irq(vpu->pdev, 0);
+ } else {
+ irq = platform_get_irq_byname(vpu->pdev, irq_name);
+ }
if (irq <= 0)
return -ENXIO;
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 6/9] media: hantro: add fallback handling for single irq/clk
2021-03-31 17:35 ` [PATCH v3 6/9] media: hantro: add fallback handling for single irq/clk Emil Velikov
@ 2021-03-31 19:57 ` Ezequiel Garcia
0 siblings, 0 replies; 15+ messages in thread
From: Ezequiel Garcia @ 2021-03-31 19:57 UTC (permalink / raw)
To: Emil Velikov, kernel, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Hi Emil,
Thanks for the patch. Looking good!
A few comments below.
On Wed, 2021-03-31 at 18:35 +0100, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> Currently the driver expects that each irq/clk will have a name
> specified.
>
> A valid point was raised by the DT maintainers - when there is a single
> interrupt line or clock - the names are not needed.
>
> This is handled:
> - clk - implicitly - ultimately we'll call of_clk_get_hw(..., 0, NULL
> which will get the first clock from the pmc
> - irq - explicitly - platform_get_irq(..., 0)
>
> To gracefully handle potential bugs, add respective WARN_ON() if we're
> having more than one irq/clk, yet lacking the respective names.
>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Since this is a new patch, I'm unsure where was this Acked-by?
> Suggested-by: Ezequiel Garcia <ezequiel@collabora.com>
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> ---
> v3
> - New patch
> ---
> drivers/staging/media/hantro/hantro_drv.c | 24 +++++++++++++++++++++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
> index e5f200e64993..d1294eb9cd07 100644
> --- a/drivers/staging/media/hantro/hantro_drv.c
> +++ b/drivers/staging/media/hantro/hantro_drv.c
> @@ -752,8 +752,16 @@ static int hantro_probe(struct platform_device *pdev)
> if (!vpu->clocks)
> return -ENOMEM;
>
> - for (i = 0; i < vpu->variant->num_clocks; i++)
> + for (i = 0; i < vpu->variant->num_clocks; i++) {
> vpu->clocks[i].id = vpu->variant->clk_names[i];
> +
> + /*
> + * Warn and refuse to load if the driver has multiple clocks,
> + * yet they are lacking the respective names.
> + */
> + if (WARN_ON(!vpu->variant->clk_names[i] &&
We already have more WARN_ON than we should in this driver,
I would just remove this condition entirely.
> + return -ENXIO;
> + }
> ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks,
> vpu->clocks);
> if (ret)
> @@ -791,7 +799,19 @@ static int hantro_probe(struct platform_device *pdev)
> if (!vpu->variant->irqs[i].handler)
> continue;
>
> - irq = platform_get_irq_byname(vpu->pdev, irq_name);
> + /*
> + * If the driver has a single IRQ, chances are there will be no
> + * actual name in the DT bindings.
> + */
> + if (!irq_name) {
> + if (WARN_ON(i))
> + return -ENXIO;
> +
> + irq_name = "default";
> + irq = platform_get_irq(vpu->pdev, 0);
> + } else {
> + irq = platform_get_irq_byname(vpu->pdev, irq_name);
> + }
How about this instead:
irq = platform_get_irq_byname(vpu->pdev, irq_name);
if (irq <= 0)
irq = platform_get_irq(vpu->pdev, i);
(and leave the irq name in the sama5d4 code).
Thanks,
Ezequiel
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
` (5 preceding siblings ...)
2021-03-31 17:35 ` [PATCH v3 6/9] media: hantro: add fallback handling for single irq/clk Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 18:48 ` [PATCH v3.5 " Emil Velikov
2021-03-31 18:53 ` [PATCH v3 " Emil Velikov
2021-03-31 17:35 ` [PATCH v3 8/9] media: hantro: add initial SAMA5D4 support Emil Velikov
2021-03-31 17:35 ` [PATCH v3 9/9] ARM: dts: sama5d4: enable Hantro G1 VDEC Emil Velikov
8 siblings, 2 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov, Frank Rowand
From: Emil Velikov <emil.velikov@collabora.com>
Add devicetree binding documentation for the Hantro G1/G2 VDEC on
the Microchip SAMAS5D4 SoC.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: devicetree@vger.kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
v2
- Newly introduced
- s/Atmel/Microchip/ (Nicolas)
- Drop leading 0 in node name/address
---
.../media/microchip,sama5d4-vdec.yaml | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
diff --git a/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml b/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
new file mode 100644
index 000000000000..9cb2c0295d54
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Hantro G1 VPU codec implemented on Microchip SAMA5D4 SoCs
+
+maintainers:
+ - Emil Velikov <emil.velikov@collabora.com>
+
+description:
+ Hantro G1 video decode accelerator present on Microchip SAMA5D4 SoCs.
+
+properties:
+ compatible:
+ const: microchip,sama5d4-vdec
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ items:
+ - const: vdec
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: vdec_clk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/at91.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ vdec0: vdec@300000 {
+ compatible = "microchip,sama5d4-vdec";
+ reg = <0x00300000 0x100000>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+ interrupt-names = "vdec";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+ clock-names = "vdec_clk";
+ };
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3.5 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings
2021-03-31 17:35 ` [PATCH v3 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings Emil Velikov
@ 2021-03-31 18:48 ` Emil Velikov
2021-03-31 18:53 ` [PATCH v3 " Emil Velikov
1 sibling, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 18:48 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov, Frank Rowand
From: Emil Velikov <emil.velikov@collabora.com>
Add devicetree binding documentation for the Hantro G1/G2 VDEC on
the Microchip SAMAS5D4 SoC.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: devicetree@vger.kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
v2
- Newly introduced
- s/Atmel/Microchip/ (Nicolas)
- Drop leading 0 in node name/address
v3.5
- Drop interrupt/clock names (RobH)
---
.../media/microchip,sama5d4-vdec.yaml | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
diff --git a/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml b/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
new file mode 100644
index 000000000000..4b77103ca913
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Hantro G1 VPU codec implemented on Microchip SAMA5D4 SoCs
+
+maintainers:
+ - Emil Velikov <emil.velikov@collabora.com>
+
+description:
+ Hantro G1 video decode accelerator present on Microchip SAMA5D4 SoCs.
+
+properties:
+ compatible:
+ const: microchip,sama5d4-vdec
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/at91.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ vdec0: vdec@300000 {
+ compatible = "microchip,sama5d4-vdec";
+ reg = <0x00300000 0x100000>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+ };
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings
2021-03-31 17:35 ` [PATCH v3 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings Emil Velikov
2021-03-31 18:48 ` [PATCH v3.5 " Emil Velikov
@ 2021-03-31 18:53 ` Emil Velikov
1 sibling, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 18:53 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: Frank Rowand
On Wed, 31 Mar 2021 at 18:35, Emil Velikov <emil.l.velikov@gmail.com> wrote:
>
> From: Emil Velikov <emil.velikov@collabora.com>
>
> Add devicetree binding documentation for the Hantro G1/G2 VDEC on
> the Microchip SAMAS5D4 SoC.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Frank Rowand <frowand.list@gmail.com>
> Cc: devicetree@vger.kernel.org>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> ---
> v2
> - Newly introduced
> - s/Atmel/Microchip/ (Nicolas)
> - Drop leading 0 in node name/address
> ---
Please ignore this patch, I might have forgotten to squash the fixup :-]
v3.5 has just been sent out [1].
Thanks
Emil
[1] https://lore.kernel.org/linux-media/20210331173520.184191-8-emil.l.velikov@gmail.com/T/#mf6b5c1f2be535abba8b254f11c9f3017c1c9fc86
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 8/9] media: hantro: add initial SAMA5D4 support
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
` (6 preceding siblings ...)
2021-03-31 17:35 ` [PATCH v3 7/9] media: dt-bindings: Document SAMA5D4 VDEC bindings Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
2021-03-31 20:03 ` Ezequiel Garcia
2021-03-31 17:35 ` [PATCH v3 9/9] ARM: dts: sama5d4: enable Hantro G1 VDEC Emil Velikov
8 siblings, 1 reply; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov, Frank Rowand
From: Emil Velikov <emil.velikov@collabora.com>
The SoC features a Hantro G1 compatible video decoder, supporting the
MPEG-2, VP8 and H264 codecs with resolutions up-to 1280x720.
Post-processing core is also available on the SoC.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: devicetree@vger.kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
v2
- Split DT and defconfig changes to separate patches (Eze)
- s/Atmel/Microchip/ (Nicolas)
v3
- Drop the clk/irq names (RobH)
---
drivers/staging/media/hantro/Kconfig | 10 +-
drivers/staging/media/hantro/Makefile | 3 +
drivers/staging/media/hantro/hantro_drv.c | 3 +
drivers/staging/media/hantro/hantro_hw.h | 1 +
.../staging/media/hantro/sama5d4_vdec_hw.c | 117 ++++++++++++++++++
5 files changed, 133 insertions(+), 1 deletion(-)
create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
index 5b6cf9f62b1a..20b1f6d7b69c 100644
--- a/drivers/staging/media/hantro/Kconfig
+++ b/drivers/staging/media/hantro/Kconfig
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
config VIDEO_HANTRO
tristate "Hantro VPU driver"
- depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
+ depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
depends on VIDEO_DEV && VIDEO_V4L2
select MEDIA_CONTROLLER
select MEDIA_CONTROLLER_REQUEST_API
@@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
help
Enable support for i.MX8M SoCs.
+config VIDEO_HANTRO_SAMA5D4
+ bool "Hantro VDEC SAMA5D4 support"
+ depends on VIDEO_HANTRO
+ depends on ARCH_AT91 || COMPILE_TEST
+ default y
+ help
+ Enable support for Microchip SAMA5D4 SoCs.
+
config VIDEO_HANTRO_ROCKCHIP
bool "Hantro VPU Rockchip support"
depends on VIDEO_HANTRO
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 3747a32799b2..f4b99901eeee 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -22,6 +22,9 @@ hantro-vpu-y += \
hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
imx8m_vpu_hw.o
+hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
+ sama5d4_vdec_hw.o
+
hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
rk3288_vpu_hw.o \
rk3399_vpu_hw.o
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index d1294eb9cd07..74a3d9eab454 100644
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
#endif
#ifdef CONFIG_VIDEO_HANTRO_IMX8M
{ .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
+#endif
+#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
+ { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
#endif
{ /* sentinel */ }
};
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 73c71bb2320c..4d39da1d1581 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3288_vpu_variant;
extern const struct hantro_variant imx8mq_vpu_variant;
+extern const struct hantro_variant sama5d4_vdec_variant;
extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
new file mode 100644
index 000000000000..d52ac626f98a
--- /dev/null
+++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VDEC driver
+ *
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+
+/*
+ * Supported formats.
+ */
+
+static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_YUYV,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+};
+
+static const struct hantro_fmt sama5d4_vdec_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
+ .codec_mode = HANTRO_MODE_MPEG2_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_VP8_FRAME,
+ .codec_mode = HANTRO_MODE_VP8_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_H264_SLICE,
+ .codec_mode = HANTRO_MODE_H264_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+};
+
+static int sama5d4_hw_init(struct hantro_dev *vpu)
+{
+ return 0;
+}
+
+/*
+ * Supported codec ops.
+ */
+
+static const struct hantro_codec_ops sama5d4_vdec_codec_ops[] = {
+ [HANTRO_MODE_MPEG2_DEC] = {
+ .run = hantro_g1_mpeg2_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_mpeg2_dec_init,
+ .exit = hantro_mpeg2_dec_exit,
+ },
+ [HANTRO_MODE_VP8_DEC] = {
+ .run = hantro_g1_vp8_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_vp8_dec_init,
+ .exit = hantro_vp8_dec_exit,
+ },
+ [HANTRO_MODE_H264_DEC] = {
+ .run = hantro_g1_h264_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_h264_dec_init,
+ .exit = hantro_h264_dec_exit,
+ },
+};
+
+static const struct hantro_irq sama5d4_irqs[] = {
+ { NULL, hantro_g1_irq },
+};
+
+static const char * const sama5d4_clk_names[] = { NULL };
+
+const struct hantro_variant sama5d4_vdec_variant = {
+ .dec_fmts = sama5d4_vdec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts),
+ .postproc_fmts = sama5d4_vdec_postproc_fmts,
+ .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts),
+ .postproc_regs = &hantro_g1_postproc_regs,
+ .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
+ HANTRO_H264_DECODER,
+ .codec_ops = sama5d4_vdec_codec_ops,
+ .init = sama5d4_hw_init,
+ .irqs = sama5d4_irqs,
+ .num_irqs = ARRAY_SIZE(sama5d4_irqs),
+ .clk_names = sama5d4_clk_names,
+ .num_clocks = ARRAY_SIZE(sama5d4_clk_names),
+};
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 8/9] media: hantro: add initial SAMA5D4 support
2021-03-31 17:35 ` [PATCH v3 8/9] media: hantro: add initial SAMA5D4 support Emil Velikov
@ 2021-03-31 20:03 ` Ezequiel Garcia
2021-04-01 13:54 ` Emil Velikov
0 siblings, 1 reply; 15+ messages in thread
From: Ezequiel Garcia @ 2021-03-31 20:03 UTC (permalink / raw)
To: Emil Velikov, kernel, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: Frank Rowand
On Wed, 2021-03-31 at 18:35 +0100, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The SoC features a Hantro G1 compatible video decoder, supporting the
> MPEG-2, VP8 and H264 codecs with resolutions up-to 1280x720.
>
> Post-processing core is also available on the SoC.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Frank Rowand <frowand.list@gmail.com>
> Cc: devicetree@vger.kernel.org>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> ---
> v2
> - Split DT and defconfig changes to separate patches (Eze)
> - s/Atmel/Microchip/ (Nicolas)
>
> v3
> - Drop the clk/irq names (RobH)
> ---
> drivers/staging/media/hantro/Kconfig | 10 +-
> drivers/staging/media/hantro/Makefile | 3 +
> drivers/staging/media/hantro/hantro_drv.c | 3 +
> drivers/staging/media/hantro/hantro_hw.h | 1 +
> .../staging/media/hantro/sama5d4_vdec_hw.c | 117 ++++++++++++++++++
> 5 files changed, 133 insertions(+), 1 deletion(-)
> create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
>
> diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
> index 5b6cf9f62b1a..20b1f6d7b69c 100644
> --- a/drivers/staging/media/hantro/Kconfig
> +++ b/drivers/staging/media/hantro/Kconfig
> @@ -1,7 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> config VIDEO_HANTRO
> tristate "Hantro VPU driver"
> - depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
> + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
> depends on VIDEO_DEV && VIDEO_V4L2
> select MEDIA_CONTROLLER
> select MEDIA_CONTROLLER_REQUEST_API
> @@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
> help
> Enable support for i.MX8M SoCs.
>
> +config VIDEO_HANTRO_SAMA5D4
> + bool "Hantro VDEC SAMA5D4 support"
> + depends on VIDEO_HANTRO
> + depends on ARCH_AT91 || COMPILE_TEST
> + default y
> + help
> + Enable support for Microchip SAMA5D4 SoCs.
> +
> config VIDEO_HANTRO_ROCKCHIP
> bool "Hantro VPU Rockchip support"
> depends on VIDEO_HANTRO
> diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
> index 3747a32799b2..f4b99901eeee 100644
> --- a/drivers/staging/media/hantro/Makefile
> +++ b/drivers/staging/media/hantro/Makefile
> @@ -22,6 +22,9 @@ hantro-vpu-y += \
> hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
> imx8m_vpu_hw.o
>
> +hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
> + sama5d4_vdec_hw.o
> +
> hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
> rk3288_vpu_hw.o \
> rk3399_vpu_hw.o
> diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
> index d1294eb9cd07..74a3d9eab454 100644
> --- a/drivers/staging/media/hantro/hantro_drv.c
> +++ b/drivers/staging/media/hantro/hantro_drv.c
> @@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
> #endif
> #ifdef CONFIG_VIDEO_HANTRO_IMX8M
> { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
> +#endif
> +#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
> + { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
> #endif
> { /* sentinel */ }
> };
> diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
> index 73c71bb2320c..4d39da1d1581 100644
> --- a/drivers/staging/media/hantro/hantro_hw.h
> +++ b/drivers/staging/media/hantro/hantro_hw.h
> @@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
> extern const struct hantro_variant rk3328_vpu_variant;
> extern const struct hantro_variant rk3288_vpu_variant;
> extern const struct hantro_variant imx8mq_vpu_variant;
> +extern const struct hantro_variant sama5d4_vdec_variant;
>
> extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
>
> diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> new file mode 100644
> index 000000000000..d52ac626f98a
> --- /dev/null
> +++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> @@ -0,0 +1,117 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Hantro VDEC driver
> + *
> + * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
> + */
> +
> +#include "hantro.h"
> +
> +/*
> + * Supported formats.
> + */
> +
> +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_YUYV,
> + .codec_mode = HANTRO_MODE_NONE,
> + },
> +};
> +
> +static const struct hantro_fmt sama5d4_vdec_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_NV12,
> + .codec_mode = HANTRO_MODE_NONE,
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
> + .codec_mode = HANTRO_MODE_MPEG2_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_VP8_FRAME,
> + .codec_mode = HANTRO_MODE_VP8_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_H264_SLICE,
> + .codec_mode = HANTRO_MODE_H264_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> +};
> +
> +static int sama5d4_hw_init(struct hantro_dev *vpu)
> +{
> + return 0;
> +}
> +
> +/*
> + * Supported codec ops.
> + */
> +
> +static const struct hantro_codec_ops sama5d4_vdec_codec_ops[] = {
> + [HANTRO_MODE_MPEG2_DEC] = {
> + .run = hantro_g1_mpeg2_dec_run,
> + .reset = hantro_g1_reset,
> + .init = hantro_mpeg2_dec_init,
> + .exit = hantro_mpeg2_dec_exit,
> + },
> + [HANTRO_MODE_VP8_DEC] = {
> + .run = hantro_g1_vp8_dec_run,
> + .reset = hantro_g1_reset,
> + .init = hantro_vp8_dec_init,
> + .exit = hantro_vp8_dec_exit,
> + },
> + [HANTRO_MODE_H264_DEC] = {
> + .run = hantro_g1_h264_dec_run,
> + .reset = hantro_g1_reset,
> + .init = hantro_h264_dec_init,
> + .exit = hantro_h264_dec_exit,
> + },
> +};
> +
> +static const struct hantro_irq sama5d4_irqs[] = {
> + { NULL, hantro_g1_irq },
As suggested I think you can have a name in here.
> +};
> +
I would add a comment here explaining why this has to be NULL.
Now that I see this in practice, I'm wondering if we should just
keep the name here, we don't have any NULL names and do
something like this in hantro_probe (in patch 6/9):
/* If only one clock, we shouldn't have a clock name. */
if (vpu->variant->num_clocks > 1) {
for (i = 0; i < vpu->variant->num_clocks; i++)
vpu->clocks[i].id = vpu->variant->clk_names[i];
}
> +static const char * const sama5d4_clk_names[] = { NULL };
> +
Thanks,
Ezequiel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 8/9] media: hantro: add initial SAMA5D4 support
2021-03-31 20:03 ` Ezequiel Garcia
@ 2021-04-01 13:54 ` Emil Velikov
0 siblings, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-04-01 13:54 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: kernel, Philipp Zabel, Rob Herring, devicetree, linux-media,
linux-rockchip, Frank Rowand
On Wed, 31 Mar 2021 at 21:03, Ezequiel Garcia <ezequiel@collabora.com> wrote:
>
> On Wed, 2021-03-31 at 18:35 +0100, Emil Velikov wrote:
> > From: Emil Velikov <emil.velikov@collabora.com>
> >
> > The SoC features a Hantro G1 compatible video decoder, supporting the
> > MPEG-2, VP8 and H264 codecs with resolutions up-to 1280x720.
> >
> > Post-processing core is also available on the SoC.
> >
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Frank Rowand <frowand.list@gmail.com>
> > Cc: devicetree@vger.kernel.org>
> > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> > Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
> > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> > ---
> > v2
> > - Split DT and defconfig changes to separate patches (Eze)
> > - s/Atmel/Microchip/ (Nicolas)
> >
> > v3
> > - Drop the clk/irq names (RobH)
> > ---
> > drivers/staging/media/hantro/Kconfig | 10 +-
> > drivers/staging/media/hantro/Makefile | 3 +
> > drivers/staging/media/hantro/hantro_drv.c | 3 +
> > drivers/staging/media/hantro/hantro_hw.h | 1 +
> > .../staging/media/hantro/sama5d4_vdec_hw.c | 117 ++++++++++++++++++
> > 5 files changed, 133 insertions(+), 1 deletion(-)
> > create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
> >
> > diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
> > index 5b6cf9f62b1a..20b1f6d7b69c 100644
> > --- a/drivers/staging/media/hantro/Kconfig
> > +++ b/drivers/staging/media/hantro/Kconfig
> > @@ -1,7 +1,7 @@
> > # SPDX-License-Identifier: GPL-2.0
> > config VIDEO_HANTRO
> > tristate "Hantro VPU driver"
> > - depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
> > + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
> > depends on VIDEO_DEV && VIDEO_V4L2
> > select MEDIA_CONTROLLER
> > select MEDIA_CONTROLLER_REQUEST_API
> > @@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
> > help
> > Enable support for i.MX8M SoCs.
> >
> > +config VIDEO_HANTRO_SAMA5D4
> > + bool "Hantro VDEC SAMA5D4 support"
> > + depends on VIDEO_HANTRO
> > + depends on ARCH_AT91 || COMPILE_TEST
> > + default y
> > + help
> > + Enable support for Microchip SAMA5D4 SoCs.
> > +
> > config VIDEO_HANTRO_ROCKCHIP
> > bool "Hantro VPU Rockchip support"
> > depends on VIDEO_HANTRO
> > diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
> > index 3747a32799b2..f4b99901eeee 100644
> > --- a/drivers/staging/media/hantro/Makefile
> > +++ b/drivers/staging/media/hantro/Makefile
> > @@ -22,6 +22,9 @@ hantro-vpu-y += \
> > hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
> > imx8m_vpu_hw.o
> >
> > +hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
> > + sama5d4_vdec_hw.o
> > +
> > hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
> > rk3288_vpu_hw.o \
> > rk3399_vpu_hw.o
> > diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
> > index d1294eb9cd07..74a3d9eab454 100644
> > --- a/drivers/staging/media/hantro/hantro_drv.c
> > +++ b/drivers/staging/media/hantro/hantro_drv.c
> > @@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
> > #endif
> > #ifdef CONFIG_VIDEO_HANTRO_IMX8M
> > { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
> > +#endif
> > +#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
> > + { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
> > #endif
> > { /* sentinel */ }
> > };
> > diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
> > index 73c71bb2320c..4d39da1d1581 100644
> > --- a/drivers/staging/media/hantro/hantro_hw.h
> > +++ b/drivers/staging/media/hantro/hantro_hw.h
> > @@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
> > extern const struct hantro_variant rk3328_vpu_variant;
> > extern const struct hantro_variant rk3288_vpu_variant;
> > extern const struct hantro_variant imx8mq_vpu_variant;
> > +extern const struct hantro_variant sama5d4_vdec_variant;
> >
> > extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
> >
> > diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> > new file mode 100644
> > index 000000000000..d52ac626f98a
> > --- /dev/null
> > +++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> > @@ -0,0 +1,117 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Hantro VDEC driver
> > + *
> > + * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
> > + */
> > +
> > +#include "hantro.h"
> > +
> > +/*
> > + * Supported formats.
> > + */
> > +
> > +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> > + {
> > + .fourcc = V4L2_PIX_FMT_YUYV,
> > + .codec_mode = HANTRO_MODE_NONE,
> > + },
> > +};
> > +
> > +static const struct hantro_fmt sama5d4_vdec_fmts[] = {
> > + {
> > + .fourcc = V4L2_PIX_FMT_NV12,
> > + .codec_mode = HANTRO_MODE_NONE,
> > + },
> > + {
> > + .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
> > + .codec_mode = HANTRO_MODE_MPEG2_DEC,
> > + .max_depth = 2,
> > + .frmsize = {
> > + .min_width = 48,
> > + .max_width = 1280,
> > + .step_width = MB_DIM,
> > + .min_height = 48,
> > + .max_height = 720,
> > + .step_height = MB_DIM,
> > + },
> > + },
> > + {
> > + .fourcc = V4L2_PIX_FMT_VP8_FRAME,
> > + .codec_mode = HANTRO_MODE_VP8_DEC,
> > + .max_depth = 2,
> > + .frmsize = {
> > + .min_width = 48,
> > + .max_width = 1280,
> > + .step_width = MB_DIM,
> > + .min_height = 48,
> > + .max_height = 720,
> > + .step_height = MB_DIM,
> > + },
> > + },
> > + {
> > + .fourcc = V4L2_PIX_FMT_H264_SLICE,
> > + .codec_mode = HANTRO_MODE_H264_DEC,
> > + .max_depth = 2,
> > + .frmsize = {
> > + .min_width = 48,
> > + .max_width = 1280,
> > + .step_width = MB_DIM,
> > + .min_height = 48,
> > + .max_height = 720,
> > + .step_height = MB_DIM,
> > + },
> > + },
> > +};
> > +
> > +static int sama5d4_hw_init(struct hantro_dev *vpu)
> > +{
> > + return 0;
> > +}
> > +
> > +/*
> > + * Supported codec ops.
> > + */
> > +
> > +static const struct hantro_codec_ops sama5d4_vdec_codec_ops[] = {
> > + [HANTRO_MODE_MPEG2_DEC] = {
> > + .run = hantro_g1_mpeg2_dec_run,
> > + .reset = hantro_g1_reset,
> > + .init = hantro_mpeg2_dec_init,
> > + .exit = hantro_mpeg2_dec_exit,
> > + },
> > + [HANTRO_MODE_VP8_DEC] = {
> > + .run = hantro_g1_vp8_dec_run,
> > + .reset = hantro_g1_reset,
> > + .init = hantro_vp8_dec_init,
> > + .exit = hantro_vp8_dec_exit,
> > + },
> > + [HANTRO_MODE_H264_DEC] = {
> > + .run = hantro_g1_h264_dec_run,
> > + .reset = hantro_g1_reset,
> > + .init = hantro_h264_dec_init,
> > + .exit = hantro_h264_dec_exit,
> > + },
> > +};
> > +
> > +static const struct hantro_irq sama5d4_irqs[] = {
> > + { NULL, hantro_g1_irq },
>
> As suggested I think you can have a name in here.
>
> > +};
> > +
>
> I would add a comment here explaining why this has to be NULL.
>
> Now that I see this in practice, I'm wondering if we should just
> keep the name here, we don't have any NULL names and do
> something like this in hantro_probe (in patch 6/9):
>
> /* If only one clock, we shouldn't have a clock name. */
> if (vpu->variant->num_clocks > 1) {
> for (i = 0; i < vpu->variant->num_clocks; i++)
> vpu->clocks[i].id = vpu->variant->clk_names[i];
> }
>
Keeping the names within the driver, while doing a num_{clk,irc} in
hantro sounds like the better option. Will send v4 in a few minutes.
Thanks
-Emil
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 9/9] ARM: dts: sama5d4: enable Hantro G1 VDEC
2021-03-31 17:35 [PATCH v3 0/9] Microchip SAMA5D4 VPU support et al Emil Velikov
` (7 preceding siblings ...)
2021-03-31 17:35 ` [PATCH v3 8/9] media: hantro: add initial SAMA5D4 support Emil Velikov
@ 2021-03-31 17:35 ` Emil Velikov
8 siblings, 0 replies; 15+ messages in thread
From: Emil Velikov @ 2021-03-31 17:35 UTC (permalink / raw)
To: kernel, Ezequiel Garcia, Philipp Zabel, Rob Herring, devicetree,
linux-media, linux-rockchip
Cc: emil.l.velikov, Frank Rowand
From: Emil Velikov <emil.velikov@collabora.com>
Add the SAMA5D4 VDEC module which comprises Hantro G1 video decoder
core.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: devicetree@vger.kernel.org
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
v2
- Split out of larger patch (Eze)
- s/Atmel/Microchip/ (Nicolas)
- Drop leading 0 in node name/address
v3
- Drop the clk/irq names (RobH)
---
arch/arm/boot/dts/sama5d4.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 05c55875835d..e47e1ca63043 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -101,6 +101,13 @@ nfc_sram: sram@100000 {
ranges = <0 0x100000 0x2400>;
};
+ vdec0: vdec@300000 {
+ compatible = "microchip,sama5d4-vdec";
+ reg = <0x00300000 0x100000>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+ };
+
usb0: gadget@400000 {
compatible = "atmel,sama5d3-udc";
reg = <0x00400000 0x100000
--
2.31.1
^ permalink raw reply related [flat|nested] 15+ messages in thread