* [PATCH v1 4/4] ARM: dts: add pwm node for r40. @ 2018-01-11 11:34 hao_zhang 2018-01-11 12:47 ` Maxime Ripard 0 siblings, 1 reply; 5+ messages in thread From: hao_zhang @ 2018-01-11 11:34 UTC (permalink / raw) To: thierry.reding, robh+dt, mark.rutland, linux, wens, linus.walleij, maxime.ripard Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel, linux-pwm, hao5781286 This patch add pwm node for r40. Signed-off-by: hao_zhang <hao5781286@gmail.com> --- arch/arm/boot/dts/sun8i-r40.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 173dcc1..84c963c 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -295,6 +295,11 @@ bias-pull-up; }; + pwm_pins: pwm-pins { + pins = "PB2", "PB3"; + function = "pwm"; + }; + uart0_pb_pins: uart0-pb-pins { pins = "PB22", "PB23"; function = "uart0"; @@ -306,6 +311,14 @@ reg = <0x01c20c90 0x10>; }; + pwm: pwm@1c23400 { + compatible = "allwinner,sun8i-r40-pwm"; + reg = <0x01c23400 0x154>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; -- 2.7.4 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v1 4/4] ARM: dts: add pwm node for r40. 2018-01-11 11:34 [PATCH v1 4/4] ARM: dts: add pwm node for r40 hao_zhang @ 2018-01-11 12:47 ` Maxime Ripard 2018-01-14 6:43 ` Hao Zhang 0 siblings, 1 reply; 5+ messages in thread From: Maxime Ripard @ 2018-01-11 12:47 UTC (permalink / raw) To: hao_zhang Cc: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8, linux-I+IVW8TIWO2tmTQ+vhA3Yw, wens-jdAy2FN1RRM, linus.walleij-QSEj5FYQhm4dnm+yROfE0A, linux-gpio-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-pwm-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 901 bytes --] Hi, On Thu, Jan 11, 2018 at 07:34:12PM +0800, hao_zhang wrote: > This patch add pwm node for r40. > > Signed-off-by: hao_zhang <hao5781286-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > --- > arch/arm/boot/dts/sun8i-r40.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi > index 173dcc1..84c963c 100644 > --- a/arch/arm/boot/dts/sun8i-r40.dtsi > +++ b/arch/arm/boot/dts/sun8i-r40.dtsi > @@ -295,6 +295,11 @@ > bias-pull-up; > }; > > + pwm_pins: pwm-pins { > + pins = "PB2", "PB3"; > + function = "pwm"; > + }; > + Is it the only combination of pins that is usable? If so, you can add the pinctrl-0 property directly in the pwm nodes. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 4/4] ARM: dts: add pwm node for r40. 2018-01-11 12:47 ` Maxime Ripard @ 2018-01-14 6:43 ` Hao Zhang 2018-01-15 8:38 ` Maxime Ripard 0 siblings, 1 reply; 5+ messages in thread From: Hao Zhang @ 2018-01-14 6:43 UTC (permalink / raw) To: Maxime Ripard Cc: Thierry Reding, robh+dt, Mark Rutland, linux, Chen-Yu Tsai, Linus Walleij, linux-gpio, open list, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Allwinner sunXi SoC support, linux-pwm 2018-01-11 20:47 GMT+08:00 Maxime Ripard <maxime.ripard@free-electrons.com>: > Hi, > > On Thu, Jan 11, 2018 at 07:34:12PM +0800, hao_zhang wrote: >> This patch add pwm node for r40. >> >> Signed-off-by: hao_zhang <hao5781286@gmail.com> >> --- >> arch/arm/boot/dts/sun8i-r40.dtsi | 13 +++++++++++++ >> 1 file changed, 13 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi >> index 173dcc1..84c963c 100644 >> --- a/arch/arm/boot/dts/sun8i-r40.dtsi >> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi >> @@ -295,6 +295,11 @@ >> bias-pull-up; >> }; >> >> + pwm_pins: pwm-pins { >> + pins = "PB2", "PB3"; >> + function = "pwm"; >> + }; >> + > > Is it the only combination of pins that is usable? > > If so, you can add the pinctrl-0 property directly in the pwm nodes. > There are 8 channel pwm of R40/V40/T3, the pins that can be configed to pwm are: PB2, PB3, PI20, PI21, PB20, PB21, PB9, PB10 PB2, PB3 can be configed on bananapi-m2-ultra and on my T3 board, but the other pins is not exist on the board or some pin is confilct with other functions, so i just add PB2, PB3. but i think split it is better, just like this : pwm0_pin: pwm0-pin { pins = "PB2"; function = "pwm"; }; pwm1_pin: pwm1-pin { pins = "PB3"; function = "pwm"; }; the node of pwm2~7 should also be added here? On sun8i-r40-bananapi-m2-ultra.dts: because of the special customize board, i think just add pinctrl-0 = <&pwm0_pin> (PB3 I just use to test pwm channel 1)for bananapi-m2-ultra board is enough. &pwm { pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; status = "okay"; }; Thanks ;-) Hao Zhang > Thanks! > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 4/4] ARM: dts: add pwm node for r40. 2018-01-14 6:43 ` Hao Zhang @ 2018-01-15 8:38 ` Maxime Ripard 2018-01-15 11:19 ` Hao Zhang 0 siblings, 1 reply; 5+ messages in thread From: Maxime Ripard @ 2018-01-15 8:38 UTC (permalink / raw) To: Hao Zhang Cc: Thierry Reding, robh+dt, Mark Rutland, linux, Chen-Yu Tsai, Linus Walleij, linux-gpio, open list, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Allwinner sunXi SoC support, linux-pwm [-- Attachment #1: Type: text/plain, Size: 2648 bytes --] Hi, On Sun, Jan 14, 2018 at 02:43:39PM +0800, Hao Zhang wrote: > 2018-01-11 20:47 GMT+08:00 Maxime Ripard <maxime.ripard@free-electrons.com>: > > On Thu, Jan 11, 2018 at 07:34:12PM +0800, hao_zhang wrote: > >> This patch add pwm node for r40. > >> > >> Signed-off-by: hao_zhang <hao5781286@gmail.com> > >> --- > >> arch/arm/boot/dts/sun8i-r40.dtsi | 13 +++++++++++++ > >> 1 file changed, 13 insertions(+) > >> > >> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi > >> index 173dcc1..84c963c 100644 > >> --- a/arch/arm/boot/dts/sun8i-r40.dtsi > >> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi > >> @@ -295,6 +295,11 @@ > >> bias-pull-up; > >> }; > >> > >> + pwm_pins: pwm-pins { > >> + pins = "PB2", "PB3"; > >> + function = "pwm"; > >> + }; > >> + > > > > Is it the only combination of pins that is usable? > > > > If so, you can add the pinctrl-0 property directly in the pwm nodes. > > > > There are 8 channel pwm of R40/V40/T3, the pins that can be configed > to pwm are: PB2, PB3, PI20, PI21, PB20, PB21, PB9, PB10 And a single controller, or several of them? > PB2, PB3 can be configed on bananapi-m2-ultra and on my T3 board, > but the other pins is not exist on the board or some pin is confilct > with other functions, so i just add PB2, PB3. but i think split it > is better, just like this : > > pwm0_pin: pwm0-pin { > pins = "PB2"; > function = "pwm"; > }; > > pwm1_pin: pwm1-pin { > pins = "PB3"; > function = "pwm"; > }; Yep, that would be better. If it's just a matter of channels, maybe we can even name them pwm-ch0-pin and pwm-ch1-pin? That would be more explicit. > the node of pwm2~7 should also be added here? If there's no users, no. > On sun8i-r40-bananapi-m2-ultra.dts: > because of the special customize board, i think just add pinctrl-0 = <&pwm0_pin> > (PB3 I just use to test pwm channel 1)for bananapi-m2-ultra board is enough. > > &pwm { > pinctrl-names = "default"; > pinctrl-0 = <&pwm0_pin>; > status = "okay"; > }; It depends if that PWM is used as a PWM all the time (for example to drive a backlight for a panel tied to the board), or if it's exported through one of the generic pin headers, please leave it populated but disabled (with a comment that it is exported on one of the pin of the headers) Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 4/4] ARM: dts: add pwm node for r40. 2018-01-15 8:38 ` Maxime Ripard @ 2018-01-15 11:19 ` Hao Zhang 0 siblings, 0 replies; 5+ messages in thread From: Hao Zhang @ 2018-01-15 11:19 UTC (permalink / raw) To: Maxime Ripard Cc: Thierry Reding, robh+dt, Mark Rutland, linux, Chen-Yu Tsai, Linus Walleij, linux-gpio, open list, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Allwinner sunXi SoC support, linux-pwm 2018-01-15 16:38 GMT+08:00 Maxime Ripard <maxime.ripard@free-electrons.com>: > Hi, > > On Sun, Jan 14, 2018 at 02:43:39PM +0800, Hao Zhang wrote: >> 2018-01-11 20:47 GMT+08:00 Maxime Ripard <maxime.ripard@free-electrons.com>: >> > On Thu, Jan 11, 2018 at 07:34:12PM +0800, hao_zhang wrote: >> >> This patch add pwm node for r40. >> >> >> >> Signed-off-by: hao_zhang <hao5781286@gmail.com> >> >> --- >> >> arch/arm/boot/dts/sun8i-r40.dtsi | 13 +++++++++++++ >> >> 1 file changed, 13 insertions(+) >> >> >> >> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi >> >> index 173dcc1..84c963c 100644 >> >> --- a/arch/arm/boot/dts/sun8i-r40.dtsi >> >> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi >> >> @@ -295,6 +295,11 @@ >> >> bias-pull-up; >> >> }; >> >> >> >> + pwm_pins: pwm-pins { >> >> + pins = "PB2", "PB3"; >> >> + function = "pwm"; >> >> + }; >> >> + >> > >> > Is it the only combination of pins that is usable? >> > >> > If so, you can add the pinctrl-0 property directly in the pwm nodes. >> > >> >> There are 8 channel pwm of R40/V40/T3, the pins that can be configed >> to pwm are: PB2, PB3, PI20, PI21, PB20, PB21, PB9, PB10 > > And a single controller, or several of them? Single controller with 8 channels pwm output. > >> PB2, PB3 can be configed on bananapi-m2-ultra and on my T3 board, >> but the other pins is not exist on the board or some pin is confilct >> with other functions, so i just add PB2, PB3. but i think split it >> is better, just like this : >> >> pwm0_pin: pwm0-pin { >> pins = "PB2"; >> function = "pwm"; >> }; >> >> pwm1_pin: pwm1-pin { >> pins = "PB3"; >> function = "pwm"; >> }; > > Yep, that would be better. If it's just a matter of channels, maybe we > can even name them pwm-ch0-pin and pwm-ch1-pin? That would be more > explicit. > Agree >> the node of pwm2~7 should also be added here? > > If there's no users, no. > >> On sun8i-r40-bananapi-m2-ultra.dts: >> because of the special customize board, i think just add pinctrl-0 = <&pwm0_pin> >> (PB3 I just use to test pwm channel 1)for bananapi-m2-ultra board is enough. >> >> &pwm { >> pinctrl-names = "default"; >> pinctrl-0 = <&pwm0_pin>; >> status = "okay"; >> }; > > It depends if that PWM is used as a PWM all the time (for example to > drive a backlight for a panel tied to the board), or if it's exported > through one of the generic pin headers, please leave it populated but > disabled (with a comment that it is exported on one of the pin of the > headers) > > Thanks! > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-01-15 11:19 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-01-11 11:34 [PATCH v1 4/4] ARM: dts: add pwm node for r40 hao_zhang 2018-01-11 12:47 ` Maxime Ripard 2018-01-14 6:43 ` Hao Zhang 2018-01-15 8:38 ` Maxime Ripard 2018-01-15 11:19 ` Hao Zhang
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