[PATCH v3 1/2] dt-bindings: clocksource: Add Spreadtrum SC9860 timer

[PATCH v3 1/2] dt-bindings: clocksource: Add Spreadtrum SC9860 timer

[Baolin Wang]

This patch adds documentation of device tree bindings for the timers
found on Spreadtrum SC9860 platform.

Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes since v2:
 - No updates.

Changes since v1:
 - Add acked tag from Rob.
---
 .../bindings/timer/spreadtrum,sprd-timer.txt       |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt b/Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt
new file mode 100644
index 0000000..f9d5eb9
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt
@@ -0,0 +1,20 @@
+Spreadtrum timers
+
+The Spreadtrum SC9860 platform provides 3 general-purpose timers.
+These timers can support 32bit or 64bit counter, as well as supporting
+period mode or one-shot mode, and they are can be wakeup source
+during deep sleep.
+
+Required properties:
+- compatible: should be "sprd,sc9860-timer" for SC9860 platform.
+- reg: The register address of the timer device.
+- interrupts: Should contain the interrupt for the timer device.
+- clock-frequency: The frequency of the clock that drives the counter, in Hz.
+
+Example:
+	timer@40050000 {
+		compatible = "sprd,sc9860-timer";
+		reg = <0 0x40050000 0 0x20>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		clock-frequency = <32768>;
+	};
-- 
1.7.9.5

[PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Baolin Wang]

The Spreadtrum SC9860 platform will use the architected timers as local
clock events, but we also need a broadcast timer device to wakeup the
cpus when the cpus are in sleep mode.

The Spreadtrum timer can support 32bit or 64bit counter, as well as
supporting period mode or one-shot mode.

Signed-off-by: Baolin Wang <baolin.wang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
---
Changes since v2:
 - Add more timer description in changelog.
 - Rename the driver file.
 - Remove GENERIC_CLOCKEVENTS and ARCH_SPRD dependency.
 - Remove some redundant headfiles.
 - Use timer-of APIs.
 - Change the license format according to Linus[1][2][3],
 Thomas[4] and Greg[5] comments on the topic.
 [1] https://lkml.org/lkml/2017/11/2/715
 [2] https://lkml.org/lkml/2017/11/25/125
 [3] https://lkml.org/lkml/2017/11/25/133
 [4] https://lkml.org/lkml/2017/11/2/805
 [5] https://lkml.org/lkml/2017/10/19/165

Changes since v1:
 - Change to 32bit counter to avoid build warning.
---
 drivers/clocksource/Kconfig      |    7 ++
 drivers/clocksource/Makefile     |    1 +
 drivers/clocksource/timer-sprd.c |  168 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 176 insertions(+)
 create mode 100644 drivers/clocksource/timer-sprd.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c729a88..9a6b087 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -441,6 +441,13 @@ config MTK_TIMER
 	help
 	  Support for Mediatek timer driver.
 
+config SPRD_TIMER
+	bool "Spreadtrum timer driver" if COMPILE_TEST
+	depends on HAS_IOMEM
+	select TIMER_OF
+	help
+	  Enables the support for the Spreadtrum timer driver.
+
 config SYS_SUPPORTS_SH_MTU2
         bool
 
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 72711f1..d6dec44 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_CLKSRC_TI_32K)	+= timer-ti-32k.o
 obj-$(CONFIG_CLKSRC_NPS)	+= timer-nps.o
 obj-$(CONFIG_OXNAS_RPS_TIMER)	+= timer-oxnas-rps.o
 obj-$(CONFIG_OWL_TIMER)		+= owl-timer.o
+obj-$(CONFIG_SPRD_TIMER)	+= timer-sprd.o
 
 obj-$(CONFIG_ARC_TIMERS)		+= arc_timer.o
 obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
diff --git a/drivers/clocksource/timer-sprd.c b/drivers/clocksource/timer-sprd.c
new file mode 100644
index 0000000..81a5f0c
--- /dev/null
+++ b/drivers/clocksource/timer-sprd.c
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Spreadtrum Communications Inc.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+
+#include "timer-of.h"
+
+#define TIMER_NAME		"sprd_timer"
+
+#define TIMER_LOAD_LO		0x0
+#define TIMER_LOAD_HI		0x4
+#define TIMER_VALUE_LO		0x8
+#define TIMER_VALUE_HI		0xc
+
+#define TIMER_CTL		0x10
+#define TIMER_CTL_PERIOD_MODE	BIT(0)
+#define TIMER_CTL_ENABLE	BIT(1)
+#define TIMER_CTL_64BIT_WIDTH	BIT(16)
+
+#define TIMER_INT		0x14
+#define TIMER_INT_EN		BIT(0)
+#define TIMER_INT_RAW_STS	BIT(1)
+#define TIMER_INT_MASK_STS	BIT(2)
+#define TIMER_INT_CLR		BIT(3)
+
+#define TIMER_VALUE_SHDW_LO	0x18
+#define TIMER_VALUE_SHDW_HI	0x1c
+
+#define TIMER_VALUE_LO_MASK	GENMASK(31, 0)
+
+static void sprd_timer_enable(void __iomem *base, u32 flag)
+{
+	u32 val = readl_relaxed(base + TIMER_CTL);
+
+	val |= TIMER_CTL_ENABLE;
+	if (flag & TIMER_CTL_64BIT_WIDTH)
+		val |= TIMER_CTL_64BIT_WIDTH;
+	else
+		val &= ~TIMER_CTL_64BIT_WIDTH;
+
+	if (flag & TIMER_CTL_PERIOD_MODE)
+		val |= TIMER_CTL_PERIOD_MODE;
+	else
+		val &= ~TIMER_CTL_PERIOD_MODE;
+
+	writel_relaxed(val, base + TIMER_CTL);
+}
+
+static void sprd_timer_disable(void __iomem *base)
+{
+	u32 val = readl_relaxed(base + TIMER_CTL);
+
+	val &= ~TIMER_CTL_ENABLE;
+	writel_relaxed(val, base + TIMER_CTL);
+}
+
+static void sprd_timer_update_counter(void __iomem *base, unsigned long cycles)
+{
+	writel_relaxed(cycles & TIMER_VALUE_LO_MASK, base + TIMER_LOAD_LO);
+	writel_relaxed(0, base + TIMER_LOAD_HI);
+}
+
+static void sprd_timer_enable_interrupt(void __iomem *base)
+{
+	writel_relaxed(TIMER_INT_EN, base + TIMER_INT);
+}
+
+static void sprd_timer_clear_interrupt(void __iomem *base)
+{
+	u32 val = readl_relaxed(base + TIMER_INT);
+
+	val |= TIMER_INT_CLR;
+	writel_relaxed(val, base + TIMER_INT);
+}
+
+static int sprd_timer_set_next_event(unsigned long cycles,
+				     struct clock_event_device *ce)
+{
+	struct timer_of *to = to_timer_of(ce);
+
+	sprd_timer_disable(timer_of_base(to));
+	sprd_timer_update_counter(timer_of_base(to), cycles);
+	sprd_timer_enable(timer_of_base(to), 0);
+
+	return 0;
+}
+
+static int sprd_timer_set_periodic(struct clock_event_device *ce)
+{
+	struct timer_of *to = to_timer_of(ce);
+
+	sprd_timer_disable(timer_of_base(to));
+	sprd_timer_update_counter(timer_of_base(to), timer_of_period(to));
+	sprd_timer_enable(timer_of_base(to), TIMER_CTL_PERIOD_MODE);
+
+	return 0;
+}
+
+static int sprd_timer_shutdown(struct clock_event_device *ce)
+{
+	struct timer_of *to = to_timer_of(ce);
+
+	sprd_timer_disable(timer_of_base(to));
+	return 0;
+}
+
+static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
+{
+	struct clock_event_device *ce = (struct clock_event_device *)dev_id;
+	struct timer_of *to = to_timer_of(ce);
+
+	sprd_timer_clear_interrupt(timer_of_base(to));
+
+	if (clockevent_state_oneshot(ce))
+		sprd_timer_disable(timer_of_base(to));
+
+	ce->event_handler(ce);
+	return IRQ_HANDLED;
+}
+
+static struct timer_of to = {
+	.flags = TIMER_OF_IRQ | TIMER_OF_BASE,
+
+	.clkevt = {
+		.name = TIMER_NAME,
+		.rating = 300,
+		.features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_PERIODIC |
+			CLOCK_EVT_FEAT_ONESHOT,
+		.set_state_shutdown = sprd_timer_shutdown,
+		.set_state_periodic = sprd_timer_set_periodic,
+		.set_next_event = sprd_timer_set_next_event,
+		.cpumask = cpu_possible_mask,
+	},
+
+	.of_irq = {
+		.handler = sprd_timer_interrupt,
+		.flags = IRQF_TIMER | IRQF_IRQPOLL,
+	},
+};
+
+static int __init sprd_timer_init(struct device_node *np)
+{
+	int ret;
+	u32 freq;
+
+	ret = timer_of_init(np, &to);
+	if (ret)
+		return ret;
+
+	ret = of_property_read_u32(np, "clock-frequency", &freq);
+	if (ret) {
+		pr_err("failed to get clock frequency\n");
+		timer_of_cleanup(&to);
+		return ret;
+	}
+
+	to.of_clk.period = DIV_ROUND_UP(freq, HZ);
+
+	sprd_timer_enable_interrupt(timer_of_base(&to));
+	clockevents_config_and_register(&to.clkevt, freq, 1, UINT_MAX);
+
+	return 0;
+}
+
+TIMER_OF_DECLARE(sc9860_timer, "sprd,sc9860-timer", sprd_timer_init);
-- 
1.7.9.5

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Re: [PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Daniel Lezcano]

On 08/12/2017 06:03, Baolin Wang wrote:
> The Spreadtrum SC9860 platform will use the architected timers as local
> clock events, but we also need a broadcast timer device to wakeup the
> cpus when the cpus are in sleep mode.
> 
> The Spreadtrum timer can support 32bit or 64bit counter, as well as
> supporting period mode or one-shot mode.
> 
> Signed-off-by: Baolin Wang <baolin.wang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
> ---
> Changes since v2:
>  - Add more timer description in changelog.
>  - Rename the driver file.
>  - Remove GENERIC_CLOCKEVENTS and ARCH_SPRD dependency.
>  - Remove some redundant headfiles.
>  - Use timer-of APIs.
>  - Change the license format according to Linus[1][2][3],
>  Thomas[4] and Greg[5] comments on the topic.
>  [1] https://lkml.org/lkml/2017/11/2/715
>  [2] https://lkml.org/lkml/2017/11/25/125
>  [3] https://lkml.org/lkml/2017/11/25/133
>  [4] https://lkml.org/lkml/2017/11/2/805
>  [5] https://lkml.org/lkml/2017/10/19/165
> 
> Changes since v1:
>  - Change to 32bit counter to avoid build warning.
> ---
>  drivers/clocksource/Kconfig      |    7 ++
>  drivers/clocksource/Makefile     |    1 +
>  drivers/clocksource/timer-sprd.c |  168 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 176 insertions(+)
>  create mode 100644 drivers/clocksource/timer-sprd.c
> 
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index c729a88..9a6b087 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -441,6 +441,13 @@ config MTK_TIMER
>  	help
>  	  Support for Mediatek timer driver.
>  
> +config SPRD_TIMER
> +	bool "Spreadtrum timer driver" if COMPILE_TEST
> +	depends on HAS_IOMEM
> +	select TIMER_OF
> +	help
> +	  Enables the support for the Spreadtrum timer driver.
> +
>  config SYS_SUPPORTS_SH_MTU2
>          bool
>  
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 72711f1..d6dec44 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -54,6 +54,7 @@ obj-$(CONFIG_CLKSRC_TI_32K)	+= timer-ti-32k.o
>  obj-$(CONFIG_CLKSRC_NPS)	+= timer-nps.o
>  obj-$(CONFIG_OXNAS_RPS_TIMER)	+= timer-oxnas-rps.o
>  obj-$(CONFIG_OWL_TIMER)		+= owl-timer.o
> +obj-$(CONFIG_SPRD_TIMER)	+= timer-sprd.o
>  
>  obj-$(CONFIG_ARC_TIMERS)		+= arc_timer.o
>  obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
> diff --git a/drivers/clocksource/timer-sprd.c b/drivers/clocksource/timer-sprd.c
> new file mode 100644
> index 0000000..81a5f0c
> --- /dev/null
> +++ b/drivers/clocksource/timer-sprd.c
> @@ -0,0 +1,168 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2017 Spreadtrum Communications Inc.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/interrupt.h>
> +
> +#include "timer-of.h"
> +
> +#define TIMER_NAME		"sprd_timer"
> +
> +#define TIMER_LOAD_LO		0x0
> +#define TIMER_LOAD_HI		0x4
> +#define TIMER_VALUE_LO		0x8
> +#define TIMER_VALUE_HI		0xc
> +
> +#define TIMER_CTL		0x10
> +#define TIMER_CTL_PERIOD_MODE	BIT(0)
> +#define TIMER_CTL_ENABLE	BIT(1)
> +#define TIMER_CTL_64BIT_WIDTH	BIT(16)
> +
> +#define TIMER_INT		0x14
> +#define TIMER_INT_EN		BIT(0)
> +#define TIMER_INT_RAW_STS	BIT(1)
> +#define TIMER_INT_MASK_STS	BIT(2)
> +#define TIMER_INT_CLR		BIT(3)
> +
> +#define TIMER_VALUE_SHDW_LO	0x18
> +#define TIMER_VALUE_SHDW_HI	0x1c
> +
> +#define TIMER_VALUE_LO_MASK	GENMASK(31, 0)
> +
> +static void sprd_timer_enable(void __iomem *base, u32 flag)
> +{
> +	u32 val = readl_relaxed(base + TIMER_CTL);
> +
> +	val |= TIMER_CTL_ENABLE;
> +	if (flag & TIMER_CTL_64BIT_WIDTH)
> +		val |= TIMER_CTL_64BIT_WIDTH;
> +	else
> +		val &= ~TIMER_CTL_64BIT_WIDTH;
> +
> +	if (flag & TIMER_CTL_PERIOD_MODE)
> +		val |= TIMER_CTL_PERIOD_MODE;
> +	else
> +		val &= ~TIMER_CTL_PERIOD_MODE;
> +
> +	writel_relaxed(val, base + TIMER_CTL);
> +}
> +
> +static void sprd_timer_disable(void __iomem *base)
> +{
> +	u32 val = readl_relaxed(base + TIMER_CTL);
> +
> +	val &= ~TIMER_CTL_ENABLE;
> +	writel_relaxed(val, base + TIMER_CTL);
> +}
> +
> +static void sprd_timer_update_counter(void __iomem *base, unsigned long cycles)
> +{
> +	writel_relaxed(cycles & TIMER_VALUE_LO_MASK, base + TIMER_LOAD_LO);
> +	writel_relaxed(0, base + TIMER_LOAD_HI);
> +}
> +
> +static void sprd_timer_enable_interrupt(void __iomem *base)
> +{
> +	writel_relaxed(TIMER_INT_EN, base + TIMER_INT);
> +}
> +
> +static void sprd_timer_clear_interrupt(void __iomem *base)
> +{
> +	u32 val = readl_relaxed(base + TIMER_INT);
> +
> +	val |= TIMER_INT_CLR;
> +	writel_relaxed(val, base + TIMER_INT);
> +}
> +
> +static int sprd_timer_set_next_event(unsigned long cycles,
> +				     struct clock_event_device *ce)
> +{
> +	struct timer_of *to = to_timer_of(ce);
> +
> +	sprd_timer_disable(timer_of_base(to));
> +	sprd_timer_update_counter(timer_of_base(to), cycles);
> +	sprd_timer_enable(timer_of_base(to), 0);
> +
> +	return 0;
> +}
> +
> +static int sprd_timer_set_periodic(struct clock_event_device *ce)
> +{
> +	struct timer_of *to = to_timer_of(ce);
> +
> +	sprd_timer_disable(timer_of_base(to));
> +	sprd_timer_update_counter(timer_of_base(to), timer_of_period(to));
> +	sprd_timer_enable(timer_of_base(to), TIMER_CTL_PERIOD_MODE);
> +
> +	return 0;
> +}
> +
> +static int sprd_timer_shutdown(struct clock_event_device *ce)
> +{
> +	struct timer_of *to = to_timer_of(ce);
> +
> +	sprd_timer_disable(timer_of_base(to));
> +	return 0;
> +}
> +
> +static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
> +{
> +	struct clock_event_device *ce = (struct clock_event_device *)dev_id;
> +	struct timer_of *to = to_timer_of(ce);
> +
> +	sprd_timer_clear_interrupt(timer_of_base(to));
> +
> +	if (clockevent_state_oneshot(ce))
> +		sprd_timer_disable(timer_of_base(to));
> +
> +	ce->event_handler(ce);
> +	return IRQ_HANDLED;
> +}
> +
> +static struct timer_of to = {
> +	.flags = TIMER_OF_IRQ | TIMER_OF_BASE,

Why not the TIMER_OF_CLOCK ?

> +
> +	.clkevt = {
> +		.name = TIMER_NAME,
> +		.rating = 300,
> +		.features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_PERIODIC |
> +			CLOCK_EVT_FEAT_ONESHOT,
> +		.set_state_shutdown = sprd_timer_shutdown,
> +		.set_state_periodic = sprd_timer_set_periodic,
> +		.set_next_event = sprd_timer_set_next_event,
> +		.cpumask = cpu_possible_mask,
> +	},
> +
> +	.of_irq = {
> +		.handler = sprd_timer_interrupt,
> +		.flags = IRQF_TIMER | IRQF_IRQPOLL,
> +	},
> +};
> +
> +static int __init sprd_timer_init(struct device_node *np)
> +{
> +	int ret;
> +	u32 freq;
> +
> +	ret = timer_of_init(np, &to);
> +	if (ret)
> +		return ret;
> +
> +	ret = of_property_read_u32(np, "clock-frequency", &freq);
> +	if (ret) {
> +		pr_err("failed to get clock frequency\n");
> +		timer_of_cleanup(&to);
> +		return ret;
> +	}
> +
> +	to.of_clk.period = DIV_ROUND_UP(freq, HZ);
> +
> +	sprd_timer_enable_interrupt(timer_of_base(&to));
> +	clockevents_config_and_register(&to.clkevt, freq, 1, UINT_MAX);
> +
> +	return 0;
> +}
> +
> +TIMER_OF_DECLARE(sc9860_timer, "sprd,sc9860-timer", sprd_timer_init);
> 


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Re: [PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Baolin Wang]

Hi Daniel,

On 8 December 2017 at 14:58, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
> On 08/12/2017 06:03, Baolin Wang wrote:
>> The Spreadtrum SC9860 platform will use the architected timers as local
>> clock events, but we also need a broadcast timer device to wakeup the
>> cpus when the cpus are in sleep mode.
>>
>> The Spreadtrum timer can support 32bit or 64bit counter, as well as
>> supporting period mode or one-shot mode.
>>
>> Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com>
>> ---
>> Changes since v2:
>>  - Add more timer description in changelog.
>>  - Rename the driver file.
>>  - Remove GENERIC_CLOCKEVENTS and ARCH_SPRD dependency.
>>  - Remove some redundant headfiles.
>>  - Use timer-of APIs.
>>  - Change the license format according to Linus[1][2][3],
>>  Thomas[4] and Greg[5] comments on the topic.
>>  [1] https://lkml.org/lkml/2017/11/2/715
>>  [2] https://lkml.org/lkml/2017/11/25/125
>>  [3] https://lkml.org/lkml/2017/11/25/133
>>  [4] https://lkml.org/lkml/2017/11/2/805
>>  [5] https://lkml.org/lkml/2017/10/19/165
>>
>> Changes since v1:
>>  - Change to 32bit counter to avoid build warning.
>> ---
>>  drivers/clocksource/Kconfig      |    7 ++
>>  drivers/clocksource/Makefile     |    1 +
>>  drivers/clocksource/timer-sprd.c |  168 ++++++++++++++++++++++++++++++++++++++
>>  3 files changed, 176 insertions(+)
>>  create mode 100644 drivers/clocksource/timer-sprd.c
>>
>> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
>> index c729a88..9a6b087 100644
>> --- a/drivers/clocksource/Kconfig
>> +++ b/drivers/clocksource/Kconfig
>> @@ -441,6 +441,13 @@ config MTK_TIMER
>>       help
>>         Support for Mediatek timer driver.
>>
>> +config SPRD_TIMER
>> +     bool "Spreadtrum timer driver" if COMPILE_TEST
>> +     depends on HAS_IOMEM
>> +     select TIMER_OF
>> +     help
>> +       Enables the support for the Spreadtrum timer driver.
>> +
>>  config SYS_SUPPORTS_SH_MTU2
>>          bool
>>
>> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
>> index 72711f1..d6dec44 100644
>> --- a/drivers/clocksource/Makefile
>> +++ b/drivers/clocksource/Makefile
>> @@ -54,6 +54,7 @@ obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o
>>  obj-$(CONFIG_CLKSRC_NPS)     += timer-nps.o
>>  obj-$(CONFIG_OXNAS_RPS_TIMER)        += timer-oxnas-rps.o
>>  obj-$(CONFIG_OWL_TIMER)              += owl-timer.o
>> +obj-$(CONFIG_SPRD_TIMER)     += timer-sprd.o
>>
>>  obj-$(CONFIG_ARC_TIMERS)             += arc_timer.o
>>  obj-$(CONFIG_ARM_ARCH_TIMER)         += arm_arch_timer.o
>> diff --git a/drivers/clocksource/timer-sprd.c b/drivers/clocksource/timer-sprd.c
>> new file mode 100644
>> index 0000000..81a5f0c
>> --- /dev/null
>> +++ b/drivers/clocksource/timer-sprd.c
>> @@ -0,0 +1,168 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2017 Spreadtrum Communications Inc.
>> + */
>> +
>> +#include <linux/init.h>
>> +#include <linux/interrupt.h>
>> +
>> +#include "timer-of.h"
>> +
>> +#define TIMER_NAME           "sprd_timer"
>> +
>> +#define TIMER_LOAD_LO                0x0
>> +#define TIMER_LOAD_HI                0x4
>> +#define TIMER_VALUE_LO               0x8
>> +#define TIMER_VALUE_HI               0xc
>> +
>> +#define TIMER_CTL            0x10
>> +#define TIMER_CTL_PERIOD_MODE        BIT(0)
>> +#define TIMER_CTL_ENABLE     BIT(1)
>> +#define TIMER_CTL_64BIT_WIDTH        BIT(16)
>> +
>> +#define TIMER_INT            0x14
>> +#define TIMER_INT_EN         BIT(0)
>> +#define TIMER_INT_RAW_STS    BIT(1)
>> +#define TIMER_INT_MASK_STS   BIT(2)
>> +#define TIMER_INT_CLR                BIT(3)
>> +
>> +#define TIMER_VALUE_SHDW_LO  0x18
>> +#define TIMER_VALUE_SHDW_HI  0x1c
>> +
>> +#define TIMER_VALUE_LO_MASK  GENMASK(31, 0)
>> +
>> +static void sprd_timer_enable(void __iomem *base, u32 flag)
>> +{
>> +     u32 val = readl_relaxed(base + TIMER_CTL);
>> +
>> +     val |= TIMER_CTL_ENABLE;
>> +     if (flag & TIMER_CTL_64BIT_WIDTH)
>> +             val |= TIMER_CTL_64BIT_WIDTH;
>> +     else
>> +             val &= ~TIMER_CTL_64BIT_WIDTH;
>> +
>> +     if (flag & TIMER_CTL_PERIOD_MODE)
>> +             val |= TIMER_CTL_PERIOD_MODE;
>> +     else
>> +             val &= ~TIMER_CTL_PERIOD_MODE;
>> +
>> +     writel_relaxed(val, base + TIMER_CTL);
>> +}
>> +
>> +static void sprd_timer_disable(void __iomem *base)
>> +{
>> +     u32 val = readl_relaxed(base + TIMER_CTL);
>> +
>> +     val &= ~TIMER_CTL_ENABLE;
>> +     writel_relaxed(val, base + TIMER_CTL);
>> +}
>> +
>> +static void sprd_timer_update_counter(void __iomem *base, unsigned long cycles)
>> +{
>> +     writel_relaxed(cycles & TIMER_VALUE_LO_MASK, base + TIMER_LOAD_LO);
>> +     writel_relaxed(0, base + TIMER_LOAD_HI);
>> +}
>> +
>> +static void sprd_timer_enable_interrupt(void __iomem *base)
>> +{
>> +     writel_relaxed(TIMER_INT_EN, base + TIMER_INT);
>> +}
>> +
>> +static void sprd_timer_clear_interrupt(void __iomem *base)
>> +{
>> +     u32 val = readl_relaxed(base + TIMER_INT);
>> +
>> +     val |= TIMER_INT_CLR;
>> +     writel_relaxed(val, base + TIMER_INT);
>> +}
>> +
>> +static int sprd_timer_set_next_event(unsigned long cycles,
>> +                                  struct clock_event_device *ce)
>> +{
>> +     struct timer_of *to = to_timer_of(ce);
>> +
>> +     sprd_timer_disable(timer_of_base(to));
>> +     sprd_timer_update_counter(timer_of_base(to), cycles);
>> +     sprd_timer_enable(timer_of_base(to), 0);
>> +
>> +     return 0;
>> +}
>> +
>> +static int sprd_timer_set_periodic(struct clock_event_device *ce)
>> +{
>> +     struct timer_of *to = to_timer_of(ce);
>> +
>> +     sprd_timer_disable(timer_of_base(to));
>> +     sprd_timer_update_counter(timer_of_base(to), timer_of_period(to));
>> +     sprd_timer_enable(timer_of_base(to), TIMER_CTL_PERIOD_MODE);
>> +
>> +     return 0;
>> +}
>> +
>> +static int sprd_timer_shutdown(struct clock_event_device *ce)
>> +{
>> +     struct timer_of *to = to_timer_of(ce);
>> +
>> +     sprd_timer_disable(timer_of_base(to));
>> +     return 0;
>> +}
>> +
>> +static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
>> +{
>> +     struct clock_event_device *ce = (struct clock_event_device *)dev_id;
>> +     struct timer_of *to = to_timer_of(ce);
>> +
>> +     sprd_timer_clear_interrupt(timer_of_base(to));
>> +
>> +     if (clockevent_state_oneshot(ce))
>> +             sprd_timer_disable(timer_of_base(to));
>> +
>> +     ce->event_handler(ce);
>> +     return IRQ_HANDLED;
>> +}
>> +
>> +static struct timer_of to = {
>> +     .flags = TIMER_OF_IRQ | TIMER_OF_BASE,
>
> Why not the TIMER_OF_CLOCK ?

The timer's clock is fixed to 32.768K and no need to divide the
frequency, so our clock tree does not supply the timer's clock now.

>> +
>> +     .clkevt = {
>> +             .name = TIMER_NAME,
>> +             .rating = 300,
>> +             .features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_PERIODIC |
>> +                     CLOCK_EVT_FEAT_ONESHOT,
>> +             .set_state_shutdown = sprd_timer_shutdown,
>> +             .set_state_periodic = sprd_timer_set_periodic,
>> +             .set_next_event = sprd_timer_set_next_event,
>> +             .cpumask = cpu_possible_mask,
>> +     },
>> +
>> +     .of_irq = {
>> +             .handler = sprd_timer_interrupt,
>> +             .flags = IRQF_TIMER | IRQF_IRQPOLL,
>> +     },
>> +};
>> +
>> +static int __init sprd_timer_init(struct device_node *np)
>> +{
>> +     int ret;
>> +     u32 freq;
>> +
>> +     ret = timer_of_init(np, &to);
>> +     if (ret)
>> +             return ret;
>> +
>> +     ret = of_property_read_u32(np, "clock-frequency", &freq);
>> +     if (ret) {
>> +             pr_err("failed to get clock frequency\n");
>> +             timer_of_cleanup(&to);
>> +             return ret;
>> +     }
>> +
>> +     to.of_clk.period = DIV_ROUND_UP(freq, HZ);
>> +
>> +     sprd_timer_enable_interrupt(timer_of_base(&to));
>> +     clockevents_config_and_register(&to.clkevt, freq, 1, UINT_MAX);
>> +
>> +     return 0;
>> +}
>> +
>> +TIMER_OF_DECLARE(sc9860_timer, "sprd,sc9860-timer", sprd_timer_init);
>>

-- 
Baolin.wang
Best Regards

Re: [PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Daniel Lezcano]

Hi Baolin,


On 08/12/2017 09:20, Baolin Wang wrote:

[ ... ]

>>> +static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
>>> +{
>>> +     struct clock_event_device *ce = (struct clock_event_device *)dev_id;
>>> +     struct timer_of *to = to_timer_of(ce);
>>> +
>>> +     sprd_timer_clear_interrupt(timer_of_base(to));
>>> +
>>> +     if (clockevent_state_oneshot(ce))
>>> +             sprd_timer_disable(timer_of_base(to));
>>> +
>>> +     ce->event_handler(ce);
>>> +     return IRQ_HANDLED;
>>> +}
>>> +
>>> +static struct timer_of to = {
>>> +     .flags = TIMER_OF_IRQ | TIMER_OF_BASE,
>>
>> Why not the TIMER_OF_CLOCK ?
> 
> The timer's clock is fixed to 32.768K and no need to divide the
> frequency, so our clock tree does not supply the timer's clock now.

The driver is fine. However, I would like to unify the clk usage in the
timer driver, so if you refer to a clock so the TIMER_OF_CLOCK can be
used, that will nice.



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Re: [PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Baolin Wang]

Hi Daniel,

On 12 December 2017 at 17:16, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
>
> Hi Baolin,
>
>
> On 08/12/2017 09:20, Baolin Wang wrote:
>
> [ ... ]
>
>>>> +static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
>>>> +{
>>>> +     struct clock_event_device *ce = (struct clock_event_device *)dev_id;
>>>> +     struct timer_of *to = to_timer_of(ce);
>>>> +
>>>> +     sprd_timer_clear_interrupt(timer_of_base(to));
>>>> +
>>>> +     if (clockevent_state_oneshot(ce))
>>>> +             sprd_timer_disable(timer_of_base(to));
>>>> +
>>>> +     ce->event_handler(ce);
>>>> +     return IRQ_HANDLED;
>>>> +}
>>>> +
>>>> +static struct timer_of to = {
>>>> +     .flags = TIMER_OF_IRQ | TIMER_OF_BASE,
>>>
>>> Why not the TIMER_OF_CLOCK ?
>>
>> The timer's clock is fixed to 32.768K and no need to divide the
>> frequency, so our clock tree does not supply the timer's clock now.
>
> The driver is fine. However, I would like to unify the clk usage in the
> timer driver, so if you refer to a clock so the TIMER_OF_CLOCK can be
> used, that will nice.

I understand your concern, but I've asked our clock driver owner in
Spreadtrum, we have no related registers to describe the topology of
the RTC fixed 32.768K, so the clock driver can not add timer's clock
node.

-- 
Baolin.wang
Best Regards

Re: [PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Baolin Wang]

Hi Daniel,

On 12 December 2017 at 17:26, Baolin Wang <baolin.wang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> Hi Daniel,
>
> On 12 December 2017 at 17:16, Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>>
>> Hi Baolin,
>>
>>
>> On 08/12/2017 09:20, Baolin Wang wrote:
>>
>> [ ... ]
>>
>>>>> +static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
>>>>> +{
>>>>> +     struct clock_event_device *ce = (struct clock_event_device *)dev_id;
>>>>> +     struct timer_of *to = to_timer_of(ce);
>>>>> +
>>>>> +     sprd_timer_clear_interrupt(timer_of_base(to));
>>>>> +
>>>>> +     if (clockevent_state_oneshot(ce))
>>>>> +             sprd_timer_disable(timer_of_base(to));
>>>>> +
>>>>> +     ce->event_handler(ce);
>>>>> +     return IRQ_HANDLED;
>>>>> +}
>>>>> +
>>>>> +static struct timer_of to = {
>>>>> +     .flags = TIMER_OF_IRQ | TIMER_OF_BASE,
>>>>
>>>> Why not the TIMER_OF_CLOCK ?
>>>
>>> The timer's clock is fixed to 32.768K and no need to divide the
>>> frequency, so our clock tree does not supply the timer's clock now.
>>
>> The driver is fine. However, I would like to unify the clk usage in the
>> timer driver, so if you refer to a clock so the TIMER_OF_CLOCK can be
>> used, that will nice.
>
> I understand your concern, but I've asked our clock driver owner in
> Spreadtrum, we have no related registers to describe the topology of
> the RTC fixed 32.768K, so the clock driver can not add timer's clock
> node.

Sorry for my misunderstanding, I confirmed with Chunyan (who
upstreamed our clock driver), she told me that we can get the clock
rate from clock node. I will fix this issue in next version. Thanks
for your comments.

-- 
Baolin.wang
Best Regards
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Re: [PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Daniel Lezcano]

On 12/12/2017 10:41, Baolin Wang wrote:
> Hi Daniel,
> 
> On 12 December 2017 at 17:26, Baolin Wang <baolin.wang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> Hi Daniel,
>>
>> On 12 December 2017 at 17:16, Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>>>
>>> Hi Baolin,
>>>
>>>
>>> On 08/12/2017 09:20, Baolin Wang wrote:
>>>
>>> [ ... ]
>>>
>>>>>> +static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
>>>>>> +{
>>>>>> +     struct clock_event_device *ce = (struct clock_event_device *)dev_id;
>>>>>> +     struct timer_of *to = to_timer_of(ce);
>>>>>> +
>>>>>> +     sprd_timer_clear_interrupt(timer_of_base(to));
>>>>>> +
>>>>>> +     if (clockevent_state_oneshot(ce))
>>>>>> +             sprd_timer_disable(timer_of_base(to));
>>>>>> +
>>>>>> +     ce->event_handler(ce);
>>>>>> +     return IRQ_HANDLED;
>>>>>> +}
>>>>>> +
>>>>>> +static struct timer_of to = {
>>>>>> +     .flags = TIMER_OF_IRQ | TIMER_OF_BASE,
>>>>>
>>>>> Why not the TIMER_OF_CLOCK ?
>>>>
>>>> The timer's clock is fixed to 32.768K and no need to divide the
>>>> frequency, so our clock tree does not supply the timer's clock now.
>>>
>>> The driver is fine. However, I would like to unify the clk usage in the
>>> timer driver, so if you refer to a clock so the TIMER_OF_CLOCK can be
>>> used, that will nice.
>>
>> I understand your concern, but I've asked our clock driver owner in
>> Spreadtrum, we have no related registers to describe the topology of
>> the RTC fixed 32.768K, so the clock driver can not add timer's clock
>> node.
> 
> Sorry for my misunderstanding, I confirmed with Chunyan (who
> upstreamed our clock driver), she told me that we can get the clock
> rate from clock node. I will fix this issue in next version. Thanks
> for your comments.

Great, thanks Baolin.


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Re: [PATCH v3 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform

[Arnd Bergmann]

On Tue, Dec 12, 2017 at 10:26 AM, Baolin Wang <baolin.wang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> On 12 December 2017 at 17:16, Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> On 08/12/2017 09:20, Baolin Wang wrote:
>>>>> +static irqreturn_t sprd_timer_interrupt(int irq, void *dev_id)
>>>>> +{
>>>>> +     struct clock_event_device *ce = (struct clock_event_device *)dev_id;
>>>>> +     struct timer_of *to = to_timer_of(ce);
>>>>> +
>>>>> +     sprd_timer_clear_interrupt(timer_of_base(to));
>>>>> +
>>>>> +     if (clockevent_state_oneshot(ce))
>>>>> +             sprd_timer_disable(timer_of_base(to));
>>>>> +
>>>>> +     ce->event_handler(ce);
>>>>> +     return IRQ_HANDLED;
>>>>> +}
>>>>> +
>>>>> +static struct timer_of to = {
>>>>> +     .flags = TIMER_OF_IRQ | TIMER_OF_BASE,
>>>>
>>>> Why not the TIMER_OF_CLOCK ?
>>>
>>> The timer's clock is fixed to 32.768K and no need to divide the
>>> frequency, so our clock tree does not supply the timer's clock now.
>>
>> The driver is fine. However, I would like to unify the clk usage in the
>> timer driver, so if you refer to a clock so the TIMER_OF_CLOCK can be
>> used, that will nice.
>
> I understand your concern, but I've asked our clock driver owner in
> Spreadtrum, we have no related registers to describe the topology of
> the RTC fixed 32.768K, so the clock driver can not add timer's clock
> node.

I think you can easily put a separate DT node in the tree with
compatible="fixed-clock". This will be available during early boot,
and interpreted by setting TIMER_OF_CLOCK.

       Arnd
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