* [PATCH 0/5] arch: arm64: imx:patches for FEC
@ 2020-11-19 9:52 Joakim Zhang
2020-11-19 9:52 ` [PATCH 1/5] arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet Joakim Zhang
` (5 more replies)
0 siblings, 6 replies; 12+ messages in thread
From: Joakim Zhang @ 2020-11-19 9:52 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam; +Cc: devicetree, linux-imx, fugang.duan
Some improve patches for i.MX FEC.
Joakim Zhang (5):
arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet
arch: arm64: imx8mm/n/p: correct assigned clocks for FEC
arch: arm64: dts: imx8mq: assign clock parents for FEC
arch: arm64: dts: imx8mq/m/n/p: add mac address for FEC
arch: arm64: dts: imx8mq/m/n/p: add fsl,stop-mode property for FEC
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 1 +
arch/arm/boot/dts/imx6sx-sdb.dtsi | 2 ++
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 15 ++++++++++++---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 15 ++++++++++++---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 15 ++++++++++++---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 17 +++++++++++++++++
7 files changed, 58 insertions(+), 9 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/5] arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet
2020-11-19 9:52 [PATCH 0/5] arch: arm64: imx:patches for FEC Joakim Zhang
@ 2020-11-19 9:52 ` Joakim Zhang
2021-01-05 0:33 ` Shawn Guo
2020-11-19 9:52 ` [PATCH 2/5] arch: arm64: imx8mm/n/p: correct assigned clocks for FEC Joakim Zhang
` (4 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Joakim Zhang @ 2020-11-19 9:52 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam; +Cc: devicetree, linux-imx, fugang.duan
Add wakeup support via magic packet on i.MX platforms.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 1 +
arch/arm/boot/dts/imx6sx-sdb.dtsi | 2 ++
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
3 files changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index afe477f32984..5e58740d40c5 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -298,6 +298,7 @@
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
+ fsl,magic-packet;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index 1351d7f70a54..c6e85e4a0883 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -206,6 +206,7 @@
phy-mode = "rgmii-id";
phy-handle = <ðphy1>;
phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
+ fsl,magic-packet;
status = "okay";
mdio {
@@ -227,6 +228,7 @@
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rgmii-id";
phy-handle = <ðphy2>;
+ fsl,magic-packet;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 9d3411cc597b..afeec01f6522 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -538,6 +538,7 @@
fsl,num-tx-queues = <1>;
fsl,num-rx-queues = <1>;
fsl,stop-mode = <&gpr 0x10 4>;
+ fsl,magic-packet;
status = "disabled";
};
@@ -885,6 +886,7 @@
fsl,num-tx-queues = <1>;
fsl,num-rx-queues = <1>;
fsl,stop-mode = <&gpr 0x10 3>;
+ fsl,magic-packet;
status = "disabled";
};
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/5] arch: arm64: imx8mm/n/p: correct assigned clocks for FEC
2020-11-19 9:52 [PATCH 0/5] arch: arm64: imx:patches for FEC Joakim Zhang
2020-11-19 9:52 ` [PATCH 1/5] arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet Joakim Zhang
@ 2020-11-19 9:52 ` Joakim Zhang
2021-01-05 0:34 ` Shawn Guo
2020-11-19 9:52 ` [PATCH 3/5] arch: arm64: dts: imx8mq: assign clock parents " Joakim Zhang
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Joakim Zhang @ 2020-11-19 9:52 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam; +Cc: devicetree, linux-imx, fugang.duan
CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
CLK_ENET_PHY_REF clock.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 7 ++++---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 ++++---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 ++++---
3 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c824f2615fe8..367174031a90 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -909,11 +909,12 @@
assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>,
<&clk IMX8MM_CLK_ENET_TIMER>,
<&clk IMX8MM_CLK_ENET_REF>,
- <&clk IMX8MM_CLK_ENET_TIMER>;
+ <&clk IMX8MM_CLK_ENET_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
<&clk IMX8MM_SYS_PLL2_100M>,
- <&clk IMX8MM_SYS_PLL2_125M>;
- assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
+ <&clk IMX8MM_SYS_PLL2_125M>,
+ <&clk IMX8MM_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index a06d2a6268e6..7556b24b6467 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -760,11 +760,12 @@
assigned-clocks = <&clk IMX8MN_CLK_ENET_AXI>,
<&clk IMX8MN_CLK_ENET_TIMER>,
<&clk IMX8MN_CLK_ENET_REF>,
- <&clk IMX8MN_CLK_ENET_TIMER>;
+ <&clk IMX8MN_CLK_ENET_PHY_REF>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
<&clk IMX8MN_SYS_PLL2_100M>,
- <&clk IMX8MN_SYS_PLL2_125M>;
- assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
+ <&clk IMX8MN_SYS_PLL2_125M>,
+ <&clk IMX8MN_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index ecccfbb4f5ad..3d9f5010769d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -762,11 +762,12 @@
assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
<&clk IMX8MP_CLK_ENET_TIMER>,
<&clk IMX8MP_CLK_ENET_REF>,
- <&clk IMX8MP_CLK_ENET_TIMER>;
+ <&clk IMX8MP_CLK_ENET_PHY_REF>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
<&clk IMX8MP_SYS_PLL2_100M>,
- <&clk IMX8MP_SYS_PLL2_125M>;
- assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
+ <&clk IMX8MP_SYS_PLL2_125M>,
+ <&clk IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/5] arch: arm64: dts: imx8mq: assign clock parents for FEC
2020-11-19 9:52 [PATCH 0/5] arch: arm64: imx:patches for FEC Joakim Zhang
2020-11-19 9:52 ` [PATCH 1/5] arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet Joakim Zhang
2020-11-19 9:52 ` [PATCH 2/5] arch: arm64: imx8mm/n/p: correct assigned clocks for FEC Joakim Zhang
@ 2020-11-19 9:52 ` Joakim Zhang
2020-11-19 9:52 ` [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address " Joakim Zhang
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Joakim Zhang @ 2020-11-19 9:52 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam; +Cc: devicetree, linux-imx, fugang.duan
Assign clock parents for FEC, set "ptp" clock to 100M, "enet_clk_ref" to
125M.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index a841a023e8e0..8682a484dea5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1152,6 +1152,15 @@
<&clk IMX8MQ_CLK_ENET_PHY_REF>;
clock-names = "ipg", "ahb", "ptp",
"enet_clk_ref", "enet_out";
+ assigned-clocks = <&clk IMX8MQ_CLK_ENET_AXI>,
+ <&clk IMX8MQ_CLK_ENET_TIMER>,
+ <&clk IMX8MQ_CLK_ENET_REF>,
+ <&clk IMX8MQ_CLK_ENET_PHY_REF>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_266M>,
+ <&clk IMX8MQ_SYS2_PLL_100M>,
+ <&clk IMX8MQ_SYS2_PLL_125M>,
+ <&clk IMX8MQ_SYS2_PLL_50M>;
+ assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address for FEC
2020-11-19 9:52 [PATCH 0/5] arch: arm64: imx:patches for FEC Joakim Zhang
` (2 preceding siblings ...)
2020-11-19 9:52 ` [PATCH 3/5] arch: arm64: dts: imx8mq: assign clock parents " Joakim Zhang
@ 2020-11-19 9:52 ` Joakim Zhang
2021-01-05 0:35 ` Shawn Guo
2020-11-19 9:52 ` [PATCH 5/5] arch: arm64: dts: imx8mq/m/n/p: add fsl,stop-mode property " Joakim Zhang
2020-12-03 10:54 ` [PATCH 0/5] arch: arm64: imx:patches " Joakim Zhang
5 siblings, 1 reply; 12+ messages in thread
From: Joakim Zhang @ 2020-11-19 9:52 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam; +Cc: devicetree, linux-imx, fugang.duan
Add mac address in efuse, so that FEC driver can parse it from nvmem
cell.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 7 +++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 +++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 7 +++++++
4 files changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 367174031a90..0fbff13a9629 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -521,6 +521,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ fec_mac_address: mac-address@640 {
+ reg = <0x90 6>;
+ };
};
anatop: anatop@30360000 {
@@ -917,6 +921,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <&fec_mac_address>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 7556b24b6467..6c16d09e47a5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -391,6 +391,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ fec_mac_address: mac-address@640 {
+ reg = <0x90 6>;
+ };
};
anatop: anatop@30360000 {
@@ -768,6 +772,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <&fec_mac_address>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 3d9f5010769d..14176ee9a19c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -331,6 +331,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ eth_mac1: mac-address@640 {
+ reg = <0x90 6>;
+ };
};
anatop: anatop@30360000 {
@@ -770,6 +774,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <ð_mac1>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 8682a484dea5..6eb773fe6cec 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -558,6 +558,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ fec_mac_address: mac-address@640 {
+ reg = <0x90 6>;
+ };
};
anatop: syscon@30360000 {
@@ -1163,6 +1167,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <&fec_mac_address>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 5/5] arch: arm64: dts: imx8mq/m/n/p: add fsl,stop-mode property for FEC
2020-11-19 9:52 [PATCH 0/5] arch: arm64: imx:patches for FEC Joakim Zhang
` (3 preceding siblings ...)
2020-11-19 9:52 ` [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address " Joakim Zhang
@ 2020-11-19 9:52 ` Joakim Zhang
2020-12-03 10:54 ` [PATCH 0/5] arch: arm64: imx:patches " Joakim Zhang
5 siblings, 0 replies; 12+ messages in thread
From: Joakim Zhang @ 2020-11-19 9:52 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam; +Cc: devicetree, linux-imx, fugang.duan
Add fsl,stop-mode property for FEC to enable stop mode.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 +
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 +
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 +
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
4 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 0fbff13a9629..37c8def9e4f5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -924,6 +924,7 @@
nvmem-cells = <&fec_mac_address>;
nvmem-cell-names = "mac-address";
nvmem_macaddr_swap;
+ fsl,stop-mode = <&gpr 0x10 3>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 6c16d09e47a5..c2b1f770eaad 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -775,6 +775,7 @@
nvmem-cells = <&fec_mac_address>;
nvmem-cell-names = "mac-address";
nvmem_macaddr_swap;
+ fsl,stop-mode = <&gpr 0x10 3>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 14176ee9a19c..1274fbb1af67 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -776,6 +776,7 @@
fsl,num-rx-queues = <3>;
nvmem-cells = <ð_mac1>;
nvmem-cell-names = "mac-address";
+ fsl,stop-mode = <&gpr 0x10 3>;
nvmem_macaddr_swap;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6eb773fe6cec..cbaaaf28e327 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1170,6 +1170,7 @@
nvmem-cells = <&fec_mac_address>;
nvmem-cell-names = "mac-address";
nvmem_macaddr_swap;
+ fsl,stop-mode = <&iomuxc_gpr 0x10 3>;
status = "disabled";
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* RE: [PATCH 0/5] arch: arm64: imx:patches for FEC
2020-11-19 9:52 [PATCH 0/5] arch: arm64: imx:patches for FEC Joakim Zhang
` (4 preceding siblings ...)
2020-11-19 9:52 ` [PATCH 5/5] arch: arm64: dts: imx8mq/m/n/p: add fsl,stop-mode property " Joakim Zhang
@ 2020-12-03 10:54 ` Joakim Zhang
5 siblings, 0 replies; 12+ messages in thread
From: Joakim Zhang @ 2020-12-03 10:54 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam; +Cc: devicetree, dl-linux-imx
Gentle Ping...
Best Regards,
Joakim Zhang
> -----Original Message-----
> From: Joakim Zhang <qiangqing.zhang@nxp.com>
> Sent: 2020年11月19日 17:53
> To: shawnguo@kernel.org; s.hauer@pengutronix.de; festevam@gmail.com
> Cc: devicetree@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>; Andy Duan
> <fugang.duan@nxp.com>
> Subject: [PATCH 0/5] arch: arm64: imx:patches for FEC
>
> Some improve patches for i.MX FEC.
>
> Joakim Zhang (5):
> arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet
> arch: arm64: imx8mm/n/p: correct assigned clocks for FEC
> arch: arm64: dts: imx8mq: assign clock parents for FEC
> arch: arm64: dts: imx8mq/m/n/p: add mac address for FEC
> arch: arm64: dts: imx8mq/m/n/p: add fsl,stop-mode property for FEC
>
> arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 1 +
> arch/arm/boot/dts/imx6sx-sdb.dtsi | 2 ++
> arch/arm/boot/dts/imx6ul.dtsi | 2 ++
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 15 ++++++++++++---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 15 ++++++++++++---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 15 ++++++++++++---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 17 +++++++++++++++++
> 7 files changed, 58 insertions(+), 9 deletions(-)
>
> --
> 2.17.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/5] arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet
2020-11-19 9:52 ` [PATCH 1/5] arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet Joakim Zhang
@ 2021-01-05 0:33 ` Shawn Guo
0 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2021-01-05 0:33 UTC (permalink / raw)
To: Joakim Zhang; +Cc: s.hauer, festevam, devicetree, linux-imx, fugang.duan
On Thu, Nov 19, 2020 at 05:52:45PM +0800, Joakim Zhang wrote:
> Add wakeup support via magic packet on i.MX platforms.
>
> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
'ARM: dts: imx6: ...' for subject prefix.
Shawn
> ---
> arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 1 +
> arch/arm/boot/dts/imx6sx-sdb.dtsi | 2 ++
> arch/arm/boot/dts/imx6ul.dtsi | 2 ++
> 3 files changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> index afe477f32984..5e58740d40c5 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> @@ -298,6 +298,7 @@
> interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
> <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
> fsl,err006687-workaround-present;
> + fsl,magic-packet;
> status = "okay";
> };
>
> diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
> index 1351d7f70a54..c6e85e4a0883 100644
> --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
> +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
> @@ -206,6 +206,7 @@
> phy-mode = "rgmii-id";
> phy-handle = <ðphy1>;
> phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
> + fsl,magic-packet;
> status = "okay";
>
> mdio {
> @@ -227,6 +228,7 @@
> pinctrl-0 = <&pinctrl_enet2>;
> phy-mode = "rgmii-id";
> phy-handle = <ðphy2>;
> + fsl,magic-packet;
> status = "okay";
> };
>
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index 9d3411cc597b..afeec01f6522 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -538,6 +538,7 @@
> fsl,num-tx-queues = <1>;
> fsl,num-rx-queues = <1>;
> fsl,stop-mode = <&gpr 0x10 4>;
> + fsl,magic-packet;
> status = "disabled";
> };
>
> @@ -885,6 +886,7 @@
> fsl,num-tx-queues = <1>;
> fsl,num-rx-queues = <1>;
> fsl,stop-mode = <&gpr 0x10 3>;
> + fsl,magic-packet;
> status = "disabled";
> };
>
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/5] arch: arm64: imx8mm/n/p: correct assigned clocks for FEC
2020-11-19 9:52 ` [PATCH 2/5] arch: arm64: imx8mm/n/p: correct assigned clocks for FEC Joakim Zhang
@ 2021-01-05 0:34 ` Shawn Guo
0 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2021-01-05 0:34 UTC (permalink / raw)
To: Joakim Zhang; +Cc: s.hauer, festevam, devicetree, linux-imx, fugang.duan
On Thu, Nov 19, 2020 at 05:52:46PM +0800, Joakim Zhang wrote:
> CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
> CLK_ENET_PHY_REF clock.
>
> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
'arm64: dts: ...' for subject prefix.
Shawn
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address for FEC
2020-11-19 9:52 ` [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address " Joakim Zhang
@ 2021-01-05 0:35 ` Shawn Guo
2021-01-12 10:42 ` Joakim Zhang
0 siblings, 1 reply; 12+ messages in thread
From: Shawn Guo @ 2021-01-05 0:35 UTC (permalink / raw)
To: Joakim Zhang; +Cc: s.hauer, festevam, devicetree, linux-imx, fugang.duan
On Thu, Nov 19, 2020 at 05:52:48PM +0800, Joakim Zhang wrote:
> Add mac address in efuse, so that FEC driver can parse it from nvmem
> cell.
>
> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 7 +++++++
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 +++++++
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 7 +++++++
> 4 files changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 367174031a90..0fbff13a9629 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -521,6 +521,10 @@
> cpu_speed_grade: speed-grade@10 {
> reg = <0x10 4>;
> };
> +
> + fec_mac_address: mac-address@640 {
Shouldn't the unit-address be @90 rather than @640?
Shawn
> + reg = <0x90 6>;
> + };
> };
>
> anatop: anatop@30360000 {
> @@ -917,6 +921,9 @@
> assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
> fsl,num-tx-queues = <3>;
> fsl,num-rx-queues = <3>;
> + nvmem-cells = <&fec_mac_address>;
> + nvmem-cell-names = "mac-address";
> + nvmem_macaddr_swap;
> status = "disabled";
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 7556b24b6467..6c16d09e47a5 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -391,6 +391,10 @@
> cpu_speed_grade: speed-grade@10 {
> reg = <0x10 4>;
> };
> +
> + fec_mac_address: mac-address@640 {
> + reg = <0x90 6>;
> + };
> };
>
> anatop: anatop@30360000 {
> @@ -768,6 +772,9 @@
> assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
> fsl,num-tx-queues = <3>;
> fsl,num-rx-queues = <3>;
> + nvmem-cells = <&fec_mac_address>;
> + nvmem-cell-names = "mac-address";
> + nvmem_macaddr_swap;
> status = "disabled";
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 3d9f5010769d..14176ee9a19c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -331,6 +331,10 @@
> cpu_speed_grade: speed-grade@10 {
> reg = <0x10 4>;
> };
> +
> + eth_mac1: mac-address@640 {
> + reg = <0x90 6>;
> + };
> };
>
> anatop: anatop@30360000 {
> @@ -770,6 +774,9 @@
> assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
> fsl,num-tx-queues = <3>;
> fsl,num-rx-queues = <3>;
> + nvmem-cells = <ð_mac1>;
> + nvmem-cell-names = "mac-address";
> + nvmem_macaddr_swap;
> status = "disabled";
> };
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 8682a484dea5..6eb773fe6cec 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -558,6 +558,10 @@
> cpu_speed_grade: speed-grade@10 {
> reg = <0x10 4>;
> };
> +
> + fec_mac_address: mac-address@640 {
> + reg = <0x90 6>;
> + };
> };
>
> anatop: syscon@30360000 {
> @@ -1163,6 +1167,9 @@
> assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
> fsl,num-tx-queues = <3>;
> fsl,num-rx-queues = <3>;
> + nvmem-cells = <&fec_mac_address>;
> + nvmem-cell-names = "mac-address";
> + nvmem_macaddr_swap;
> status = "disabled";
> };
> };
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address for FEC
2021-01-05 0:35 ` Shawn Guo
@ 2021-01-12 10:42 ` Joakim Zhang
2021-01-15 9:18 ` Shawn Guo
0 siblings, 1 reply; 12+ messages in thread
From: Joakim Zhang @ 2021-01-12 10:42 UTC (permalink / raw)
To: Shawn Guo; +Cc: s.hauer, festevam, devicetree, dl-linux-imx, Andy Duan
> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2021年1月5日 8:35
> To: Joakim Zhang <qiangqing.zhang@nxp.com>
> Cc: s.hauer@pengutronix.de; festevam@gmail.com;
> devicetree@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>; Andy Duan
> <fugang.duan@nxp.com>
> Subject: Re: [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address
> for FEC
>
> On Thu, Nov 19, 2020 at 05:52:48PM +0800, Joakim Zhang wrote:
> > Add mac address in efuse, so that FEC driver can parse it from nvmem
> > cell.
> >
> > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 7 +++++++
> > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 +++++++
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 7 +++++++
> > 4 files changed, 28 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index 367174031a90..0fbff13a9629 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -521,6 +521,10 @@
> > cpu_speed_grade: speed-grade@10 {
> > reg = <0x10 4>;
> > };
> > +
> > + fec_mac_address: mac-address@640 {
>
> Shouldn't the unit-address be @90 rather than @640?
Hi Shann, @90 is a offset, @640 is an absolute address, which one is prefer to you? Thanks.
Best Regards,
Joakim Zhang
> Shawn
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address for FEC
2021-01-12 10:42 ` Joakim Zhang
@ 2021-01-15 9:18 ` Shawn Guo
0 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2021-01-15 9:18 UTC (permalink / raw)
To: Joakim Zhang; +Cc: s.hauer, festevam, devicetree, dl-linux-imx, Andy Duan
On Tue, Jan 12, 2021 at 10:42:19AM +0000, Joakim Zhang wrote:
>
> > -----Original Message-----
> > From: Shawn Guo <shawnguo@kernel.org>
> > Sent: 2021年1月5日 8:35
> > To: Joakim Zhang <qiangqing.zhang@nxp.com>
> > Cc: s.hauer@pengutronix.de; festevam@gmail.com;
> > devicetree@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>; Andy Duan
> > <fugang.duan@nxp.com>
> > Subject: Re: [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address
> > for FEC
> >
> > On Thu, Nov 19, 2020 at 05:52:48PM +0800, Joakim Zhang wrote:
> > > Add mac address in efuse, so that FEC driver can parse it from nvmem
> > > cell.
> > >
> > > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 7 +++++++
> > > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 +++++++
> > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
> > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 7 +++++++
> > > 4 files changed, 28 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > index 367174031a90..0fbff13a9629 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > @@ -521,6 +521,10 @@
> > > cpu_speed_grade: speed-grade@10 {
> > > reg = <0x10 4>;
> > > };
> > > +
> > > + fec_mac_address: mac-address@640 {
> >
> > Shouldn't the unit-address be @90 rather than @640?
>
>
> Hi Shann, @90 is a offset, @640 is an absolute address, which one is prefer to you? Thanks.
My point was that unit-address should match 'reg' property.
Shawn
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-01-15 9:19 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-19 9:52 [PATCH 0/5] arch: arm64: imx:patches for FEC Joakim Zhang
2020-11-19 9:52 ` [PATCH 1/5] arch: arm64: imx6ul/sx/qdl: add wakeup support via magic packet Joakim Zhang
2021-01-05 0:33 ` Shawn Guo
2020-11-19 9:52 ` [PATCH 2/5] arch: arm64: imx8mm/n/p: correct assigned clocks for FEC Joakim Zhang
2021-01-05 0:34 ` Shawn Guo
2020-11-19 9:52 ` [PATCH 3/5] arch: arm64: dts: imx8mq: assign clock parents " Joakim Zhang
2020-11-19 9:52 ` [PATCH 4/5] arch: arm64: dts: imx8mq/m/n/p: add mac address " Joakim Zhang
2021-01-05 0:35 ` Shawn Guo
2021-01-12 10:42 ` Joakim Zhang
2021-01-15 9:18 ` Shawn Guo
2020-11-19 9:52 ` [PATCH 5/5] arch: arm64: dts: imx8mq/m/n/p: add fsl,stop-mode property " Joakim Zhang
2020-12-03 10:54 ` [PATCH 0/5] arch: arm64: imx:patches " Joakim Zhang
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