From: Po Liu <po.liu@nxp.com>
To: Rob Herring <robh@kernel.org>
Cc: Roy Zang <roy.zang@nxp.com>, Arnd Bergmann <arnd@arndb.de>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Marc Zyngier <marc.zyngier@arm.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Stuart Yoder <stuart.yoder@nxp.com>,
"M.H. Lian" <minghuan.lian@nxp.com>,
Murali Karicheri <m-karicheri2@ti.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
Bjorn Helgaas <bhelgaas@google.com>, Leo Li <leoyang.li@nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH v5 3/3] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode
Date: Mon, 26 Sep 2016 08:25:10 +0000 [thread overview]
Message-ID: <VI1PR0401MB17097C1AE342ADF6F691019092CD0@VI1PR0401MB1709.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20160923130620.GA1486@rob-hp-laptop>
Hi Rob,
> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: Friday, September 23, 2016 9:06 PM
> To: Po Liu
> Cc: Shawn Guo; linux-pci@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org; Roy Zang; Arnd Bergmann; Marc Zyngier;
> Stuart Yoder; Leo Li; M.H. Lian; Murali Karicheri; Bjorn Helgaas;
> Mingkai Hu
> Subject: Re: [PATCH v5 3/3] pci:aer: add support aer interrupt with none
> MSI/MSI-X/INTx mode
>
> On Sun, Sep 18, 2016 at 03:37:27AM +0000, Po Liu wrote:
> > Hi Shawn,
> >
> >
> > > -----Original Message-----
> > > From: Shawn Guo [mailto:shawnguo@kernel.org]
> > > Sent: Sunday, September 18, 2016 8:52 AM
> > > To: Po Liu
> > > Cc: linux-pci@vger.kernel.org;
> > > linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org; devicetree@vger.kernel.org; Roy Zang;
> > > Arnd Bergmann; Marc Zyngier; Stuart Yoder; Leo Li; M.H. Lian;
> > > Murali Karicheri; Bjorn Helgaas; Mingkai Hu
> > > Subject: Re: [PATCH v5 3/3] pci:aer: add support aer interrupt with
> > > none MSI/MSI-X/INTx mode
> > >
> > > On Tue, Sep 13, 2016 at 12:40:59PM +0800, Po Liu wrote:
> > > > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC
> mode.
> > > > When chip support the aer interrupt with none MSI/MSI-X/INTx
> > > mode, > maybe there is interrupt line for aer pme etc. Search the
> > > interrupt > number in the fdt file. Then fixup the dev->irq with it.
> > > >
> > > > Signed-off-by: Po Liu <po.liu@nxp.com>
> > >
> > > Will the new kernel work with existing/old DTB? I'm trying to
> > > understand the dependency between driver and DTS changes.
> >
> > Yes, We've never use name 'intr' before. So we remove it is ok.
> > 'aer' is a dts name for researching it's true interrupt number by
> > kernel. This patch is first time to use name 'aer'. So it must be
> > compatible with existing/old DTB.
>
> Please explain why you are not breaking compatibility in the commit
> message. I asked for this on v2.
Sorry, I didn't really catch what your means. Do you mean I should add why I remove the 'intr'?
>
> > > > ---
> > > > changes for v5:
> > > > - Add clear 'aer' interrup-names description
> > > >
> > > > .../devicetree/bindings/pci/layerscape-pci.txt | 11 +++++---
> > > > drivers/pci/pcie/portdrv_core.c | 31
> > > +++++++++++++++++++---
> > > > 2 files changed, 35 insertions(+), 7 deletions(-) > > diff
> > > --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> > > > b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> > > > index 41e9f55..101d0a7 100644
> > > > --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> > > > +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> > > > @@ -18,8 +18,10 @@ Required properties:
> > > > - reg: base addresses and lengths of the PCIe controller > -
> > > interrupts: A list of interrupt outputs of the controller. Must
> > > contain an
> > > > entry for each entry in the interrupt-names property.
> > > > -- interrupt-names: Must include the following entries:
> > > > - "intr": The interrupt that is asserted for controller
> > > interrupts > +- interrupt-names: It may be include the following
> entries:
>
> "may be" is not okay. It should be "must" or explain when an interrupt
> would not be present. Really, differences in interrupts means you need
> different compatible strings.
How about changing "must" to "should" or "could" and also add when to add after "aer": to explain when to add it?
Thanks!
>
> Rob
>
> > > > + "aer": The interrupt that is asserted for aer interrupt > +
> > > "pme": The interrupt that is asserted for pme interrupt > + ......
next prev parent reply other threads:[~2016-09-26 8:25 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-26 6:00 [PATCH 2/2] aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-06-02 3:48 ` Bjorn Helgaas
2016-06-02 5:01 ` Po Liu
2016-06-02 13:55 ` Bjorn Helgaas
2016-06-02 15:37 ` Murali Karicheri
2016-06-03 4:09 ` Bjorn Helgaas
2016-06-03 17:31 ` Murali Karicheri
2016-06-04 3:48 ` Bjorn Helgaas
2016-06-06 7:32 ` Po Liu
2016-06-06 14:01 ` Murali Karicheri
2016-06-06 18:10 ` Bjorn Helgaas
2016-06-07 10:07 ` Po Liu
2016-06-07 22:46 ` Bjorn Helgaas
2016-06-08 4:56 ` Po Liu
2016-06-14 6:12 ` [PATCH v2 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-06-14 6:12 ` [PATCH v2 2/2] pci/aer: interrupt fixup in the quirk Po Liu
2016-06-16 13:54 ` Bjorn Helgaas
2016-06-17 3:30 ` Po Liu
2016-07-01 8:46 ` Po Liu
2016-06-14 8:24 ` [PATCH v3 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-06-14 8:24 ` [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk Po Liu
2016-06-23 5:43 ` Dongdong Liu
2016-07-01 8:40 ` Po Liu
2016-07-04 8:44 ` Dongdong Liu
2016-07-05 3:03 ` Po Liu
2016-07-06 8:38 ` Dongdong Liu
[not found] ` <1465892645-32381-2-git-send-email-po.liu-3arQi8VN3Tc@public.gmane.org>
2016-07-29 22:41 ` Bjorn Helgaas
2016-08-22 10:09 ` Po Liu
2016-09-20 20:47 ` Bjorn Helgaas
2016-09-21 6:51 ` Po Liu
2016-09-21 21:53 ` Bjorn Helgaas
2016-08-31 6:37 ` [PATCH v4 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-08-31 6:37 ` [PATCH v4 2/2] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-09-02 15:17 ` Rob Herring
2016-09-05 6:05 ` Po Liu
2016-09-13 4:40 ` [PATCH v5 1/3] arm/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-09-13 4:40 ` [PATCH v5 2/3] arm64/dts: " Po Liu
2016-09-13 4:40 ` [PATCH v5 3/3] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
[not found] ` <1473741659-17618-3-git-send-email-po.liu-3arQi8VN3Tc@public.gmane.org>
2016-09-18 0:52 ` Shawn Guo
2016-09-18 3:37 ` Po Liu
[not found] ` <VI1PR0401MB1709F91B0C1EB6C80D741E4492F50-9IDQY6o3qQhWumToEB7uiI3W/0Ik+aLCnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2016-09-20 12:39 ` Shawn Guo
2016-09-21 6:54 ` Po Liu
2016-09-30 22:13 ` Shawn Guo
2016-09-23 13:06 ` Rob Herring
2016-09-26 8:25 ` Po Liu [this message]
2016-09-21 22:37 ` Bjorn Helgaas
2016-09-22 2:53 ` Po Liu
2016-09-30 9:11 ` [PATCH v6 1/3] arm/dts-ls1021: add pcie aer/pme interrupt-name property in the dts Po Liu
2016-09-30 9:11 ` [PATCH v6 2/3] arm64/dts-ls1043-ls2080: " Po Liu
2016-09-30 9:11 ` [PATCH v6 3/3] pci:add support aer/pme interrupts with none MSI/MSI-X/INTx mode Po Liu
[not found] ` <1475226697-7709-3-git-send-email-po.liu-3arQi8VN3Tc@public.gmane.org>
2016-10-08 20:49 ` Rob Herring
2016-10-09 2:47 ` Po Liu
2016-09-05 2:25 ` [PATCH v4 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Shawn Guo
[not found] ` <1472625442-23309-1-git-send-email-po.liu-3arQi8VN3Tc@public.gmane.org>
2016-09-12 22:13 ` Bjorn Helgaas
2016-09-13 3:02 ` Po Liu
2016-06-16 0:36 ` [PATCH v3 " Shawn Guo
2016-06-16 10:50 ` Po Liu
2016-06-16 22:19 ` Rob Herring
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