From: <sean.wang@mediatek.com>
To: robh+dt@kernel.org, matthias.bgg@gmail.com, mark.rutland@arm.com,
devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Sean Wang <sean.wang@mediatek.com>,
Jimin Wang <jimin.wang@mediatek.com>
Subject: [PATCH v2 16/16] arm64: dts: mt7622: add mmc related device nodes
Date: Tue, 6 Feb 2018 17:53:05 +0800 [thread overview]
Message-ID: <abc7373b08150326faecc984b4e1a16c7589502a.1517910489.git.sean.wang@mediatek.com> (raw)
In-Reply-To: <cover.1517910489.git.sean.wang@mediatek.com>
From: Sean Wang <sean.wang@mediatek.com>
add mmc device nodes and proper setup for used pins
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Jimin Wang <jimin.wang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 106 +++++++++++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 20 +++++
2 files changed, 126 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index 5746cb3..b858df6 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
@@ -53,6 +54,14 @@
reg = <0 0x40000000 0 0x3F000000>;
};
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
@@ -89,6 +98,23 @@
function = "emmc", "emmc_rst";
groups = "emmc";
};
+
+ /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
+ * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
+ * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
+ */
+ conf-cmd-dat {
+ pins = "NDL0", "NDL1", "NDL2",
+ "NDL3", "NDL4", "NDL5",
+ "NDL6", "NDL7", "NRB";
+ input-enable;
+ bias-pull-up;
+ };
+
+ conf-clk {
+ pins = "NCLE";
+ bias-pull-down;
+ };
};
emmc_pins_uhs: emmc-pins-uhs {
@@ -96,6 +122,21 @@
function = "emmc";
groups = "emmc";
};
+
+ conf-cmd-dat {
+ pins = "NDL0", "NDL1", "NDL2",
+ "NDL3", "NDL4", "NDL5",
+ "NDL6", "NDL7", "NRB";
+ input-enable;
+ drive-strength = <4>;
+ bias-pull-up;
+ };
+
+ conf-clk {
+ pins = "NCLE";
+ drive-strength = <4>;
+ bias-pull-down;
+ };
};
eth_pins: eth-pins {
@@ -194,6 +235,27 @@
function = "sd";
groups = "sd_0";
};
+
+ /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
+ * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
+ * DAT2, DAT3, CMD, CLK for SD respectively.
+ */
+ conf-cmd-data {
+ pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
+ "I2S2_IN","I2S4_OUT";
+ input-enable;
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ conf-clk {
+ pins = "I2S3_OUT";
+ drive-strength = <12>;
+ bias-pull-down;
+ };
+ conf-cd {
+ pins = "TXD3";
+ bias-pull-up;
+ };
};
sd0_pins_uhs: sd0-pins-uhs {
@@ -201,6 +263,18 @@
function = "sd";
groups = "sd_0";
};
+
+ conf-cmd-data {
+ pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
+ "I2S2_IN","I2S4_OUT";
+ input-enable;
+ bias-pull-up;
+ };
+
+ conf-clk {
+ pins = "I2S3_OUT";
+ bias-pull-down;
+ };
};
/* Serial NAND is shared pin with SPI-NOR */
@@ -311,6 +385,38 @@
status = "okay";
};
+&mmc0 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&emmc_pins_default>;
+ pinctrl-1 = <&emmc_pins_uhs>;
+ status = "okay";
+ bus-width = <8>;
+ max-frequency = <50000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
+ non-removable;
+};
+
+&mmc1 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&sd0_pins_default>;
+ pinctrl-1 = <&sd0_pins_uhs>;
+ status = "okay";
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ cap-sd-highspeed;
+ r_smpl = <1>;
+ cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_3p3v>;
+ assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
+};
+
&nandc {
pinctrl-names = "default";
pinctrl-0 = <¶llel_nand_pins>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index ed7ee78..177a651 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -524,6 +524,26 @@
status = "disabled";
};
+ mmc0: mmc@11230000 {
+ compatible = "mediatek,mt7622-mmc";
+ reg = <0 0x11230000 0 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_0_PD>,
+ <&topckgen CLK_TOP_MSDC50_0_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
+ mmc1: mmc@11240000 {
+ compatible = "mediatek,mt7622-mmc";
+ reg = <0 0x11240000 0 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_1_PD>,
+ <&topckgen CLK_TOP_AXI_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
ssusbsys: ssusbsys@1a000000 {
compatible = "mediatek,mt7622-ssusbsys",
"syscon";
--
2.7.4
prev parent reply other threads:[~2018-02-06 9:53 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-06 9:52 [PATCH v2 00/16] add dts nodes to MT7622 SoC sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:52 ` [PATCH v2 01/16] dt-bindings: clock: mediatek: add missing required #reset-cells sean.wang
[not found] ` <d58fcf36319254d6de4c7fe100cbdca1bbec27a5.1517910489.git.sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-02-07 10:45 ` Matthias Brugger
[not found] ` <391278e5-9b72-1142-0262-5d286fe17d8d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-02-09 3:38 ` Sean Wang
2018-02-06 9:52 ` [PATCH v2 08/16] arm64: dts: mt7622: add SoC and peripheral related device nodes sean.wang
2018-02-06 9:52 ` [PATCH v2 09/16] arm64: dts: mt7622: add flash " sean.wang
2018-02-06 9:52 ` [PATCH v2 10/16] arm64: dts: mt7622: add ethernet " sean.wang
[not found] ` <cover.1517910489.git.sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-02-06 9:52 ` [PATCH v2 02/16] arm64: dts: mt7622: add clock controller " sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:52 ` [PATCH v2 03/16] arm64: dts: mt7622: add power domain " sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:52 ` [PATCH v2 04/16] arm64: dts: mt7622: add pinctrl related " sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-07 11:31 ` Matthias Brugger
[not found] ` <7f7d3d94-7d4e-9b66-048a-e100a45a2137-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-02-09 3:41 ` Sean Wang
2018-02-06 9:52 ` [PATCH v2 05/16] arm64: dts: mt7622: add PMIC MT6380 related nodes sean.wang-NuS5LvNUpcJWk0Htik3J/w
[not found] ` <38270e84210144d52178def5ec7364b966a616eb.1517910489.git.sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-02-08 14:46 ` Philippe Ombredanne
2018-02-06 9:52 ` [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes sean.wang-NuS5LvNUpcJWk0Htik3J/w
[not found] ` <fc5bdf53b92bd7a96e94b714d8d13deebca95c28.1517910489.git.sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-02-07 3:33 ` Viresh Kumar
2018-02-07 6:16 ` Sean Wang
2018-02-07 6:18 ` Viresh Kumar
2018-02-07 8:34 ` Sean Wang
2018-02-06 9:52 ` [PATCH v2 07/16] arm64: dts: mt7622: turn uart0 clock to real ones sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:53 ` [PATCH v2 11/16] arm64: dts: mt7622: add PCIe device nodes sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:53 ` [PATCH v2 12/16] arm64: dts: mt7622: add SATA " sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:53 ` [PATCH v2 13/16] arm64: dts: mt7622: add usb " sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:53 ` [PATCH v2 15/16] arm64: dts: mt7622: add High-Speed DMA " sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06 9:53 ` [PATCH v2 14/16] arm64: dts: mt7622: add thermal and related nodes sean.wang
[not found] ` <687a7c43e3e3260ebdf004a96d2cde143f563250.1517910489.git.sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-02-07 11:43 ` Matthias Brugger
2018-02-09 3:51 ` Sean Wang
2018-02-12 11:55 ` Matthias Brugger
2018-02-06 9:53 ` sean.wang [this message]
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