* [PATCH 0/2] Add dsi clock for stm32f469 board @ 2018-01-18 14:49 gabriel.fernandez-qxv4g6HH51o 2018-01-18 14:49 ` [PATCH 1/2] clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK gabriel.fernandez 2018-01-18 14:49 ` [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board gabriel.fernandez 0 siblings, 2 replies; 8+ messages in thread From: gabriel.fernandez-qxv4g6HH51o @ 2018-01-18 14:49 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Maxime Coquelin, Alexandre Torgue, Michael Turquette, Stephen Boyd, Nicolas Pitre, daniel.thompson-QSEj5FYQhm4dnm+yROfE0A, philippe.cornu-qxv4g6HH51o Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-clk-u79uwXL29TY76Z2rM5mHXA, gabriel.fernandez.st-Re5JQEeQqe8AvxtiuMwx3w, gabriel.fernandez-qxv4g6HH51o From: Gabriel Fernandez <gabriel.fernandez-qxv4g6HH51o@public.gmane.org> This patch-set adds the dsi clock for stm32f469 board. Gabriel Fernandez (2): clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK clk: stm32: Add DSI clock for STM32F469 Board drivers/clk/clk-stm32f4.c | 11 ++++++++++- include/dt-bindings/clock/stm32fx-clock.h | 7 ++++--- 2 files changed, 14 insertions(+), 4 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK 2018-01-18 14:49 [PATCH 0/2] Add dsi clock for stm32f469 board gabriel.fernandez-qxv4g6HH51o @ 2018-01-18 14:49 ` gabriel.fernandez [not found] ` <1516286980-8603-2-git-send-email-gabriel.fernandez-qxv4g6HH51o@public.gmane.org> 2018-01-29 18:52 ` Rob Herring 2018-01-18 14:49 ` [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board gabriel.fernandez 1 sibling, 2 replies; 8+ messages in thread From: gabriel.fernandez @ 2018-01-18 14:49 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Maxime Coquelin, Alexandre Torgue, Michael Turquette, Stephen Boyd, Nicolas Pitre, daniel.thompson, philippe.cornu Cc: devicetree, linux-arm-kernel, linux-kernel, linux-clk, gabriel.fernandez.st, gabriel.fernandez From: Gabriel Fernandez <gabriel.fernandez@st.com> Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK hsi and sysclk are overwritten by gpioa and gpiob. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> --- include/dt-bindings/clock/stm32fx-clock.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h index 49bb3c2..4d523b0 100644 --- a/include/dt-bindings/clock/stm32fx-clock.h +++ b/include/dt-bindings/clock/stm32fx-clock.h @@ -33,11 +33,11 @@ #define CLK_SAI2 11 #define CLK_I2SQ_PDIV 12 #define CLK_SAIQ_PDIV 13 - -#define END_PRIMARY_CLK 14 - #define CLK_HSI 14 #define CLK_SYSCLK 15 + +#define END_PRIMARY_CLK 16 + #define CLK_HDMI_CEC 16 #define CLK_SPDIF 17 #define CLK_USART1 18 -- 1.9.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
[parent not found: <1516286980-8603-2-git-send-email-gabriel.fernandez-qxv4g6HH51o@public.gmane.org>]
* Re: [PATCH 1/2] clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK [not found] ` <1516286980-8603-2-git-send-email-gabriel.fernandez-qxv4g6HH51o@public.gmane.org> @ 2018-01-18 16:37 ` Philippe CORNU 0 siblings, 0 replies; 8+ messages in thread From: Philippe CORNU @ 2018-01-18 16:37 UTC (permalink / raw) To: Gabriel FERNANDEZ, Rob Herring, Mark Rutland, Maxime Coquelin, Alexandre TORGUE, Michael Turquette, Stephen Boyd, Nicolas Pitre, daniel.thompson-QSEj5FYQhm4dnm+yROfE0A Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-clk-u79uwXL29TY76Z2rM5mHXA, gabriel.fernandez.st-Re5JQEeQqe8AvxtiuMwx3w Hi Gabriel, Tested successfully on f469 disco board. Tested-by: Philippe Cornu <philippe.cornu@st.com> Many thanks, Philippe :-) On 01/18/2018 03:49 PM, gabriel.fernandez@st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@st.com> > > Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK > hsi and sysclk are overwritten by gpioa and gpiob. > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> > --- > include/dt-bindings/clock/stm32fx-clock.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h > index 49bb3c2..4d523b0 100644 > --- a/include/dt-bindings/clock/stm32fx-clock.h > +++ b/include/dt-bindings/clock/stm32fx-clock.h > @@ -33,11 +33,11 @@ > #define CLK_SAI2 11 > #define CLK_I2SQ_PDIV 12 > #define CLK_SAIQ_PDIV 13 > - > -#define END_PRIMARY_CLK 14 > - > #define CLK_HSI 14 > #define CLK_SYSCLK 15 > + > +#define END_PRIMARY_CLK 16 > + > #define CLK_HDMI_CEC 16 > #define CLK_SPDIF 17 > #define CLK_USART1 18 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK 2018-01-18 14:49 ` [PATCH 1/2] clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK gabriel.fernandez [not found] ` <1516286980-8603-2-git-send-email-gabriel.fernandez-qxv4g6HH51o@public.gmane.org> @ 2018-01-29 18:52 ` Rob Herring 1 sibling, 0 replies; 8+ messages in thread From: Rob Herring @ 2018-01-29 18:52 UTC (permalink / raw) To: gabriel.fernandez Cc: Mark Rutland, devicetree, daniel.thompson, Alexandre Torgue, Nicolas Pitre, Michael Turquette, Stephen Boyd, philippe.cornu, linux-kernel, gabriel.fernandez.st, Maxime Coquelin, linux-clk, linux-arm-kernel On Thu, Jan 18, 2018 at 03:49:39PM +0100, gabriel.fernandez@st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@st.com> > > Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK > hsi and sysclk are overwritten by gpioa and gpiob. > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> > --- > include/dt-bindings/clock/stm32fx-clock.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board 2018-01-18 14:49 [PATCH 0/2] Add dsi clock for stm32f469 board gabriel.fernandez-qxv4g6HH51o 2018-01-18 14:49 ` [PATCH 1/2] clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK gabriel.fernandez @ 2018-01-18 14:49 ` gabriel.fernandez 2018-01-18 16:37 ` Philippe CORNU 2018-01-29 18:56 ` Rob Herring 1 sibling, 2 replies; 8+ messages in thread From: gabriel.fernandez @ 2018-01-18 14:49 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Maxime Coquelin, Alexandre Torgue, Michael Turquette, Stephen Boyd, Nicolas Pitre, daniel.thompson, philippe.cornu Cc: devicetree, linux-arm-kernel, linux-kernel, linux-clk, gabriel.fernandez.st, gabriel.fernandez From: Gabriel Fernandez <gabriel.fernandez@st.com> This patch adds DSI clock for STM32F469 board Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> --- drivers/clk/clk-stm32f4.c | 11 ++++++++++- include/dt-bindings/clock/stm32fx-clock.h | 3 ++- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index da44f8d..3c28798 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -521,7 +521,7 @@ struct stm32f4_pll_data { }; static const struct stm32f4_pll_data stm32f469_pll[MAX_PLL_DIV] = { - { PLL, 50, { "pll", "pll-q", NULL } }, + { PLL, 50, { "pll", "pll-q", "pll-r" } }, { PLL_I2S, 50, { "plli2s-p", "plli2s-q", "plli2s-r" } }, { PLL_SAI, 50, { "pllsai-p", "pllsai-q", "pllsai-r" } }, }; @@ -1047,6 +1047,8 @@ static struct clk_hw *stm32_register_cclk(struct device *dev, const char *name, "no-clock", "lse", "lsi", "hse-rtc" }; +static const char *dsi_parent[2] = { NULL, "pll-r" }; + static const char *lcd_parent[1] = { "pllsai-r-div" }; static const char *i2s_parents[2] = { "plli2s-r", NULL }; @@ -1156,6 +1158,12 @@ struct stm32f4_clk_data { NO_GATE, 0, 0 }, + { + CLK_F469_DSI, "dsi", dsi_parent, ARRAY_SIZE(dsi_parent), + STM32F4_RCC_DCKCFGR, 29, 1, + STM32F4_RCC_APB2ENR, 27, + CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT + }, }; static const struct stm32_aux_clk stm32f746_aux_clk[] = { @@ -1450,6 +1458,7 @@ static void __init stm32f4_rcc_init(struct device_node *np) stm32f4_gate_map = data->gates_map; hse_clk = of_clk_get_parent_name(np, 0); + dsi_parent[0] = hse_clk; i2s_in_clk = of_clk_get_parent_name(np, 1); diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h index 4d523b0..58d8b51 100644 --- a/include/dt-bindings/clock/stm32fx-clock.h +++ b/include/dt-bindings/clock/stm32fx-clock.h @@ -35,8 +35,9 @@ #define CLK_SAIQ_PDIV 13 #define CLK_HSI 14 #define CLK_SYSCLK 15 +#define CLK_F469_DSI 16 -#define END_PRIMARY_CLK 16 +#define END_PRIMARY_CLK 17 #define CLK_HDMI_CEC 16 #define CLK_SPDIF 17 -- 1.9.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board 2018-01-18 14:49 ` [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board gabriel.fernandez @ 2018-01-18 16:37 ` Philippe CORNU 2018-01-29 18:56 ` Rob Herring 1 sibling, 0 replies; 8+ messages in thread From: Philippe CORNU @ 2018-01-18 16:37 UTC (permalink / raw) To: Gabriel FERNANDEZ, Rob Herring, Mark Rutland, Maxime Coquelin, Alexandre TORGUE, Michael Turquette, Stephen Boyd, Nicolas Pitre, daniel.thompson Cc: devicetree, gabriel.fernandez.st, linux-kernel, linux-arm-kernel, linux-clk Hi Gabriel, Tested successfully on f469 disco board. Tested-by: Philippe Cornu <philippe.cornu@st.com> Many thanks, Philippe :-) On 01/18/2018 03:49 PM, gabriel.fernandez@st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@st.com> > > This patch adds DSI clock for STM32F469 board > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> > --- > drivers/clk/clk-stm32f4.c | 11 ++++++++++- > include/dt-bindings/clock/stm32fx-clock.h | 3 ++- > 2 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c > index da44f8d..3c28798 100644 > --- a/drivers/clk/clk-stm32f4.c > +++ b/drivers/clk/clk-stm32f4.c > @@ -521,7 +521,7 @@ struct stm32f4_pll_data { > }; > > static const struct stm32f4_pll_data stm32f469_pll[MAX_PLL_DIV] = { > - { PLL, 50, { "pll", "pll-q", NULL } }, > + { PLL, 50, { "pll", "pll-q", "pll-r" } }, > { PLL_I2S, 50, { "plli2s-p", "plli2s-q", "plli2s-r" } }, > { PLL_SAI, 50, { "pllsai-p", "pllsai-q", "pllsai-r" } }, > }; > @@ -1047,6 +1047,8 @@ static struct clk_hw *stm32_register_cclk(struct device *dev, const char *name, > "no-clock", "lse", "lsi", "hse-rtc" > }; > > +static const char *dsi_parent[2] = { NULL, "pll-r" }; > + > static const char *lcd_parent[1] = { "pllsai-r-div" }; > > static const char *i2s_parents[2] = { "plli2s-r", NULL }; > @@ -1156,6 +1158,12 @@ struct stm32f4_clk_data { > NO_GATE, 0, > 0 > }, > + { > + CLK_F469_DSI, "dsi", dsi_parent, ARRAY_SIZE(dsi_parent), > + STM32F4_RCC_DCKCFGR, 29, 1, > + STM32F4_RCC_APB2ENR, 27, > + CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT > + }, > }; > > static const struct stm32_aux_clk stm32f746_aux_clk[] = { > @@ -1450,6 +1458,7 @@ static void __init stm32f4_rcc_init(struct device_node *np) > stm32f4_gate_map = data->gates_map; > > hse_clk = of_clk_get_parent_name(np, 0); > + dsi_parent[0] = hse_clk; > > i2s_in_clk = of_clk_get_parent_name(np, 1); > > diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h > index 4d523b0..58d8b51 100644 > --- a/include/dt-bindings/clock/stm32fx-clock.h > +++ b/include/dt-bindings/clock/stm32fx-clock.h > @@ -35,8 +35,9 @@ > #define CLK_SAIQ_PDIV 13 > #define CLK_HSI 14 > #define CLK_SYSCLK 15 > +#define CLK_F469_DSI 16 > > -#define END_PRIMARY_CLK 16 > +#define END_PRIMARY_CLK 17 > > #define CLK_HDMI_CEC 16 > #define CLK_SPDIF 17 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board 2018-01-18 14:49 ` [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board gabriel.fernandez 2018-01-18 16:37 ` Philippe CORNU @ 2018-01-29 18:56 ` Rob Herring 2018-01-30 15:22 ` Gabriel FERNANDEZ 1 sibling, 1 reply; 8+ messages in thread From: Rob Herring @ 2018-01-29 18:56 UTC (permalink / raw) To: gabriel.fernandez Cc: Mark Rutland, Maxime Coquelin, Alexandre Torgue, Michael Turquette, Stephen Boyd, Nicolas Pitre, daniel.thompson, philippe.cornu, devicetree, linux-arm-kernel, linux-kernel, linux-clk, gabriel.fernandez.st On Thu, Jan 18, 2018 at 03:49:40PM +0100, gabriel.fernandez@st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@st.com> > > This patch adds DSI clock for STM32F469 board > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> > --- > drivers/clk/clk-stm32f4.c | 11 ++++++++++- > include/dt-bindings/clock/stm32fx-clock.h | 3 ++- > 2 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c > index da44f8d..3c28798 100644 > --- a/drivers/clk/clk-stm32f4.c > +++ b/drivers/clk/clk-stm32f4.c > @@ -521,7 +521,7 @@ struct stm32f4_pll_data { > }; > > static const struct stm32f4_pll_data stm32f469_pll[MAX_PLL_DIV] = { > - { PLL, 50, { "pll", "pll-q", NULL } }, > + { PLL, 50, { "pll", "pll-q", "pll-r" } }, > { PLL_I2S, 50, { "plli2s-p", "plli2s-q", "plli2s-r" } }, > { PLL_SAI, 50, { "pllsai-p", "pllsai-q", "pllsai-r" } }, > }; > @@ -1047,6 +1047,8 @@ static struct clk_hw *stm32_register_cclk(struct device *dev, const char *name, > "no-clock", "lse", "lsi", "hse-rtc" > }; > > +static const char *dsi_parent[2] = { NULL, "pll-r" }; > + > static const char *lcd_parent[1] = { "pllsai-r-div" }; > > static const char *i2s_parents[2] = { "plli2s-r", NULL }; > @@ -1156,6 +1158,12 @@ struct stm32f4_clk_data { > NO_GATE, 0, > 0 > }, > + { > + CLK_F469_DSI, "dsi", dsi_parent, ARRAY_SIZE(dsi_parent), > + STM32F4_RCC_DCKCFGR, 29, 1, > + STM32F4_RCC_APB2ENR, 27, > + CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT > + }, > }; > > static const struct stm32_aux_clk stm32f746_aux_clk[] = { > @@ -1450,6 +1458,7 @@ static void __init stm32f4_rcc_init(struct device_node *np) > stm32f4_gate_map = data->gates_map; > > hse_clk = of_clk_get_parent_name(np, 0); > + dsi_parent[0] = hse_clk; > > i2s_in_clk = of_clk_get_parent_name(np, 1); > > diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h > index 4d523b0..58d8b51 100644 > --- a/include/dt-bindings/clock/stm32fx-clock.h > +++ b/include/dt-bindings/clock/stm32fx-clock.h > @@ -35,8 +35,9 @@ > #define CLK_SAIQ_PDIV 13 > #define CLK_HSI 14 > #define CLK_SYSCLK 15 > +#define CLK_F469_DSI 16 > > -#define END_PRIMARY_CLK 16 > +#define END_PRIMARY_CLK 17 > > #define CLK_HDMI_CEC 16 > #define CLK_SPDIF 17 This looks suspicious. What's the relationship of these clocks? Rob ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board 2018-01-29 18:56 ` Rob Herring @ 2018-01-30 15:22 ` Gabriel FERNANDEZ 0 siblings, 0 replies; 8+ messages in thread From: Gabriel FERNANDEZ @ 2018-01-30 15:22 UTC (permalink / raw) To: Rob Herring Cc: Mark Rutland, Maxime Coquelin, Alexandre TORGUE, Michael Turquette, Stephen Boyd, Nicolas Pitre, daniel.thompson, Philippe CORNU, devicetree, linux-arm-kernel, linux-kernel, linux-clk, gabriel.fernandez.st Hi Rob, Thanks for reviewing. On 01/29/2018 07:56 PM, Rob Herring wrote: > On Thu, Jan 18, 2018 at 03:49:40PM +0100, gabriel.fernandez@st.com wrote: >> From: Gabriel Fernandez <gabriel.fernandez@st.com> >> >> This patch adds DSI clock for STM32F469 board >> >> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> >> --- >> drivers/clk/clk-stm32f4.c | 11 ++++++++++- >> include/dt-bindings/clock/stm32fx-clock.h | 3 ++- >> 2 files changed, 12 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c >> index da44f8d..3c28798 100644 >> --- a/drivers/clk/clk-stm32f4.c >> +++ b/drivers/clk/clk-stm32f4.c >> @@ -521,7 +521,7 @@ struct stm32f4_pll_data { >> }; >> >> static const struct stm32f4_pll_data stm32f469_pll[MAX_PLL_DIV] = { >> - { PLL, 50, { "pll", "pll-q", NULL } }, >> + { PLL, 50, { "pll", "pll-q", "pll-r" } }, >> { PLL_I2S, 50, { "plli2s-p", "plli2s-q", "plli2s-r" } }, >> { PLL_SAI, 50, { "pllsai-p", "pllsai-q", "pllsai-r" } }, >> }; >> @@ -1047,6 +1047,8 @@ static struct clk_hw *stm32_register_cclk(struct device *dev, const char *name, >> "no-clock", "lse", "lsi", "hse-rtc" >> }; >> >> +static const char *dsi_parent[2] = { NULL, "pll-r" }; >> + >> static const char *lcd_parent[1] = { "pllsai-r-div" }; >> >> static const char *i2s_parents[2] = { "plli2s-r", NULL }; >> @@ -1156,6 +1158,12 @@ struct stm32f4_clk_data { >> NO_GATE, 0, >> 0 >> }, >> + { >> + CLK_F469_DSI, "dsi", dsi_parent, ARRAY_SIZE(dsi_parent), >> + STM32F4_RCC_DCKCFGR, 29, 1, >> + STM32F4_RCC_APB2ENR, 27, >> + CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT >> + }, >> }; >> >> static const struct stm32_aux_clk stm32f746_aux_clk[] = { >> @@ -1450,6 +1458,7 @@ static void __init stm32f4_rcc_init(struct device_node *np) >> stm32f4_gate_map = data->gates_map; >> >> hse_clk = of_clk_get_parent_name(np, 0); >> + dsi_parent[0] = hse_clk; >> >> i2s_in_clk = of_clk_get_parent_name(np, 1); >> >> diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h >> index 4d523b0..58d8b51 100644 >> --- a/include/dt-bindings/clock/stm32fx-clock.h >> +++ b/include/dt-bindings/clock/stm32fx-clock.h >> @@ -35,8 +35,9 @@ >> #define CLK_SAIQ_PDIV 13 >> #define CLK_HSI 14 >> #define CLK_SYSCLK 15 >> +#define CLK_F469_DSI 16 >> >> -#define END_PRIMARY_CLK 16 >> +#define END_PRIMARY_CLK 17 >> >> #define CLK_HDMI_CEC 16 >> #define CLK_SPDIF 17 > This looks suspicious. What's the relationship of these clocks? I have just added CLK_F469_DSI in the binding, and shifted the end of primary clock for F4 clocks. 'CLK_F469_DSI' binding is only used for STM32F469 and not for STM32F746 (that why CLK_HDMI_CEC can use the index 16) BR Gabriel. > > Rob ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-01-30 15:22 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2018-01-18 14:49 [PATCH 0/2] Add dsi clock for stm32f469 board gabriel.fernandez-qxv4g6HH51o
2018-01-18 14:49 ` [PATCH 1/2] clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK gabriel.fernandez
[not found] ` <1516286980-8603-2-git-send-email-gabriel.fernandez-qxv4g6HH51o@public.gmane.org>
2018-01-18 16:37 ` Philippe CORNU
2018-01-29 18:52 ` Rob Herring
2018-01-18 14:49 ` [PATCH 2/2] clk: stm32: Add DSI clock for STM32F469 Board gabriel.fernandez
2018-01-18 16:37 ` Philippe CORNU
2018-01-29 18:56 ` Rob Herring
2018-01-30 15:22 ` Gabriel FERNANDEZ
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