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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Anup Patel <anup@brainfault.org>, Anup Patel <anup.patel@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Jonathan Corbet <corbet@lwn.net>,
	Alexander Graf <graf@amazon.com>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Damien Le Moal <damien.lemoal@wdc.com>,
	KVM General <kvm@vger.kernel.org>,
	kvm-riscv@lists.infradead.org,
	linux-riscv <linux-riscv@lists.infradead.org>,
	linux-doc@vger.kernel.org,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	linux-staging@lists.linux.dev
Subject: Re: [PATCH v18 00/18] KVM RISC-V Support
Date: Wed, 19 May 2021 15:58:05 +0200	[thread overview]
Message-ID: <YKUZbb6OK+UYAq+t@kroah.com> (raw)
In-Reply-To: <daa30135-8757-8d33-a92e-8db4207168ff@redhat.com>

On Wed, May 19, 2021 at 03:29:24PM +0200, Paolo Bonzini wrote:
> On 19/05/21 14:23, Greg Kroah-Hartman wrote:
> > > - the code could be removed if there's no progress on either changing the
> > > RISC-V acceptance policy or ratifying the spec
> > 
> > I really do not understand the issue here, why can this just not be
> > merged normally?
> 
> Because the RISC-V people only want to merge code for "frozen" or "ratified"
> processor extensions, and the RISC-V foundation is dragging their feet in
> ratifying the hypervisor extension.
> 
> It's totally a self-inflicted pain on part of the RISC-V maintainers; see
> Documentation/riscv/patch-acceptance.rst:
> 
>   We'll only accept patches for new modules or extensions if the
>   specifications for those modules or extensions are listed as being
>   "Frozen" or "Ratified" by the RISC-V Foundation.  (Developers may, of
>   course, maintain their own Linux kernel trees that contain code for
>   any draft extensions that they wish.)
> 
> (Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/riscv/patch-acceptance.rst)

Lovely, and how is that going to work for code that lives outside of the
riscv "arch" layer?  Like all drivers?

And what exactly is "not ratified" that these patches take advantage of?
If there is hardware out there with these features, well, Linux needs to
run on it, so we need to support that.  No external committee rules
should be relevant here.

Now if this is for hardware that is not "real", then that's a different
story.  In that case, who cares, no one can use it, so why not take it?

So what exactly is this trying to "protect" Linux from?

> > All staging drivers need a TODO list that shows what needs to be done in
> > order to get it out of staging.  All I can tell so far is that the riscv
> > maintainers do not want to take this for "unknown reasons" so let's dump
> > it over here for now where we don't have to see it.
> > 
> > And that's not good for developers or users, so perhaps the riscv rules
> > are not very good?
> 
> I agree wholeheartedly.
> 
> I have heard contrasting opinions on conflict of interest where the
> employers of the maintainers benefit from slowing down the integration of
> code in Linus's tree.  I find these allegations believable, but even if that
> weren't the case, the policy is (to put it kindly) showing its limits.

Slowing down code merges is horrible, again, if there's hardware out
there, and someone sends code to support it, and wants to maintain it,
then we should not be rejecting it.

Otherwise we are not doing our job as an operating system kernel, our
role is to make hardware work.  We don't get to just ignore code because
we don't like the hardware (oh if only we could!), if a user wants to
use it, our role is to handle that.

> > > Of course there should have been a TODO file explaining the situation. But
> > > if you think this is not the right place, I totally understand; if my
> > > opinion had any weight in this, I would just place it in arch/riscv/kvm.
> > > 
> > > The RISC-V acceptance policy as is just doesn't work, and the fact that
> > > people are trying to work around it is proving it.  There are many ways to
> > > improve it:
> > 
> > What is this magical acceptance policy that is preventing working code
> > from being merged?  And why is it suddenly the rest of the kernel
> > developer's problems because of this?
> 
> It is my problem because I am trying to help Anup merging some perfectly
> good KVM code; when a new KVM port comes up, I coordinate merging the first
> arch/*/kvm bits with the arch/ maintainers and from that point on that
> directory becomes "mine" (or my submaintainers').

Agreed, but the riscv maintainers should not be forcing this "problem"
onto all of us, like it seems is starting to happen :(

Ok, so, Paul, Palmer, and Albert, what do we do here?  Why can't we take
working code like this into the kernel if someone is willing to support
and maintain it over time?

thanks,

greg k-h

  reply	other threads:[~2021-05-19 13:58 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-19  3:35 [PATCH v18 00/18] KVM RISC-V Support Anup Patel
2021-05-19  3:35 ` [PATCH v18 01/18] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2021-05-19  3:35 ` [PATCH v18 02/18] RISC-V: Add initial skeletal KVM support Anup Patel
2021-05-19  9:24   ` Dan Carpenter
2021-05-19 10:17   ` Dan Carpenter
2021-05-19  3:35 ` [PATCH v18 03/18] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2021-05-19  3:35 ` [PATCH v18 04/18] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2021-05-19  3:35 ` [PATCH v18 05/18] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2021-05-19  3:35 ` [PATCH v18 06/18] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2021-05-19  3:35 ` [PATCH v18 07/18] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2021-05-19  3:35 ` [PATCH v18 08/18] RISC-V: KVM: Handle WFI " Anup Patel
2021-05-19  3:35 ` [PATCH v18 09/18] RISC-V: KVM: Implement VMID allocator Anup Patel
2021-05-19  3:35 ` [PATCH v18 10/18] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2021-05-19  3:35 ` [PATCH v18 11/18] RISC-V: KVM: Implement MMU notifiers Anup Patel
2021-05-19 10:09   ` Dan Carpenter
2021-05-19  3:35 ` [PATCH v18 12/18] RISC-V: KVM: Add timer functionality Anup Patel
2021-05-19  3:35 ` [PATCH v18 13/18] RISC-V: KVM: FP lazy save/restore Anup Patel
2021-05-19  3:35 ` [PATCH v18 14/18] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2021-05-19 10:11   ` Dan Carpenter
2021-05-20  6:09   ` Dan Carpenter
2021-05-19  3:35 ` [PATCH v18 15/18] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2021-05-19  3:35 ` [PATCH v18 16/18] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2021-05-19  3:35 ` [PATCH v18 17/18] RISC-V: KVM: Move sources to drivers/staging directory Anup Patel
2021-05-19  3:35 ` [PATCH v18 18/18] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2021-05-19  4:58 ` [PATCH v18 00/18] KVM RISC-V Support Greg Kroah-Hartman
2021-05-19  5:10   ` Anup Patel
2021-05-19  5:21     ` Greg Kroah-Hartman
2021-05-19 10:47       ` Greg Kroah-Hartman
2021-05-19 11:18         ` Paolo Bonzini
2021-05-19 12:23           ` Greg Kroah-Hartman
2021-05-19 13:29             ` Paolo Bonzini
2021-05-19 13:58               ` Greg Kroah-Hartman [this message]
2021-05-19 15:08                 ` Dan Carpenter
2021-05-19 15:26                   ` Paolo Bonzini
2021-05-21 17:13                 ` Palmer Dabbelt
2021-05-21 17:21                   ` Paolo Bonzini
2021-05-21 17:47                     ` Greg KH
2021-05-21 18:08                       ` Palmer Dabbelt
2021-05-21 18:25                         ` Greg KH
2021-05-21 20:25                       ` Paolo Bonzini
2021-05-24  7:09 ` Guo Ren
2021-05-24 22:57   ` Palmer Dabbelt
2021-05-24 23:08     ` Damien Le Moal
2021-05-25  7:37       ` Greg KH
2021-05-25  8:01         ` Damien Le Moal
2021-05-25  8:11           ` Greg KH
2021-05-25  8:24             ` Paolo Bonzini

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