From: Jon Masters <jcm@jonmasters.org>
To: "qi.fuli@fujitsu.com" <qi.fuli@fujitsu.com>,
Will Deacon <will@kernel.org>
Cc: Will Deacon <will.deacon@arm.com>,
"indou.takao@fujitsu.com" <indou.takao@fujitsu.com>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
"peterz@infradead.org" <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Jonathan Corbet <corbet@lwn.net>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 0/2] arm64: Introduce boot parameter to disable TLB flush instruction within the same inner shareable domain
Date: Mon, 8 Jul 2019 20:29:26 -0400 [thread overview]
Message-ID: <d0879ecc-78c6-b66f-3525-aa1ce175178f@jonmasters.org> (raw)
In-Reply-To: <675313fe-007b-c850-d730-a629b82ccfc8@jonmasters.org>
On 7/8/19 8:25 PM, Jon Masters wrote:
> On 7/2/19 10:45 PM, qi.fuli@fujitsu.com wrote:
>
>> However, we found that with the increase of that the TLB flash was called,
>> the noise was also increasing. Here we understood that the cause of this
>> issue is the implementation of Linux's TLB flush for arm64, especially use of
>> TLBI-is instruction which is a broadcast to all processor core on the system.
>
> Are you saying that for a microbenchmark in which very large numbers of
> threads are created and destroyed rapidly there are a large number of
> associated tlb range flushes which always use broadcast TLBIs?
>
> If that's the case, and the hardware doesn't do any ASID filtering and
> each TLBI results in a DVM to every PE, would it make sense to look at
> whether there are ways to improve batching/switch to an IPI approach
> rather than relying on broadcasts, as a more generic solution?
What I meant was a heuristic to do this automatically, rather than via a
command line.
Jon.
next prev parent reply other threads:[~2019-07-09 1:02 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-17 14:32 [PATCH 0/2] arm64: Introduce boot parameter to disable TLB flush instruction within the same inner shareable domain Takao Indoh
2019-06-17 14:32 ` [PATCH 1/2] arm64: mm: Restore mm_cpumask (revert commit 38d96287504a ("arm64: mm: kill mm_cpumask usage")) Takao Indoh
2019-07-23 11:55 ` Catalin Marinas
2019-06-17 14:32 ` [PATCH 2/2] arm64: tlb: Add boot parameter to disable TLB flush within the same inner shareable domain Takao Indoh
2019-07-23 12:11 ` Catalin Marinas
2019-06-17 17:03 ` [PATCH 0/2] arm64: Introduce boot parameter to disable TLB flush instruction " Will Deacon
2019-06-24 10:34 ` qi.fuli
2019-06-27 10:27 ` Will Deacon
2019-07-03 2:45 ` qi.fuli
2019-07-09 0:25 ` Jon Masters
2019-07-09 0:29 ` Jon Masters [this message]
2019-07-09 8:03 ` Will Deacon
2019-07-09 8:07 ` Will Deacon
2019-11-01 9:56 ` qi.fuli
2019-11-01 17:28 ` Will Deacon
2019-11-26 14:26 ` Matthias Brugger
2019-11-26 14:36 ` Will Deacon
2019-12-01 16:02 ` Jon Masters
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