From: Bjorn Andersson <andersson@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
bp@alien8.de, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, tony.luck@intel.com
Cc: ahalaney@redhat.com, linux-arm-msm@vger.kernel.org,
rric@kernel.org, konrad.dybcio@linaro.org,
luca.weiss@fairphone.com, mchehab@kernel.org,
james.morse@arm.com, steev@kali.org,
linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org,
quic_ppareek@quicinc.com
Subject: Re: (subset) [PATCH v8 00/14] Qcom: LLCC/EDAC: Fix base address used for LLCC banks
Date: Wed, 15 Mar 2023 16:35:17 -0700 [thread overview]
Message-ID: <167892332567.4030021.13563397357786290320.b4-ty@kernel.org> (raw)
In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org>
On Tue, 14 Mar 2023 13:34:29 +0530, Manivannan Sadhasivam wrote:
> The Qualcomm LLCC/EDAC drivers were using a fixed register stride for
> accessing the (Control and Status Regsiters) CSRs of each LLCC bank.
> This offset only works for some SoCs like SDM845 for which driver support
> was initially added.
>
> But the later SoCs use different register stride that vary between the
> banks with holes in-between. So it is not possible to use a single register
> stride for accessing the CSRs of each bank. By doing so could result in a
> crash with the current drivers. So far this crash is not reported since
> EDAC_QCOM driver is not enabled in ARM64 defconfig and no one tested the
> driver extensively by triggering the EDAC IRQ (that's where each bank
> CSRs are accessed).
>
> [...]
Applied, thanks!
[03/14] arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks
commit: bfe088bde391824040c39cbf277d7fe782042936
[04/14] arm64: dts: qcom: sc7180: Fix the base addresses of LLCC banks
commit: 116a932bbc7bc740b068fbfe320a465811ca62f8
[05/14] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks
commit: 62e5ee9db98ed67eb50205072135544055cba9c4
[06/14] arm64: dts: qcom: sc8280xp: Fix the base addresses of LLCC banks
commit: 0fe0955a79b994b8dcabe79f3a7192251fb256ea
[07/14] arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks
commit: c5ccf8d33f11f57ef46d12db1dda4afcc4d5150b
[08/14] arm64: dts: qcom: sm8250: Fix the base addresses of LLCC banks
commit: 42c9b1578233eeb3044656a446486bd2efc87312
[09/14] arm64: dts: qcom: sm8350: Fix the base addresses of LLCC banks
commit: 7ae317cba6be783cfd6155bceec91d0918f78fb8
[10/14] arm64: dts: qcom: sm8450: Fix the base addresses of LLCC banks
commit: 413c8ecd48f1df8034c7b13881ded33b3d10171f
[11/14] arm64: dts: qcom: sm6350: Fix the base addresses of LLCC banks
commit: 65d9975e5dae4601e8902765d08f55c246fd2022
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
prev parent reply other threads:[~2023-03-15 23:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-14 8:04 [PATCH v8 00/14] Qcom: LLCC/EDAC: Fix base address used for LLCC banks Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 01/14] dt-bindings: arm: msm: Update the maintainers for LLCC Manivannan Sadhasivam
2023-03-19 12:46 ` Krzysztof Kozlowski
2023-03-14 8:04 ` [PATCH v8 02/14] dt-bindings: arm: msm: Fix register regions used for LLCC banks Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 03/14] arm64: dts: qcom: sdm845: Fix the base addresses of " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 04/14] arm64: dts: qcom: sc7180: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 05/14] arm64: dts: qcom: sc7280: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 06/14] arm64: dts: qcom: sc8280xp: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 07/14] arm64: dts: qcom: sm8150: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 08/14] arm64: dts: qcom: sm8250: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 09/14] arm64: dts: qcom: sm8350: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 10/14] arm64: dts: qcom: sm8450: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 11/14] arm64: dts: qcom: sm6350: " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 12/14] qcom: llcc/edac: Fix the base address used for accessing " Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 13/14] qcom: llcc/edac: Support polling mode for ECC handling Manivannan Sadhasivam
2023-03-14 8:04 ` [PATCH v8 14/14] soc: qcom: llcc: Do not create EDAC platform device on SDM845 Manivannan Sadhasivam
2023-03-15 23:35 ` Bjorn Andersson [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=167892332567.4030021.13563397357786290320.b4-ty@kernel.org \
--to=andersson@kernel.org \
--cc=ahalaney@redhat.com \
--cc=bp@alien8.de \
--cc=james.morse@arm.com \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luca.weiss@fairphone.com \
--cc=manivannan.sadhasivam@linaro.org \
--cc=mchehab@kernel.org \
--cc=quic_ppareek@quicinc.com \
--cc=robh+dt@kernel.org \
--cc=rric@kernel.org \
--cc=steev@kali.org \
--cc=tony.luck@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).