From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <bp@alien8.de>, <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <muralidhara.mk@amd.com>,
<naveenkrishna.chatradhi@amd.com>,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v2 07/22] EDAC/amd64: Split get_csrow_nr_pages() into dct/umc functions
Date: Fri, 27 Jan 2023 17:04:04 +0000 [thread overview]
Message-ID: <20230127170419.1824692-8-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20230127170419.1824692-1-yazen.ghannam@amd.com>
Split get_csrow_nr_pages() into a legacy and modern versions in preparation
for further legacy/modern refactoring.
Also, rename f17_get_cs_mode() to match the new convention.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lore.kernel.org/r/20220509145534.44912-1-yazen.ghannam@amd.com
v1->v2:
* New in v2.
drivers/edac/amd64_edac.c | 40 +++++++++++++++++++++++++--------------
1 file changed, 26 insertions(+), 14 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 2d0558aeca28..5559d05fb15d 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1392,7 +1392,7 @@ static void debug_dump_dramcfg_low(struct amd64_pvt *pvt, u32 dclr, int chan)
#define CS_EVEN (CS_EVEN_PRIMARY | CS_EVEN_SECONDARY)
#define CS_ODD (CS_ODD_PRIMARY | CS_ODD_SECONDARY)
-static int f17_get_cs_mode(int dimm, u8 ctrl, struct amd64_pvt *pvt)
+static int umc_get_cs_mode(int dimm, u8 ctrl, struct amd64_pvt *pvt)
{
u8 base, count = 0;
int cs_mode = 0;
@@ -1434,7 +1434,7 @@ static void umc_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
cs0 = dimm * 2;
cs1 = dimm * 2 + 1;
- cs_mode = f17_get_cs_mode(dimm, ctrl, pvt);
+ cs_mode = umc_get_cs_mode(dimm, ctrl, pvt);
size0 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs0);
size1 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs1);
@@ -3389,24 +3389,36 @@ static void read_mc_regs(struct amd64_pvt *pvt)
* encompasses
*
*/
-static u32 get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr_orig)
+static u32 dct_get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
{
u32 dbam = dct ? pvt->dbam1 : pvt->dbam0;
- int csrow_nr = csrow_nr_orig;
u32 cs_mode, nr_pages;
- if (!pvt->umc) {
- csrow_nr >>= 1;
- cs_mode = DBAM_DIMM(csrow_nr, dbam);
- } else {
- cs_mode = f17_get_cs_mode(csrow_nr >> 1, dct, pvt);
- }
+ csrow_nr >>= 1;
+ cs_mode = DBAM_DIMM(csrow_nr, dbam);
nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode, csrow_nr);
nr_pages <<= 20 - PAGE_SHIFT;
edac_dbg(0, "csrow: %d, channel: %d, DBAM idx: %d\n",
- csrow_nr_orig, dct, cs_mode);
+ csrow_nr, dct, cs_mode);
+ edac_dbg(0, "nr_pages/channel: %u\n", nr_pages);
+
+ return nr_pages;
+}
+
+static u32 umc_get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr_orig)
+{
+ int csrow_nr = csrow_nr_orig;
+ u32 cs_mode, nr_pages;
+
+ cs_mode = umc_get_cs_mode(csrow_nr >> 1, dct, pvt);
+
+ nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode, csrow_nr);
+ nr_pages <<= 20 - PAGE_SHIFT;
+
+ edac_dbg(0, "csrow: %d, channel: %d, cs_mode %d\n",
+ csrow_nr_orig, dct, cs_mode);
edac_dbg(0, "nr_pages/channel: %u\n", nr_pages);
return nr_pages;
@@ -3445,7 +3457,7 @@ static int init_csrows_df(struct mem_ctl_info *mci)
edac_dbg(1, "MC node: %d, csrow: %d\n",
pvt->mc_node_id, cs);
- dimm->nr_pages = get_csrow_nr_pages(pvt, umc, cs);
+ dimm->nr_pages = umc_get_csrow_nr_pages(pvt, umc, cs);
dimm->mtype = pvt->umc[umc].dram_type;
dimm->edac_mode = edac_mode;
dimm->dtype = dev_type;
@@ -3501,13 +3513,13 @@ static int init_csrows(struct mem_ctl_info *mci)
pvt->mc_node_id, i);
if (row_dct0) {
- nr_pages = get_csrow_nr_pages(pvt, 0, i);
+ nr_pages = dct_get_csrow_nr_pages(pvt, 0, i);
csrow->channels[0]->dimm->nr_pages = nr_pages;
}
/* K8 has only one DCT */
if (pvt->fam != 0xf && row_dct1) {
- int row_dct1_pages = get_csrow_nr_pages(pvt, 1, i);
+ int row_dct1_pages = dct_get_csrow_nr_pages(pvt, 1, i);
csrow->channels[1]->dimm->nr_pages = row_dct1_pages;
nr_pages += row_dct1_pages;
--
2.25.1
next prev parent reply other threads:[~2023-01-27 17:05 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-27 17:03 [PATCH v2 00/22] AMD64 EDAC Cleanup and Refactor Yazen Ghannam
2023-01-27 17:03 ` [PATCH v2 01/22] EDAC/amd64: Don't set up EDAC PCI control on Family 17h+ Yazen Ghannam
2023-01-27 17:03 ` [PATCH v2 02/22] EDAC/amd64: Remove scrub rate control for Family 17h and later Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 03/22] EDAC/amd64: Remove PCI Function 6 Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 04/22] EDAC/amd64: Remove PCI Function 0 Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 05/22] EDAC/amd64: Remove early_channel_count() Yazen Ghannam
2023-02-10 12:16 ` Borislav Petkov
2023-02-13 16:54 ` Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 06/22] EDAC/amd64: Rename debug_display_dimm_sizes() Yazen Ghannam
2023-02-09 14:25 ` Borislav Petkov
2023-02-13 16:53 ` Yazen Ghannam
2023-01-27 17:04 ` Yazen Ghannam [this message]
2023-01-27 17:04 ` [PATCH v2 08/22] EDAC/amd64: Drop dbam_to_cs() for Family 17h and later Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 09/22] EDAC/amd64: Don't find ECC symbol size " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 10/22] EDAC/amd64: Merge struct amd64_family_type into struct amd64_pvt Yazen Ghannam
2023-03-18 15:39 ` Borislav Petkov
2023-01-27 17:04 ` [PATCH v2 11/22] EDAC/amd64: Rework hw_info_{get,put} Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 12/22] EDAC/amd64: Split prep_chip_selects() into dct/umc functions Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 13/22] EDAC/amd64: Split read_base_mask() " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 14/22] EDAC/amd64: Split determine_memory_type() " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 15/22] EDAC/amd64: Split read_mc_regs() " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 16/22] EDAC/amd64: Split ecc_enabled() " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 17/22] EDAC/amd64: Split setup_mci_misc_attrs() " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 18/22] EDAC/amd64: Rename f17h_determine_edac_ctl_cap() Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 19/22] EDAC/amd64: Split determine_edac_cap() into dct/umc functions Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 20/22] EDAC/amd64: Split init_csrows() " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 21/22] EDAC/amd64: Split dump_misc_regs() " Yazen Ghannam
2023-01-27 17:04 ` [PATCH v2 22/22] EDAC/amd64: Add get_err_info() to pvt->ops Yazen Ghannam
2023-03-23 11:01 ` [PATCH v2 00/22] AMD64 EDAC Cleanup and Refactor Borislav Petkov
2023-03-23 15:19 ` Yazen Ghannam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230127170419.1824692-8-yazen.ghannam@amd.com \
--to=yazen.ghannam@amd.com \
--cc=bp@alien8.de \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=muralidhara.mk@amd.com \
--cc=naveenkrishna.chatradhi@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).