From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <bp@alien8.de>, <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <avadhut.naik@amd.com>,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code
Date: Mon, 10 Apr 2023 15:33:57 -0500 [thread overview]
Message-ID: <20230410203357.17704-1-yazen.ghannam@amd.com> (raw)
The "L0" cache level is listed as "reserved" in legacy documentation.
This has now been defined as "Core" in current documentation for
Zen-based systems.
Update the cache level strings to include this new definition.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
drivers/edac/mce_amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index cc5c63feb26a..1d1b9da3b9bd 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder);
static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" };
/* cache level */
-static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" };
+static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" };
/* memory transaction type */
static const char * const rrrr_msgs[] = {
--
2.34.1
next reply other threads:[~2023-04-10 20:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-10 20:33 Yazen Ghannam [this message]
2023-04-10 20:47 ` [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code Borislav Petkov
2023-04-10 20:53 ` Yazen Ghannam
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