[PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6

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* [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo
@ 2023-08-07 12:38 Peter Zijlstra
  2023-08-07 12:38 ` [PATCH 1/3] x86/cpu: Fix Gracemont uarch Peter Zijlstra
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Peter Zijlstra @ 2023-08-07 12:38 UTC (permalink / raw)
  To: x86
  Cc: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
	namhyung, irogers, adrian.hunter, tglx, bp, dave.hansen, hpa,
	Tony Luck, luto, james.morse, mchehab, rric, jacob.jun.pan, lenb,
	irenic.rajneesh, david.e.box, hdegoede, markgross,
	srinivas.pandruvada, rafael, daniel.lezcano, amitk, rui.zhang,
	linux-perf-users, linux-kernel, linux-edac, linux-pm,
	platform-driver-x86

Hi,

I seem to have missed 'spring' but here goes...


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/3] x86/cpu: Fix Gracemont uarch
  2023-08-07 12:38 [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Peter Zijlstra
@ 2023-08-07 12:38 ` Peter Zijlstra
  2023-08-07 12:38 ` [PATCH 2/3] x86/cpu: Fix Crestmont uarch Peter Zijlstra
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Peter Zijlstra @ 2023-08-07 12:38 UTC (permalink / raw)
  To: x86
  Cc: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
	namhyung, irogers, adrian.hunter, tglx, bp, dave.hansen, hpa,
	Tony Luck, luto, james.morse, mchehab, rric, jacob.jun.pan, lenb,
	irenic.rajneesh, david.e.box, hdegoede, markgross,
	srinivas.pandruvada, rafael, daniel.lezcano, amitk, rui.zhang,
	linux-perf-users, linux-kernel, linux-edac, linux-pm,
	platform-driver-x86

Alderlake N is an E-core only product using Gracemont
micro-architecture. It fits the pre-existing naming scheme perfectly
fine, adhere to it.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/events/intel/core.c              |    2 +-
 arch/x86/events/intel/cstate.c            |    2 +-
 arch/x86/events/intel/uncore.c            |    2 +-
 arch/x86/events/msr.c                     |    2 +-
 arch/x86/events/rapl.c                    |    2 +-
 arch/x86/include/asm/intel-family.h       |    3 ++-
 arch/x86/kernel/cpu/intel_epb.c           |    2 +-
 arch/x86/mm/init.c                        |    2 +-
 drivers/idle/intel_idle.c                 |   10 +++++-----
 drivers/platform/x86/intel/pmc/core.c     |    2 +-
 drivers/powercap/intel_rapl_common.c      |    2 +-
 drivers/powercap/intel_rapl_msr.c         |    2 +-
 drivers/thermal/intel/intel_tcc_cooling.c |    2 +-
 tools/power/x86/turbostat/turbostat.c     |    2 +-
 14 files changed, 19 insertions(+), 18 deletions(-)

--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6167,7 +6167,7 @@ __init int intel_pmu_init(void)
 		name = "Tremont";
 		break;
 
-	case INTEL_FAM6_ALDERLAKE_N:
+	case INTEL_FAM6_ATOM_GRACEMONT:
 		x86_pmu.mid_ack = true;
 		memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
 		       sizeof(hw_cache_event_ids));
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -669,6 +669,7 @@ static const struct x86_cpu_id intel_cst
 	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&glm_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT,	&glm_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,	&glm_cstates),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&adl_cstates),
 
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,		&icl_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE,		&icl_cstates),
@@ -684,7 +685,6 @@ static const struct x86_cpu_id intel_cst
 	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&icl_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&adl_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&adl_cstates),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		&adl_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&adl_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,	&adl_cstates),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&adl_cstates),
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1858,7 +1858,6 @@ static const struct x86_cpu_id intel_unc
 	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&rkl_uncore_init),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&adl_uncore_init),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&adl_uncore_init),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		&adl_uncore_init),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&adl_uncore_init),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,	&adl_uncore_init),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&adl_uncore_init),
@@ -1867,6 +1866,7 @@ static const struct x86_cpu_id intel_unc
 	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&spr_uncore_init),
 	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&spr_uncore_init),
 	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&snr_uncore_init),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&adl_uncore_init),
 	{},
 };
 MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -106,7 +106,7 @@ static bool test_intel(int idx, void *da
 	case INTEL_FAM6_ROCKETLAKE:
 	case INTEL_FAM6_ALDERLAKE:
 	case INTEL_FAM6_ALDERLAKE_L:
-	case INTEL_FAM6_ALDERLAKE_N:
+	case INTEL_FAM6_ATOM_GRACEMONT:
 	case INTEL_FAM6_RAPTORLAKE:
 	case INTEL_FAM6_RAPTORLAKE_P:
 	case INTEL_FAM6_RAPTORLAKE_S:
--- a/arch/x86/events/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -804,7 +804,7 @@ static const struct x86_cpu_id rapl_mode
 	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&model_skl),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&model_skl),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&model_skl),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		&model_skl),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&model_skl),
 	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&model_spr),
 	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&model_spr),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&model_skl),
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -114,7 +114,6 @@
 
 #define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */
 #define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */
-#define INTEL_FAM6_ALDERLAKE_N		0xBE
 
 #define INTEL_FAM6_RAPTORLAKE		0xB7
 #define INTEL_FAM6_RAPTORLAKE_P		0xBA
@@ -154,6 +153,8 @@
 #define INTEL_FAM6_ATOM_TREMONT		0x96 /* Elkhart Lake */
 #define INTEL_FAM6_ATOM_TREMONT_L	0x9C /* Jasper Lake */
 
+#define INTEL_FAM6_ATOM_GRACEMONT	0xBE /* Alderlake N */
+
 #define INTEL_FAM6_SIERRAFOREST_X	0xAF
 
 #define INTEL_FAM6_GRANDRIDGE		0xB6
--- a/arch/x86/kernel/cpu/intel_epb.c
+++ b/arch/x86/kernel/cpu/intel_epb.c
@@ -206,7 +206,7 @@ static int intel_epb_offline(unsigned in
 static const struct x86_cpu_id intel_epb_normal[] = {
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,
 				   ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,
 				   ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,
 				   ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -273,7 +273,7 @@ static void __init probe_page_size_mask(
 static const struct x86_cpu_id invlpg_miss_ids[] = {
 	INTEL_MATCH(INTEL_FAM6_ALDERLAKE   ),
 	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),
-	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N ),
+	INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ),
 	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE  ),
 	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),
 	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -960,7 +960,7 @@ static struct cpuidle_state adl_l_cstate
 		.enter = NULL }
 };
 
-static struct cpuidle_state adl_n_cstates[] __initdata = {
+static struct cpuidle_state gmt_cstates[] __initdata = {
 	{
 		.name = "C1",
 		.desc = "MWAIT 0x00",
@@ -1405,8 +1405,8 @@ static const struct idle_cpu idle_cpu_ad
 	.state_table = adl_l_cstates,
 };
 
-static const struct idle_cpu idle_cpu_adl_n __initconst = {
-	.state_table = adl_n_cstates,
+static const struct idle_cpu idle_cpu_gmt __initconst = {
+	.state_table = gmt_cstates,
 };
 
 static const struct idle_cpu idle_cpu_spr __initconst = {
@@ -1479,7 +1479,7 @@ static const struct x86_cpu_id intel_idl
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&idle_cpu_icx),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&idle_cpu_adl),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&idle_cpu_adl_l),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		&idle_cpu_adl_n),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&idle_cpu_gmt),
 	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&idle_cpu_spr),
 	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&idle_cpu_spr),
 	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,	&idle_cpu_knl),
@@ -1979,7 +1979,7 @@ static void __init intel_idle_init_cstat
 		break;
 	case INTEL_FAM6_ALDERLAKE:
 	case INTEL_FAM6_ALDERLAKE_L:
-	case INTEL_FAM6_ALDERLAKE_N:
+	case INTEL_FAM6_ATOM_GRACEMONT:
 		adl_idle_state_table_update();
 		break;
 	}
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1123,7 +1123,7 @@ static const struct x86_cpu_id intel_pmc
 	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,	icl_core_init),
 	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		tgl_core_init),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		tgl_core_init),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		tgl_core_init),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	tgl_core_init),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		adl_core_init),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,        tgl_core_init),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		adl_core_init),
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -1250,7 +1250,7 @@ static const struct x86_cpu_id rapl_ids[
 	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&rapl_defaults_core),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&rapl_defaults_core),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&rapl_defaults_core),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		&rapl_defaults_core),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&rapl_defaults_core),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&rapl_defaults_core),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,        &rapl_defaults_core),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&rapl_defaults_core),
--- a/drivers/powercap/intel_rapl_msr.c
+++ b/drivers/powercap/intel_rapl_msr.c
@@ -141,7 +141,7 @@ static const struct x86_cpu_id pl4_suppo
 	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, NULL),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL),
--- a/drivers/thermal/intel/intel_tcc_cooling.c
+++ b/drivers/thermal/intel/intel_tcc_cooling.c
@@ -60,7 +60,7 @@ static const struct x86_cpu_id tcc_ids[]
 	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
-	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, NULL),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
 	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL),
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -5447,7 +5447,7 @@ unsigned int intel_model_duplicates(unsi
 	case INTEL_FAM6_LAKEFIELD:
 	case INTEL_FAM6_ALDERLAKE:
 	case INTEL_FAM6_ALDERLAKE_L:
-	case INTEL_FAM6_ALDERLAKE_N:
+	case INTEL_FAM6_ATOM_GRACEMONT:
 	case INTEL_FAM6_RAPTORLAKE:
 	case INTEL_FAM6_RAPTORLAKE_P:
 	case INTEL_FAM6_RAPTORLAKE_S:



^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 2/3] x86/cpu: Fix Crestmont uarch
  2023-08-07 12:38 [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Peter Zijlstra
  2023-08-07 12:38 ` [PATCH 1/3] x86/cpu: Fix Gracemont uarch Peter Zijlstra
@ 2023-08-07 12:38 ` Peter Zijlstra
  2023-08-07 12:38 ` [PATCH 3/3] x86/cpu: Update Hybrids Peter Zijlstra
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Peter Zijlstra @ 2023-08-07 12:38 UTC (permalink / raw)
  To: x86
  Cc: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
	namhyung, irogers, adrian.hunter, tglx, bp, dave.hansen, hpa,
	Tony Luck, luto, james.morse, mchehab, rric, jacob.jun.pan, lenb,
	irenic.rajneesh, david.e.box, hdegoede, markgross,
	srinivas.pandruvada, rafael, daniel.lezcano, amitk, rui.zhang,
	linux-perf-users, linux-kernel, linux-edac, linux-pm,
	platform-driver-x86

Sierra Forest and Grand Ridge are both E-core only using Crestmont
micro-architecture, They fit the pre-existing naming scheme prefectly
fine, adhere to it.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/include/asm/intel-family.h                         |    5 ++---
 drivers/edac/i10nm_base.c                                   |    2 +-
 drivers/platform/x86/intel/speed_select_if/isst_if_common.c |    2 +-
 3 files changed, 4 insertions(+), 5 deletions(-)

--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -155,9 +155,8 @@
 
 #define INTEL_FAM6_ATOM_GRACEMONT	0xBE /* Alderlake N */
 
-#define INTEL_FAM6_SIERRAFOREST_X	0xAF
-
-#define INTEL_FAM6_GRANDRIDGE		0xB6
+#define INTEL_FAM6_ATOM_CRESTMONT_X	0xAF /* Sierra Forest */
+#define INTEL_FAM6_ATOM_CRESTMONT	0xB6 /* Grand Ridge */
 
 /* Xeon Phi */
 
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -906,7 +906,7 @@ static const struct x86_cpu_id i10nm_cpu
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
-	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SIERRAFOREST_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
 	{}
 };
 MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
@@ -720,7 +720,7 @@ static struct miscdevice isst_if_char_dr
 
 static const struct x86_cpu_id hpm_cpu_ids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X,	NULL),
-	X86_MATCH_INTEL_FAM6_MODEL(SIERRAFOREST_X,	NULL),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,	NULL),
 	{}
 };
 



^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 3/3] x86/cpu: Update Hybrids
  2023-08-07 12:38 [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Peter Zijlstra
  2023-08-07 12:38 ` [PATCH 1/3] x86/cpu: Fix Gracemont uarch Peter Zijlstra
  2023-08-07 12:38 ` [PATCH 2/3] x86/cpu: Fix Crestmont uarch Peter Zijlstra
@ 2023-08-07 12:38 ` Peter Zijlstra
  2023-08-07 17:36 ` [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Rafael J. Wysocki
  2023-08-07 17:56 ` Hans de Goede
  4 siblings, 0 replies; 6+ messages in thread
From: Peter Zijlstra @ 2023-08-07 12:38 UTC (permalink / raw)
  To: x86
  Cc: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
	namhyung, irogers, adrian.hunter, tglx, bp, dave.hansen, hpa,
	Tony Luck, luto, james.morse, mchehab, rric, jacob.jun.pan, lenb,
	irenic.rajneesh, david.e.box, hdegoede, markgross,
	srinivas.pandruvada, rafael, daniel.lezcano, amitk, rui.zhang,
	linux-perf-users, linux-kernel, linux-edac, linux-pm,
	platform-driver-x86

Give the hybrid thingies their own section, appropriately between Core
and Atom.

Add the Raptor Lake uarch names.

Put Lunar Lake after Arrow Lake per interweb guidance.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/include/asm/intel-family.h |   12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -98,8 +98,6 @@
 #define INTEL_FAM6_ICELAKE_L		0x7E	/* Sunny Cove */
 #define INTEL_FAM6_ICELAKE_NNPI		0x9D	/* Sunny Cove */
 
-#define INTEL_FAM6_LAKEFIELD		0x8A	/* Sunny Cove / Tremont */
-
 #define INTEL_FAM6_ROCKETLAKE		0xA7	/* Cypress Cove */
 
 #define INTEL_FAM6_TIGERLAKE_L		0x8C	/* Willow Cove */
@@ -112,20 +110,24 @@
 #define INTEL_FAM6_GRANITERAPIDS_X	0xAD
 #define INTEL_FAM6_GRANITERAPIDS_D	0xAE
 
+/* "Hybrid" Processors (P-Core/E-Core) */
+
+#define INTEL_FAM6_LAKEFIELD		0x8A	/* Sunny Cove / Tremont */
+
 #define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */
 #define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */
 
-#define INTEL_FAM6_RAPTORLAKE		0xB7
+#define INTEL_FAM6_RAPTORLAKE		0xB7	/* Raptor Cove / Enhanced Gracemont */
 #define INTEL_FAM6_RAPTORLAKE_P		0xBA
 #define INTEL_FAM6_RAPTORLAKE_S		0xBF
 
 #define INTEL_FAM6_METEORLAKE		0xAC
 #define INTEL_FAM6_METEORLAKE_L		0xAA
 
-#define INTEL_FAM6_LUNARLAKE_M		0xBD
-
 #define INTEL_FAM6_ARROWLAKE		0xC6
 
+#define INTEL_FAM6_LUNARLAKE_M		0xBD
+
 /* "Small Core" Processors (Atom/E-Core) */
 
 #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */



^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo
  2023-08-07 12:38 [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Peter Zijlstra
                   ` (2 preceding siblings ...)
  2023-08-07 12:38 ` [PATCH 3/3] x86/cpu: Update Hybrids Peter Zijlstra
@ 2023-08-07 17:36 ` Rafael J. Wysocki
  2023-08-07 17:56 ` Hans de Goede
  4 siblings, 0 replies; 6+ messages in thread
From: Rafael J. Wysocki @ 2023-08-07 17:36 UTC (permalink / raw)
  To: Peter Zijlstra
  Cc: x86, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
	namhyung, irogers, adrian.hunter, tglx, bp, dave.hansen, hpa,
	Tony Luck, luto, james.morse, mchehab, rric, jacob.jun.pan, lenb,
	irenic.rajneesh, david.e.box, hdegoede, markgross,
	srinivas.pandruvada, rafael, daniel.lezcano, amitk, rui.zhang,
	linux-perf-users, linux-kernel, linux-edac, linux-pm,
	platform-driver-x86

On Mon, Aug 7, 2023 at 5:07 PM Peter Zijlstra <peterz@infradead.org> wrote:
>
> Hi,
>
> I seem to have missed 'spring' but here goes...

FWIW

Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo
  2023-08-07 12:38 [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Peter Zijlstra
                   ` (3 preceding siblings ...)
  2023-08-07 17:36 ` [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Rafael J. Wysocki
@ 2023-08-07 17:56 ` Hans de Goede
  4 siblings, 0 replies; 6+ messages in thread
From: Hans de Goede @ 2023-08-07 17:56 UTC (permalink / raw)
  To: Peter Zijlstra, x86
  Cc: mingo, acme, mark.rutland, alexander.shishkin, jolsa, namhyung,
	irogers, adrian.hunter, tglx, bp, dave.hansen, hpa, Tony Luck,
	luto, james.morse, mchehab, rric, jacob.jun.pan, lenb,
	irenic.rajneesh, david.e.box, markgross, srinivas.pandruvada,
	rafael, daniel.lezcano, amitk, rui.zhang, linux-perf-users,
	linux-kernel, linux-edac, linux-pm, platform-driver-x86

Hi,

On 8/7/23 14:38, Peter Zijlstra wrote:
> Hi,
> 
> I seem to have missed 'spring' but here goes...

Thanks, series looks good to me:

Acked-by: Hans de Goede <hdegoede@redhat.com>

For the few small drivers/platform/x86 changes.

Feel free to merge this through whatever tree is convenient.

Regards,

Hans




^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2023-08-07 17:57 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-08-07 12:38 [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Peter Zijlstra
2023-08-07 12:38 ` [PATCH 1/3] x86/cpu: Fix Gracemont uarch Peter Zijlstra
2023-08-07 12:38 ` [PATCH 2/3] x86/cpu: Fix Crestmont uarch Peter Zijlstra
2023-08-07 12:38 ` [PATCH 3/3] x86/cpu: Update Hybrids Peter Zijlstra
2023-08-07 17:36 ` [PATCH 0/3] x86/cpu: Cleanup of INTEL_FAM6_foo Rafael J. Wysocki
2023-08-07 17:56 ` Hans de Goede

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