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From: Thor Thayer <thor.thayer@linux.intel.com>
To: bp@alien8.de, mchehab@kernel.org, james.morse@arm.com,
	robh+dt@kernel.org, mark.rutland@arm.com, dinguyen@kernel.org
Cc: devicetree@vger.kernel.org, linux-edac@vger.kernel.org
Subject: Re: [PATCH 2/3] arm64: dts: Stratix10: Include regs in SDRAM ECC node
Date: Fri, 12 Jul 2019 10:27:47 -0500
Message-ID: <31193266-7b1c-6b25-bba7-33a76f3a79de@linux.intel.com> (raw)
In-Reply-To: <1562711090-900-3-git-send-email-thor.thayer@linux.intel.com>

On 7/9/19 5:24 PM, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Include the regs directly in the SDRAM node instead of using
> a syscon. The Stratix10 SDRAM ECC registers are partitioned
> away from other Sys Manager registers so the syscon is no
> longer needed for Stratix10.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
>   arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 9 ++-------
>   1 file changed, 2 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index 4b0f674df849..a1e9545de3d3 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> @@ -517,11 +517,6 @@
>   			status = "disabled";
>   		};
>   
> -		sdr: sdr@f8011100 {
> -			compatible = "altr,sdr-ctl", "syscon";
> -			reg = <0xf8011100 0xc0>;
> -		};
> -
>   		eccmgr {
>   			compatible = "altr,socfpga-s10-ecc-manager",
>   				     "altr,socfpga-a10-ecc-manager";
> @@ -533,9 +528,9 @@
>   			#interrupt-cells = <2>;
>   			ranges;
>   
> -			sdramedac {
> +			sdramedac@0xf8011100 {
>   				compatible = "altr,sdram-edac-s10";
> -				altr,sdr-syscon = <&sdr>;
> +				reg = <0xf8011100 0xc0>;
>   				interrupts = <16 4>;
>   			};
>   
> 
Please disregard this patch, there is a simpler solution that I will 
submit shortly.

  reply index

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-09 22:24 [PATCH 0/3] Stratix10 SDRAM Common EDAC Framework thor.thayer
2019-07-09 22:24 ` [PATCH 1/3] Documentation: dt: edac: Add reg to S10 SDRAM node thor.thayer
2019-07-12 15:27   ` Thor Thayer
2019-07-09 22:24 ` [PATCH 2/3] arm64: dts: Stratix10: Include regs in SDRAM ECC node thor.thayer
2019-07-12 15:27   ` Thor Thayer [this message]
2019-07-09 22:24 ` [PATCH 3/3] EDAC, altera: Use common framework for Stratix10 SDRAM ECC thor.thayer
2019-07-12 15:26 ` [PATCH 0/3] Stratix10 SDRAM Common EDAC Framework Thor Thayer

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