* [3/6] arm64: dts: stratix10: Add SDRAM node
@ 2018-09-24 20:42 thor.thayer
0 siblings, 0 replies; 4+ messages in thread
From: thor.thayer @ 2018-09-24 20:42 UTC (permalink / raw)
To: Dinh Nguyen, robh+dt, mark.rutland, bp, mchehab; +Cc: devicetree, linux-edac
On 09/24/2018 10:40 AM, Dinh Nguyen wrote:
>
>
> On 09/19/2018 02:38 PM, thor.thayer@linux.intel.com wrote:
>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>
>> Add the SDRAM node to follow the Arria10 layout and
>> bindings. The Arria10 SDRAM functions expect this
>> node.
>>
>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>> ---
>> arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> index 78b4b06e8935..ee1d4b8ba631 100644
>> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> @@ -467,6 +467,11 @@
>> status = "disabled";
>> };
>>
>> + sdr: sdr@ffc25000 {
>
> Should this be "sdr: sdr@f8011100" ?
>
Whoops. Yes, you are correct. I'll fix and resubmit. Thanks!
>> + compatible = "altr,sdr-ctl", "syscon";
>> + reg = <0xf8011100 0xc0>;
>> + };
>> +
>> eccmgr {
>
>
> Dinh
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [3/6] arm64: dts: stratix10: Add SDRAM node
@ 2018-09-24 22:27 Dinh Nguyen
0 siblings, 0 replies; 4+ messages in thread
From: Dinh Nguyen @ 2018-09-24 22:27 UTC (permalink / raw)
To: thor.thayer, robh+dt, mark.rutland, bp, mchehab; +Cc: devicetree, linux-edac
On 09/24/2018 03:42 PM, Thor Thayer wrote:
> On 09/24/2018 10:40 AM, Dinh Nguyen wrote:
>>
>>
>> On 09/19/2018 02:38 PM, thor.thayer@linux.intel.com wrote:
>>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>>
>>> Add the SDRAM node to follow the Arria10 layout and
>>> bindings. The Arria10 SDRAM functions expect this
>>> node.
>>>
>>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>>> ---
>>> arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 6 ++++++
>>> 1 file changed, 6 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>>> b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>>> index 78b4b06e8935..ee1d4b8ba631 100644
>>> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>>> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>>> @@ -467,6 +467,11 @@
>>> status = "disabled";
>>> };
>>> + sdr: sdr@ffc25000 {
>>
>> Should this be "sdr: sdr@f8011100" ?
>>
> Whoops. Yes, you are correct. I'll fix and resubmit. Thanks!
>
Feel free to add my ack when you resubmit.
Also, I noticed the same error in socfpga_arria10.dtsi, can you send a
patch to fix that too?
Thanks,
Dinh
^ permalink raw reply [flat|nested] 4+ messages in thread
* [3/6] arm64: dts: stratix10: Add SDRAM node
@ 2018-09-24 15:40 Dinh Nguyen
0 siblings, 0 replies; 4+ messages in thread
From: Dinh Nguyen @ 2018-09-24 15:40 UTC (permalink / raw)
To: thor.thayer, robh+dt, mark.rutland, bp, mchehab; +Cc: devicetree, linux-edac
On 09/19/2018 02:38 PM, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
>
> Add the SDRAM node to follow the Arria10 layout and
> bindings. The Arria10 SDRAM functions expect this
> node.
>
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index 78b4b06e8935..ee1d4b8ba631 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> @@ -467,6 +467,11 @@
> status = "disabled";
> };
>
> + sdr: sdr@ffc25000 {
Should this be "sdr: sdr@f8011100" ?
> + compatible = "altr,sdr-ctl", "syscon";
> + reg = <0xf8011100 0xc0>;
> + };
> +
> eccmgr {
Dinh
^ permalink raw reply [flat|nested] 4+ messages in thread
* [3/6] arm64: dts: stratix10: Add SDRAM node
@ 2018-09-19 19:38 thor.thayer
0 siblings, 0 replies; 4+ messages in thread
From: thor.thayer @ 2018-09-19 19:38 UTC (permalink / raw)
To: dinguyen, robh+dt, mark.rutland, bp, mchehab
Cc: thor.thayer, devicetree, linux-edac
From: Thor Thayer <thor.thayer@linux.intel.com>
Add the SDRAM node to follow the Arria10 layout and
bindings. The Arria10 SDRAM functions expect this
node.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 78b4b06e8935..ee1d4b8ba631 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -467,6 +467,11 @@
status = "disabled";
};
+ sdr: sdr@ffc25000 {
+ compatible = "altr,sdr-ctl", "syscon";
+ reg = <0xf8011100 0xc0>;
+ };
+
eccmgr {
compatible = "altr,socfpga-s10-ecc-manager";
altr,sysmgr-syscon = <&sysmgr>;
@@ -479,6 +484,7 @@
sdramedac {
compatible = "altr,sdram-edac-s10";
+ altr,sdr-syscon = <&sdr>;
interrupts = <16 4>, <48 4>;
};
};
^ permalink raw reply related [flat|nested] 4+ messages in thread
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