From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Kees Cook <keescook@chromium.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Mark Brown <broonie@kernel.org>
Subject: [PATCH v3 12/30] arm64: head: cover entire kernel image in initial ID map
Date: Mon, 11 Apr 2022 11:48:06 +0200 [thread overview]
Message-ID: <20220411094824.4176877-13-ardb@kernel.org> (raw)
In-Reply-To: <20220411094824.4176877-1-ardb@kernel.org>
As a first step towards avoiding the need to create, tear down and
recreate the kernel virtual mapping with MMU and caches disabled, start
by expanding the ID map so it covers the page tables as well as all
executable code. This will allow us to populate the page tables with the
MMU and caches on, and call KASLR init code before setting up the
virtual mapping.
Since this ID map is only needed at boot, create it as a temporary set
of page tables, and populate the permanent ID map after enabling the MMU
and caches. While at it, switch to read-only attributes for the where
possible, as writable permissions are only needed for the initial kernel
page tables. Note that on 4k granule configurations, the permanent ID
map will now be reduced to a single page rather than a 2M block mapping.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/include/asm/kernel-pgtable.h | 16 ++++++----
arch/arm64/kernel/head.S | 31 +++++++++++++-------
arch/arm64/kernel/vmlinux.lds.S | 7 +++--
arch/arm64/mm/mmu.c | 23 ++++++++++++++-
4 files changed, 59 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/include/asm/kernel-pgtable.h b/arch/arm64/include/asm/kernel-pgtable.h
index 96dc0f7da258..5395e5a04f35 100644
--- a/arch/arm64/include/asm/kernel-pgtable.h
+++ b/arch/arm64/include/asm/kernel-pgtable.h
@@ -35,10 +35,8 @@
*/
#if ARM64_KERNEL_USES_PMD_MAPS
#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1)
-#define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1)
#else
#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS)
-#define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT))
#endif
@@ -87,7 +85,13 @@
+ EARLY_PUDS((vstart), (vend)) /* each PUD needs a next level page table */ \
+ EARLY_PMDS((vstart), (vend))) /* each PMD needs a next level page table */
#define INIT_DIR_SIZE (PAGE_SIZE * EARLY_PAGES(KIMAGE_VADDR, _end))
-#define IDMAP_DIR_SIZE (IDMAP_PGTABLE_LEVELS * PAGE_SIZE)
+
+/* the initial ID map may need two extra pages if it needs to be extended */
+#if VA_BITS < 48
+#define INIT_IDMAP_DIR_SIZE (INIT_DIR_SIZE + (2 * PAGE_SIZE))
+#else
+#define INIT_IDMAP_DIR_SIZE INIT_DIR_SIZE
+#endif
/* Initial memory map size */
#if ARM64_KERNEL_USES_PMD_MAPS
@@ -107,9 +111,11 @@
#define SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
#if ARM64_KERNEL_USES_PMD_MAPS
-#define SWAPPER_MM_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
+#define SWAPPER_RW_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
+#define SWAPPER_RX_MMUFLAGS (SWAPPER_RW_MMUFLAGS | PMD_SECT_RDONLY)
#else
-#define SWAPPER_MM_MMUFLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
+#define SWAPPER_RW_MMUFLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
+#define SWAPPER_RX_MMUFLAGS (SWAPPER_RW_MMUFLAGS | PTE_RDONLY)
#endif
/*
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 6fc8f7f88a1a..4ef12bcdfe6a 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -87,6 +87,7 @@
* x28 clear_page_tables() callee preserved temp register
* x19/x20 __primary_switch() callee preserved temp registers
* x24 __primary_switch() .. relocate_kernel() current RELR displacement
+ * x28 create_idmap() callee preserved temp register
*/
SYM_CODE_START(primary_entry)
bl preserve_boot_args
@@ -296,9 +297,7 @@ SYM_FUNC_START_LOCAL(remap_region)
SYM_FUNC_END(remap_region)
SYM_FUNC_START_LOCAL(create_idmap)
- adrp x0, idmap_pg_dir
- adrp x3, __idmap_text_start // __pa(__idmap_text_start)
-
+ mov x28, lr
/*
* The ID map carries a 1:1 mapping of the physical address range
* covered by the loaded image, which could be anywhere in DRAM. This
@@ -345,11 +344,22 @@ SYM_FUNC_START_LOCAL(create_idmap)
* translation level, but the top-level table has more entries.
*/
#endif
- adr_l x6, __idmap_text_end // __pa(__idmap_text_end)
- mov x7, SWAPPER_MM_MMUFLAGS
+ adrp x0, init_idmap_pg_dir
+ adrp x3, _text
+ adrp x6, _end
+ mov x7, SWAPPER_RX_MMUFLAGS
map_memory x0, x1, x3, x6, x7, x3, IDMAP_PGD_ORDER, x10, x11, x12, x13, x14, EXTRA_SHIFT
+ /* Remap the kernel page tables r/w in the ID map */
+ adrp x1, _text
+ adrp x2, init_pg_dir
+ adr_l x3, init_pg_end - 1
+ bic x4, x2, #SWAPPER_BLOCK_SIZE - 1
+ mov x5, SWAPPER_RW_MMUFLAGS
+ mov x6, #SWAPPER_BLOCK_SHIFT
+ bl remap_region
+
/*
* Since the page tables have been populated with non-cacheable
* accesses (MMU disabled), invalidate those tables again to
@@ -357,9 +367,10 @@ SYM_FUNC_START_LOCAL(create_idmap)
*/
dmb sy
- adrp x0, idmap_pg_dir
- adrp x1, idmap_pg_end
- b dcache_inval_poc // tail call
+ adrp x0, init_idmap_pg_dir
+ adrp x1, init_idmap_pg_end
+ bl dcache_inval_poc
+ ret x28
SYM_FUNC_END(create_idmap)
SYM_FUNC_START_LOCAL(create_kernel_mapping)
@@ -370,7 +381,7 @@ SYM_FUNC_START_LOCAL(create_kernel_mapping)
adrp x3, _text // runtime __pa(_text)
sub x6, x6, x3 // _end - _text
add x6, x6, x5 // runtime __va(_end)
- mov x7, SWAPPER_MM_MMUFLAGS
+ mov x7, SWAPPER_RW_MMUFLAGS
map_memory x0, x1, x5, x6, x7, x3, (VA_BITS - PGDIR_SHIFT), x10, x11, x12, x13, x14
@@ -851,7 +862,7 @@ SYM_FUNC_START_LOCAL(__primary_switch)
#endif
adrp x1, init_pg_dir
- adrp x2, idmap_pg_dir
+ adrp x2, init_idmap_pg_dir
bl __enable_mmu
#ifdef CONFIG_RELOCATABLE
#ifdef CONFIG_RELR
diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index edaf0faf766f..7030b5a57d23 100644
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -195,8 +195,7 @@ SECTIONS
HYPERVISOR_DATA_SECTIONS
idmap_pg_dir = .;
- . += IDMAP_DIR_SIZE;
- idmap_pg_end = .;
+ . += PAGE_SIZE;
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
tramp_pg_dir = .;
@@ -232,6 +231,10 @@ SECTIONS
__inittext_end = .;
__initdata_begin = .;
+ init_idmap_pg_dir = .;
+ . += INIT_IDMAP_DIR_SIZE;
+ init_idmap_pg_end = .;
+
.init.data : {
INIT_DATA
INIT_SETUP(16)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index de171114a979..07219afe2723 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -766,9 +766,28 @@ static void __init map_kernel(pgd_t *pgdp)
kasan_copy_shadow(pgdp);
}
+static void __init create_idmap(void)
+{
+ u64 start = __pa_symbol(__idmap_text_start);
+ u64 size = __pa_symbol(__idmap_text_end) - start;
+ pgd_t *pgd = idmap_pg_dir;
+ u64 pgd_phys;
+
+ /* check if we need an additional level of translation */
+ if (VA_BITS < 48 && idmap_t0sz < TCR_T0SZ(VA_BITS_MIN)) {
+ pgd_phys = early_pgtable_alloc(PAGE_SHIFT);
+ set_pgd(&idmap_pg_dir[start >> VA_BITS],
+ __pgd(pgd_phys | P4D_TYPE_TABLE));
+ pgd = __va(pgd_phys);
+ }
+ __create_pgd_mapping(pgd, start, start, size, PAGE_KERNEL_ROX,
+ early_pgtable_alloc, 0);
+}
+
void __init paging_init(void)
{
pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir));
+ extern pgd_t init_idmap_pg_dir[];
#if VA_BITS > 48
if (cpuid_feature_extract_unsigned_field(
@@ -789,13 +808,15 @@ void __init paging_init(void)
pgd_clear_fixmap();
- cpu_replace_ttbr1(lm_alias(swapper_pg_dir), idmap_pg_dir);
+ cpu_replace_ttbr1(lm_alias(swapper_pg_dir), init_idmap_pg_dir);
init_mm.pgd = swapper_pg_dir;
memblock_phys_free(__pa_symbol(init_pg_dir),
__pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir));
memblock_allow_resize();
+
+ create_idmap();
}
/*
--
2.30.2
next prev parent reply other threads:[~2022-04-11 9:50 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-11 9:47 [PATCH v3 00/30] arm64: support WXN and entry with MMU enabled Ard Biesheuvel
2022-04-11 9:47 ` [PATCH v3 01/30] arm64: head: move kimage_vaddr variable into C file Ard Biesheuvel
2022-04-11 9:47 ` [PATCH v3 02/30] arm64: mm: make vabits_actual a build time constant if possible Ard Biesheuvel
2022-04-11 9:47 ` [PATCH v3 03/30] arm64: head: move assignment of idmap_t0sz to C code Ard Biesheuvel
2022-04-11 9:47 ` [PATCH v3 04/30] arm64: head: drop idmap_ptrs_per_pgd Ard Biesheuvel
2022-04-11 9:47 ` [PATCH v3 05/30] arm64: head: simplify page table mapping macros (slightly) Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 06/30] arm64: head: switch to map_memory macro for the extended ID map Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 07/30] arm64: head: split off idmap creation code Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 08/30] arm64: kernel: drop unnecessary PoC cache clean+invalidate Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 09/30] arm64: head: pass ID map root table address to __enable_mmu() Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 10/30] arm64: mm: provide idmap pointer to cpu_replace_ttbr1() Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 11/30] arm64: head: add helper function to remap regions in early page tables Ard Biesheuvel
2022-04-11 9:48 ` Ard Biesheuvel [this message]
2022-04-11 9:48 ` [PATCH v3 13/30] arm64: head: use relative references to the RELA and RELR tables Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 14/30] arm64: head: create a temporary FDT mapping in the initial ID map Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 15/30] arm64: idreg-override: use early FDT mapping in " Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 16/30] arm64: head: factor out TTBR1 assignment into a macro Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 17/30] arm64: head: populate kernel page tables with MMU and caches on Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 18/30] arm64: head: record CPU boot mode after enabling the MMU Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 19/30] arm64: kaslr: deal with init called with VA randomization enabled Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 20/30] arm64: head: relocate kernel only a single time if KASLR is enabled Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 21/30] arm64: head: remap the kernel text/inittext region read-only Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 22/30] arm64: setup: drop early FDT pointer helpers Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 23/30] arm64: mm: move ro_after_init section into the data segment Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 24/30] arm64: mm: add support for WXN memory translation attribute Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 25/30] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 26/30] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 27/30] arm64: head: clean the ID map page to the PoC Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 28/30] efi: libstub: pass image handle to handle_kernel_image() Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 29/30] efi/arm64: libstub: run image in place if randomized by the loader Ard Biesheuvel
2022-04-11 9:48 ` [PATCH v3 30/30] arm64: efi/libstub: enter with the MMU on if executing in place Ard Biesheuvel
2022-04-12 16:59 ` [PATCH v3 00/30] arm64: support WXN and entry with MMU enabled Kees Cook
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