[PATCH v4 0/4] Add Bitstream configuration support for Versal

[PATCH v4 0/4] Add Bitstream configuration support for Versal

[Nava kishore Manne]

This series Adds FPGA manager driver support for Xilinx Versal SoC.
it uses the firmware interface to configure the programmable logic.

Changes for v4:
		-Rebase the patch series on linux-next.
		https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

Appana Durga Kedareswara rao (1):
  dt-bindings: fpga: Add binding doc for versal fpga manager

Nava kishore Manne (3):
  dt-bindings: firmware: Add bindings for xilinx firmware
  drivers: firmware: Add PDI load API support
  fpga: versal-fpga: Add versal fpga manager driver

 .../firmware/xilinx/xlnx,zynqmp-firmware.yaml |  63 ++++++++++
 .../bindings/fpga/xlnx,versal-fpga.yaml       |  33 +++++
 drivers/firmware/xilinx/zynqmp.c              |  17 +++
 drivers/fpga/Kconfig                          |   9 ++
 drivers/fpga/Makefile                         |   1 +
 drivers/fpga/versal-fpga.c                    | 117 ++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h          |  10 ++
 7 files changed, 250 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
 create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
 create mode 100644 drivers/fpga/versal-fpga.c

-- 
2.17.1

[PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx firmware

[Nava kishore Manne]

Add documentation to describe Xilinx firmware driver bindings.
Firmware driver provides an interface to firmware APIs.
Interface APIs can be used by any driver to communicate
to Platform Management Unit.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v4:
                -Added new yaml file for xilinx firmware
                 as suggested by Rob.

 .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 63 +++++++++++++++++++
 1 file changed, 63 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml

diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
new file mode 100644
index 000000000000..4b97f005bed7
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx firmware driver
+
+maintainers:
+  - Nava kishore Manne <nava.manne@xilinx.com>
+
+description:
+  The zynqmp-firmware node describes the interface to platform firmware.
+  ZynqMP has an interface to communicate with secure firmware. Firmware
+  driver provides an interface to firmware APIs. Interface APIs can be
+  used by any driver to communicate to PMUFW(Platform Management Unit).
+  These requests include clock management, pin control, device control,
+  power management service, FPGA service and other platform management
+  services.
+
+properties:
+  compatible:
+    oneOf:
+      - description:
+          For implementations complying for Zynq Ultrascale+ MPSoC.
+        const: xlnx,zynqmp-firmware
+
+      - description:
+          For implementations complying for Versal.
+        const: xlnx,versal-firmware
+
+  method:
+    description: The method of calling the PM-API firmware layer.
+                #  Permitted values are:
+                #  - "smc" : SMC #0, following the SMCCC
+                #  - "hvc" : HVC #0, following the SMCCC
+    $ref: /schemas/types.yaml#/definitions/string-array
+    enum:
+      - smc
+      - hvc
+
+patternProperties:
+  "fpga":
+    description: Compatible of the FPGA device.
+    type: object
+
+    required:
+      - compatible
+
+required:
+  - compatible
+
+examples:
+  - |
+    versal-firmware {
+      compatible = "xlnx,versal-firmware";
+      method = "smc";
+      fpga {
+        compatible = "xlnx,versal-fpga";
+      };
+    };
+
+additionalProperties: false
-- 
2.17.1

Re: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx firmware

[Rob Herring]

On Thu, 29 Apr 2021 19:34:05 +0530, Nava kishore Manne wrote:
> Add documentation to describe Xilinx firmware driver bindings.
> Firmware driver provides an interface to firmware APIs.
> Interface APIs can be used by any driver to communicate
> to Platform Management Unit.
> 
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> Changes for v4:
>                 -Added new yaml file for xilinx firmware
>                  as suggested by Rob.
> 
>  .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 63 +++++++++++++++++++
>  1 file changed, 63 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/xlnx,versal-clk.example.dt.yaml: zynqmp-firmware: 'clock-controller' does not match any of the regexes: 'fpga', 'pinctrl-[0-9]+'
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.example.dt.yaml: zynqmp-firmware: 'zynqmp-aes' does not match any of the regexes: 'fpga', 'pinctrl-[0-9]+'
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.example.dt.yaml:0:0: /example-0/versal-firmware/fpga: failed to match any schema with compatible: ['xlnx,versal-fpga']

See https://patchwork.ozlabs.org/patch/1471741

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

Re: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx firmware

[Rob Herring]

On Thu, Apr 29, 2021 at 07:34:05PM +0530, Nava kishore Manne wrote:
> Add documentation to describe Xilinx firmware driver bindings.
> Firmware driver provides an interface to firmware APIs.
> Interface APIs can be used by any driver to communicate
> to Platform Management Unit.
> 
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> Changes for v4:
>                 -Added new yaml file for xilinx firmware
>                  as suggested by Rob.
> 
>  .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 63 +++++++++++++++++++
>  1 file changed, 63 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml

What about the old doc?:

Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt

> 
> diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> new file mode 100644
> index 000000000000..4b97f005bed7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx firmware driver
> +
> +maintainers:
> +  - Nava kishore Manne <nava.manne@xilinx.com>
> +
> +description:
> +  The zynqmp-firmware node describes the interface to platform firmware.
> +  ZynqMP has an interface to communicate with secure firmware. Firmware
> +  driver provides an interface to firmware APIs. Interface APIs can be
> +  used by any driver to communicate to PMUFW(Platform Management Unit).
> +  These requests include clock management, pin control, device control,
> +  power management service, FPGA service and other platform management
> +  services.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - description:
> +          For implementations complying for Zynq Ultrascale+ MPSoC.
> +        const: xlnx,zynqmp-firmware
> +
> +      - description:
> +          For implementations complying for Versal.
> +        const: xlnx,versal-firmware
> +
> +  method:
> +    description: The method of calling the PM-API firmware layer.
> +                #  Permitted values are:
> +                #  - "smc" : SMC #0, following the SMCCC
> +                #  - "hvc" : HVC #0, following the SMCCC

Drop the '#'. If you want to maintain the formatting, then use '|' after 
'description:' for a literal block.

> +    $ref: /schemas/types.yaml#/definitions/string-array
> +    enum:
> +      - smc
> +      - hvc
> +
> +patternProperties:
> +  "fpga":

So 'foofpgabar' is valid?

> +    description: Compatible of the FPGA device.
> +    type: object
> +
> +    required:
> +      - compatible

This belongs in the fpga schema which should have a $ref here. (Which 
means this patch needs to come 2nd.)

> +
> +required:
> +  - compatible
> +
> +examples:
> +  - |
> +    versal-firmware {
> +      compatible = "xlnx,versal-firmware";
> +      method = "smc";
> +      fpga {
> +        compatible = "xlnx,versal-fpga";
> +      };
> +    };
> +
> +additionalProperties: false
> -- 
> 2.17.1
> 

RE: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx firmware

[Nava kishore Manne]

Hi Rob,

	Please find my response inline.

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Saturday, May 1, 2021 1:10 AM
> To: Nava kishore Manne <navam@xilinx.com>
> Cc: Michal Simek <michals@xilinx.com>; mdf@kernel.org; trix@redhat.com;
> gregkh@linuxfoundation.org; arnd@arndb.de; Rajan Vaja
> <RAJANV@xilinx.com>; Amit Sunil Dhamne <amitsuni@xlnx.xilinx.com>;
> Manish Narani <MNARANI@xilinx.com>; zou_wei@huawei.com; Sai Krishna
> Potthuri <lakshmis@xilinx.com>; iwamatsu@nigauri.org; Jiaying Liang
> <jliang@xilinx.com>; linus.walleij@linaro.org; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> fpga@vger.kernel.org; chinnikishore369@gmail.com; git <git@xilinx.com>
> Subject: Re: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx
> firmware
> 
> On Thu, Apr 29, 2021 at 07:34:05PM +0530, Nava kishore Manne wrote:
> > Add documentation to describe Xilinx firmware driver bindings.
> > Firmware driver provides an interface to firmware APIs.
> > Interface APIs can be used by any driver to communicate to Platform
> > Management Unit.
> >
> > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > ---
> > Changes for v4:
> >                 -Added new yaml file for xilinx firmware
> >                  as suggested by Rob.
> >
> >  .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 63
> > +++++++++++++++++++
> >  1 file changed, 63 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> firmware
> > .yaml
> 
> What about the old doc?:
> 

As you suggested i have added only the fpga node relevant info here so it's not representing the complete firmware file with other sub node like clk, Aes, ...etc.
Once it completely mature we can deprecate the Old doc.

> Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> firmware.txt
> 
> >
> > diff --git
> > a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> firmwa
> > re.yaml
> > b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> firmwa
> > re.yaml
> > new file mode 100644
> > index 000000000000..4b97f005bed7
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-fi
> > +++ rmware.yaml
> > @@ -0,0 +1,63 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.ya
> > +ml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Xilinx firmware driver
> > +
> > +maintainers:
> > +  - Nava kishore Manne <nava.manne@xilinx.com>
> > +
> > +description:
> > +  The zynqmp-firmware node describes the interface to platform
> firmware.
> > +  ZynqMP has an interface to communicate with secure firmware.
> > +Firmware
> > +  driver provides an interface to firmware APIs. Interface APIs can
> > +be
> > +  used by any driver to communicate to PMUFW(Platform Management
> Unit).
> > +  These requests include clock management, pin control, device
> > +control,
> > +  power management service, FPGA service and other platform
> > +management
> > +  services.
> > +
> > +properties:
> > +  compatible:
> > +    oneOf:
> > +      - description:
> > +          For implementations complying for Zynq Ultrascale+ MPSoC.
> > +        const: xlnx,zynqmp-firmware
> > +
> > +      - description:
> > +          For implementations complying for Versal.
> > +        const: xlnx,versal-firmware
> > +
> > +  method:
> > +    description: The method of calling the PM-API firmware layer.
> > +                #  Permitted values are:
> > +                #  - "smc" : SMC #0, following the SMCCC
> > +                #  - "hvc" : HVC #0, following the SMCCC
> 
> Drop the '#'. If you want to maintain the formatting, then use '|' after
> 'description:' for a literal block.
> 

Will fix in v5.

> > +    $ref: /schemas/types.yaml#/definitions/string-array
> > +    enum:
> > +      - smc
> > +      - hvc
> > +
> > +patternProperties:
> > +  "fpga":
> 
> So 'foofpgabar' is valid?
> 

Yes, it's a valid for fpga node.

> > +    description: Compatible of the FPGA device.
> > +    type: object
> > +
> > +    required:
> > +      - compatible
> 
> This belongs in the fpga schema which should have a $ref here. (Which
> means this patch needs to come 2nd.)
> 

Will fix in v5.

Regards,
Navakishore.

Re: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx firmware

[Rob Herring]

On Tue, May 4, 2021 at 4:34 AM Nava kishore Manne <navam@xilinx.com> wrote:
>
> Hi Rob,
>
>         Please find my response inline.
>
> > -----Original Message-----
> > From: Rob Herring <robh@kernel.org>
> > Sent: Saturday, May 1, 2021 1:10 AM
> > To: Nava kishore Manne <navam@xilinx.com>
> > Cc: Michal Simek <michals@xilinx.com>; mdf@kernel.org; trix@redhat.com;
> > gregkh@linuxfoundation.org; arnd@arndb.de; Rajan Vaja
> > <RAJANV@xilinx.com>; Amit Sunil Dhamne <amitsuni@xlnx.xilinx.com>;
> > Manish Narani <MNARANI@xilinx.com>; zou_wei@huawei.com; Sai Krishna
> > Potthuri <lakshmis@xilinx.com>; iwamatsu@nigauri.org; Jiaying Liang
> > <jliang@xilinx.com>; linus.walleij@linaro.org; devicetree@vger.kernel.org;
> > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> > fpga@vger.kernel.org; chinnikishore369@gmail.com; git <git@xilinx.com>
> > Subject: Re: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx
> > firmware
> >
> > On Thu, Apr 29, 2021 at 07:34:05PM +0530, Nava kishore Manne wrote:
> > > Add documentation to describe Xilinx firmware driver bindings.
> > > Firmware driver provides an interface to firmware APIs.
> > > Interface APIs can be used by any driver to communicate to Platform
> > > Management Unit.
> > >
> > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > > ---
> > > Changes for v4:
> > >                 -Added new yaml file for xilinx firmware
> > >                  as suggested by Rob.
> > >
> > >  .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 63
> > > +++++++++++++++++++
> > >  1 file changed, 63 insertions(+)
> > >  create mode 100644
> > > Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > firmware
> > > .yaml
> >
> > What about the old doc?:
> >
>
> As you suggested i have added only the fpga node relevant info here so it's not representing the complete firmware file with other sub node like clk, Aes, ...etc.
> Once it completely mature we can deprecate the Old doc.
>
> > Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > firmware.txt
> >
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > firmwa
> > > re.yaml
> > > b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > firmwa
> > > re.yaml
> > > new file mode 100644
> > > index 000000000000..4b97f005bed7
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-fi
> > > +++ rmware.yaml
> > > @@ -0,0 +1,63 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > > +---
> > > +$id:
> > > +http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.ya
> > > +ml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Xilinx firmware driver
> > > +
> > > +maintainers:
> > > +  - Nava kishore Manne <nava.manne@xilinx.com>
> > > +
> > > +description:
> > > +  The zynqmp-firmware node describes the interface to platform
> > firmware.
> > > +  ZynqMP has an interface to communicate with secure firmware.
> > > +Firmware
> > > +  driver provides an interface to firmware APIs. Interface APIs can
> > > +be
> > > +  used by any driver to communicate to PMUFW(Platform Management
> > Unit).
> > > +  These requests include clock management, pin control, device
> > > +control,
> > > +  power management service, FPGA service and other platform
> > > +management
> > > +  services.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    oneOf:
> > > +      - description:
> > > +          For implementations complying for Zynq Ultrascale+ MPSoC.
> > > +        const: xlnx,zynqmp-firmware
> > > +
> > > +      - description:
> > > +          For implementations complying for Versal.
> > > +        const: xlnx,versal-firmware
> > > +
> > > +  method:
> > > +    description: The method of calling the PM-API firmware layer.
> > > +                #  Permitted values are:
> > > +                #  - "smc" : SMC #0, following the SMCCC
> > > +                #  - "hvc" : HVC #0, following the SMCCC
> >
> > Drop the '#'. If you want to maintain the formatting, then use '|' after
> > 'description:' for a literal block.
> >
>
> Will fix in v5.
>
> > > +    $ref: /schemas/types.yaml#/definitions/string-array
> > > +    enum:
> > > +      - smc
> > > +      - hvc
> > > +
> > > +patternProperties:
> > > +  "fpga":
> >
> > So 'foofpgabar' is valid?
> >
>
> Yes, it's a valid for fpga node.

No, please make the node name more specific.

Rob

RE: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx firmware

[Nava kishore Manne]

Hi Rob,

	Please find my response inline.

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Tuesday, May 4, 2021 7:11 PM
> To: Nava kishore Manne <navam@xilinx.com>
> Cc: Michal Simek <michals@xilinx.com>; mdf@kernel.org; trix@redhat.com;
> gregkh@linuxfoundation.org; arnd@arndb.de; Rajan Vaja
> <RAJANV@xilinx.com>; Amit Sunil Dhamne <amitsuni@xlnx.xilinx.com>;
> Manish Narani <MNARANI@xilinx.com>; zou_wei@huawei.com; Sai Krishna
> Potthuri <lakshmis@xilinx.com>; iwamatsu@nigauri.org; Jiaying Liang
> <jliang@xilinx.com>; linus.walleij@linaro.org; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> fpga@vger.kernel.org; chinnikishore369@gmail.com; git <git@xilinx.com>
> Subject: Re: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx
> firmware
> 
> On Tue, May 4, 2021 at 4:34 AM Nava kishore Manne <navam@xilinx.com>
> wrote:
> >
> > Hi Rob,
> >
> >         Please find my response inline.
> >
> > > -----Original Message-----
> > > From: Rob Herring <robh@kernel.org>
> > > Sent: Saturday, May 1, 2021 1:10 AM
> > > To: Nava kishore Manne <navam@xilinx.com>
> > > Cc: Michal Simek <michals@xilinx.com>; mdf@kernel.org;
> > > trix@redhat.com; gregkh@linuxfoundation.org; arnd@arndb.de; Rajan
> > > Vaja <RAJANV@xilinx.com>; Amit Sunil Dhamne
> > > <amitsuni@xlnx.xilinx.com>; Manish Narani <MNARANI@xilinx.com>;
> > > zou_wei@huawei.com; Sai Krishna Potthuri <lakshmis@xilinx.com>;
> > > iwamatsu@nigauri.org; Jiaying Liang <jliang@xilinx.com>;
> > > linus.walleij@linaro.org; devicetree@vger.kernel.org;
> > > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> > > linux- fpga@vger.kernel.org; chinnikishore369@gmail.com; git
> > > <git@xilinx.com>
> > > Subject: Re: [PATCH v4 1/4] dt-bindings: firmware: Add bindings for
> > > xilinx firmware
> > >
> > > On Thu, Apr 29, 2021 at 07:34:05PM +0530, Nava kishore Manne wrote:
> > > > Add documentation to describe Xilinx firmware driver bindings.
> > > > Firmware driver provides an interface to firmware APIs.
> > > > Interface APIs can be used by any driver to communicate to
> > > > Platform Management Unit.
> > > >
> > > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > > > ---
> > > > Changes for v4:
> > > >                 -Added new yaml file for xilinx firmware
> > > >                  as suggested by Rob.
> > > >
> > > >  .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 63
> > > > +++++++++++++++++++
> > > >  1 file changed, 63 insertions(+)
> > > >  create mode 100644
> > > > Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > > firmware
> > > > .yaml
> > >
> > > What about the old doc?:
> > >
> >
> > As you suggested i have added only the fpga node relevant info here so it's
> not representing the complete firmware file with other sub node like clk, Aes,
> ...etc.
> > Once it completely mature we can deprecate the Old doc.
> >
> > > Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > > firmware.txt
> > >
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > > firmwa
> > > > re.yaml
> > > > b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-
> > > firmwa
> > > > re.yaml
> > > > new file mode 100644
> > > > index 000000000000..4b97f005bed7
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqm
> > > > +++ p-fi
> > > > +++ rmware.yaml
> > > > @@ -0,0 +1,63 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML
> > > > +1.2
> > > > +---
> > > > +$id:
> > > > +http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmwar
> > > > +e.ya
> > > > +ml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: Xilinx firmware driver
> > > > +
> > > > +maintainers:
> > > > +  - Nava kishore Manne <nava.manne@xilinx.com>
> > > > +
> > > > +description:
> > > > +  The zynqmp-firmware node describes the interface to platform
> > > firmware.
> > > > +  ZynqMP has an interface to communicate with secure firmware.
> > > > +Firmware
> > > > +  driver provides an interface to firmware APIs. Interface APIs
> > > > +can be
> > > > +  used by any driver to communicate to PMUFW(Platform
> Management
> > > Unit).
> > > > +  These requests include clock management, pin control, device
> > > > +control,
> > > > +  power management service, FPGA service and other platform
> > > > +management
> > > > +  services.
> > > > +
> > > > +properties:
> > > > +  compatible:
> > > > +    oneOf:
> > > > +      - description:
> > > > +          For implementations complying for Zynq Ultrascale+ MPSoC.
> > > > +        const: xlnx,zynqmp-firmware
> > > > +
> > > > +      - description:
> > > > +          For implementations complying for Versal.
> > > > +        const: xlnx,versal-firmware
> > > > +
> > > > +  method:
> > > > +    description: The method of calling the PM-API firmware layer.
> > > > +                #  Permitted values are:
> > > > +                #  - "smc" : SMC #0, following the SMCCC
> > > > +                #  - "hvc" : HVC #0, following the SMCCC
> > >
> > > Drop the '#'. If you want to maintain the formatting, then use '|'
> > > after 'description:' for a literal block.
> > >
> >
> > Will fix in v5.
> >
> > > > +    $ref: /schemas/types.yaml#/definitions/string-array
> > > > +    enum:
> > > > +      - smc
> > > > +      - hvc
> > > > +
> > > > +patternProperties:
> > > > +  "fpga":
> > >
> > > So 'foofpgabar' is valid?
> > >
> >
> > Yes, it's a valid for fpga node.
> 
> No, please make the node name more specific.
> 

Will fix in v5.

Regards,
Navakishore.

[PATCH v4 2/4] drivers: firmware: Add PDI load API support

[Nava kishore Manne]

This patch adds load PDI API support to enable full/partial PDI loading
from linux. Programmable Device Image (PDI) is combination of headers,
images and bitstream files to be loaded.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
                -Updated API Doc and commit msg.
                 No functional changes.
Changes for v3:
                -None.
Changes for v4:
                -Rebased the changes on linux-next.
                 No functional changes

 drivers/firmware/xilinx/zynqmp.c     | 17 +++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h | 10 ++++++++++
 2 files changed, 27 insertions(+)

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 15b138326ecc..2db571da9ad8 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -1011,6 +1011,23 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
 
+/**
+ * zynqmp_pm_load_pdi - Load and process PDI
+ * @src:       Source device where PDI is located
+ * @address:   PDI src address
+ *
+ * This function provides support to load PDI from linux
+ *
+ * Return: Returns status, either success or error+reason
+ */
+int zynqmp_pm_load_pdi(const u32 src, const u64 address)
+{
+	return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
+				   lower_32_bits(address),
+				   upper_32_bits(address), 0, NULL);
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
+
 /**
  * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
  * AES-GCM core.
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 9d1a5c175065..56b426fe020c 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -52,6 +52,10 @@
 #define	ZYNQMP_PM_CAPABILITY_WAKEUP	0x4U
 #define	ZYNQMP_PM_CAPABILITY_UNUSABLE	0x8U
 
+/* Loader commands */
+#define PM_LOAD_PDI	0x701
+#define PDI_SRC_DDR	0xF
+
 /*
  * Firmware FPGA Manager flags
  * XILINX_ZYNQMP_PM_FPGA_FULL:	FPGA full reconfiguration
@@ -411,6 +415,7 @@ int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
 				 u32 *value);
 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
 				 u32 value);
+int zynqmp_pm_load_pdi(const u32 src, const u64 address);
 #else
 static inline int zynqmp_pm_get_api_version(u32 *version)
 {
@@ -622,6 +627,11 @@ static inline int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
 {
 	return -ENODEV;
 }
+
+static inline int zynqmp_pm_load_pdi(const u32 src, const u64 address)
+{
+	return -ENODEV;
+}
 #endif
 
 #endif /* __FIRMWARE_ZYNQMP_H__ */
-- 
2.17.1

[PATCH v4 3/4] dt-bindings: fpga: Add binding doc for versal fpga manager

[Nava kishore Manne]

From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>

This patch adds binding doc for versal fpga manager driver.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
---
Changes for v2:
                -Fixed file format and syntax issues.
Changes for v3:
                -Removed unwated extra spaces.
Changes for v4:
                -Rebased the changes on linux-next.
                 No functional changes

 .../bindings/fpga/xlnx,versal-fpga.yaml       | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml

diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
new file mode 100644
index 000000000000..fec6144766fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/xlnx,versal-fpga.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Versal FPGA driver.
+
+maintainers:
+  - Nava kishore Manne <nava.manne@xilinx.com>
+
+description: |
+  Device Tree Versal FPGA bindings for the Versal SoC, controlled
+  using firmware interface.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - xlnx,versal-fpga
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    versal_fpga: fpga {
+         compatible = "xlnx,versal-fpga";
+    };
+
+...
-- 
2.17.1

[PATCH v4 4/4] fpga: versal-fpga: Add versal fpga manager driver

[Nava kishore Manne]

Add support for Xilinx Versal FPGA manager.

PDI source type can be DDR, OCM, QSPI flash etc..
But driver allocates memory always from DDR, Since driver supports only
DDR source type.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
                -Updated the Fpga Mgr registrations call's
                 to 5.11
                -Fixed some minor coding issues as suggested by
                 Moritz.
Changes for v3:
                -Rewritten the Versal fpga Kconfig contents.
Changes for v4:
                -Rebased the changes on linux-next.
                 No functional changes.

 drivers/fpga/Kconfig       |   9 +++
 drivers/fpga/Makefile      |   1 +
 drivers/fpga/versal-fpga.c | 117 +++++++++++++++++++++++++++++++++++++
 3 files changed, 127 insertions(+)
 create mode 100644 drivers/fpga/versal-fpga.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 33e15058d0dc..92c20b92357a 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -234,4 +234,13 @@ config FPGA_MGR_ZYNQMP_FPGA
 	  to configure the programmable logic(PL) through PS
 	  on ZynqMP SoC.
 
+config FPGA_MGR_VERSAL_FPGA
+	tristate "Xilinx Versal FPGA"
+	depends on ARCH_ZYNQMP || COMPILE_TEST
+	help
+	  Select this option to enable FPGA manager driver support for
+	  Xilinx Versal SoC. This driver uses the firmware interface to
+	  configure the programmable logic(PL).
+
+	  To compile this as a module, choose M here.
 endif # FPGA
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 18dc9885883a..0bff783d1b61 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
 obj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
 obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
 obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA)	+= zynqmp-fpga.o
+obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA)      += versal-fpga.o
 obj-$(CONFIG_ALTERA_PR_IP_CORE)         += altera-pr-ip-core.o
 obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT)    += altera-pr-ip-core-plat.o
 
diff --git a/drivers/fpga/versal-fpga.c b/drivers/fpga/versal-fpga.c
new file mode 100644
index 000000000000..5744e44f981d
--- /dev/null
+++ b/drivers/fpga/versal-fpga.c
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019-2021 Xilinx, Inc.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/fpga/fpga-mgr.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/string.h>
+#include <linux/firmware/xlnx-zynqmp.h>
+
+/**
+ * struct versal_fpga_priv - Private data structure
+ * @dev:	Device data structure
+ */
+struct versal_fpga_priv {
+	struct device *dev;
+};
+
+static int versal_fpga_ops_write_init(struct fpga_manager *mgr,
+				      struct fpga_image_info *info,
+				      const char *buf, size_t size)
+{
+	return 0;
+}
+
+static int versal_fpga_ops_write(struct fpga_manager *mgr,
+				 const char *buf, size_t size)
+{
+	struct versal_fpga_priv *priv;
+	dma_addr_t dma_addr = 0;
+	char *kbuf;
+	int ret;
+
+	priv = mgr->priv;
+
+	kbuf = dma_alloc_coherent(priv->dev, size, &dma_addr, GFP_KERNEL);
+	if (!kbuf)
+		return -ENOMEM;
+
+	memcpy(kbuf, buf, size);
+
+	wmb(); /* ensure all writes are done before initiate FW call */
+
+	ret = zynqmp_pm_load_pdi(PDI_SRC_DDR, dma_addr);
+
+	dma_free_coherent(priv->dev, size, kbuf, dma_addr);
+
+	return ret;
+}
+
+static int versal_fpga_ops_write_complete(struct fpga_manager *mgr,
+					  struct fpga_image_info *info)
+{
+	return 0;
+}
+
+static enum fpga_mgr_states versal_fpga_ops_state(struct fpga_manager *mgr)
+{
+	return FPGA_MGR_STATE_UNKNOWN;
+}
+
+static const struct fpga_manager_ops versal_fpga_ops = {
+	.state = versal_fpga_ops_state,
+	.write_init = versal_fpga_ops_write_init,
+	.write = versal_fpga_ops_write,
+	.write_complete = versal_fpga_ops_write_complete,
+};
+
+static int versal_fpga_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct versal_fpga_priv *priv;
+	struct fpga_manager *mgr;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = dev;
+	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+	if (ret < 0) {
+		dev_err(dev, "no usable DMA configuration\n");
+		return ret;
+	}
+
+	mgr = devm_fpga_mgr_create(dev, "Xilinx Versal FPGA Manager",
+				   &versal_fpga_ops, priv);
+	if (!mgr)
+		return -ENOMEM;
+
+	return devm_fpga_mgr_register(dev, mgr);
+}
+
+static const struct of_device_id versal_fpga_of_match[] = {
+	{ .compatible = "xlnx,versal-fpga", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, versal_fpga_of_match);
+
+static struct platform_driver versal_fpga_driver = {
+	.probe = versal_fpga_probe,
+	.driver = {
+		.name = "versal_fpga_manager",
+		.of_match_table = of_match_ptr(versal_fpga_of_match),
+	},
+};
+module_platform_driver(versal_fpga_driver);
+
+MODULE_AUTHOR("Nava kishore Manne <nava.manne@xilinx.com>");
+MODULE_AUTHOR("Appana Durga Kedareswara rao <appanad.durga.rao@xilinx.com>");
+MODULE_DESCRIPTION("Xilinx Versal FPGA Manager");
+MODULE_LICENSE("GPL");
-- 
2.17.1

Re: [PATCH v4 0/4] Add Bitstream configuration support for Versal

[Moritz Fischer]

Hi,

On Thu, Apr 29, 2021 at 07:34:04PM +0530, Nava kishore Manne wrote:
> This series Adds FPGA manager driver support for Xilinx Versal SoC.
> it uses the firmware interface to configure the programmable logic.
> 
> Changes for v4:
> 		-Rebase the patch series on linux-next.
> 		https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
> 
> Appana Durga Kedareswara rao (1):
>   dt-bindings: fpga: Add binding doc for versal fpga manager
> 
> Nava kishore Manne (3):
>   dt-bindings: firmware: Add bindings for xilinx firmware
>   drivers: firmware: Add PDI load API support
>   fpga: versal-fpga: Add versal fpga manager driver
> 
>  .../firmware/xilinx/xlnx,zynqmp-firmware.yaml |  63 ++++++++++
>  .../bindings/fpga/xlnx,versal-fpga.yaml       |  33 +++++
>  drivers/firmware/xilinx/zynqmp.c              |  17 +++
>  drivers/fpga/Kconfig                          |   9 ++
>  drivers/fpga/Makefile                         |   1 +
>  drivers/fpga/versal-fpga.c                    | 117 ++++++++++++++++++
>  include/linux/firmware/xlnx-zynqmp.h          |  10 ++
>  7 files changed, 250 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
>  create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
>  create mode 100644 drivers/fpga/versal-fpga.c
> 
> -- 
> 2.17.1
> 
Series looks good, will wait for Rob's Acks on the DT part.

Thanks,
Moritz